Claims
- 1. A method of making an electronic matrix array comprising the steps of:
- forming at least one layer of phase changeable material on a substrate, said phase changeable material having a substantially nonconductive state and a comparatively high conductive state, said layer being formed in one of said states;
- parallel programming said layer by irradiating selected areas of said layer to simultaneously convert said selected areas of said layer to the other one of said states to form selected substantially nonconductive portions of said layer and selected comparatively high conductive portions of said layer;
- forming first and second sets of electrically conductive address lines on respective opposite sides of said layer, said address lines of said first and second sets being formed for crossing at an angle to form a plurality of crossover points; and
- said selected substantially nonconductive layer portions and said selected comparatively high conductive layer portions being formed between said first and second sets of address lines.
- 2. The method as defined in claim 1, wherein each of said comparatively high conductive layer portions are formed to define a discrete area of said layer which is not substantially larger than the area of said crossover points defined by the overlapping juxtaposed common surface areas of said address lines.
- 3. The method as defined in claim 1, wherein said step of irradiating selected areas of said layer includes irradiating said layer through a mask.
- 4. The method as defined in claim 3, wherein said step of irradiating includes cooling said layer at least during said irradiating.
- 5. The method as defined in claim 3, wherein said step of irradiating said layer includes laying said mask over said layer in contact therewith.
- 6. The method as defined in claim 1, wherein said step of forming said address lines includes forming one of said sets of address lines by removing portions of said conductive substrate.
- 7. The method as defined in claim 1, wherein said step of forming said address lines includes forming said lines after irradiating said areas and detecting the locations of the layer portions of one of said states and thereafter aligning one of said sets of address lines on said layer according to the detected locations of said layer portions of said one of said states.
- 8. The method as defined in claim 1, wherein said step of forming said layer of phase changeable material includes depositing a layer of amorphous material.
- 9. The method as defined in claim 8, wherein said layer is formed from an amorphous silicon alloy material.
- 10. The method as defined in claim 8, wherein said layer is formed from a chalcogenide material.
- 11. The method as defined in claim 8, wherein said step of irradiating selected areas of said layer includes irradiating said selected areas with light for changing said amorphous material to said comparatively high conductive state within said selected areas.
- 12. The method as defined in claim 1, wherein said step of forming said phase changeable material includes depositing a plurality of layers of semiconductor material on said substrate to form a continuous diode structure on said substrate.
- 13. The method as defined in claim 1, including the further step of forming a continuous diode structure over said substrate and wherein said layer of phase changeable material is formed over said diode structure.
- 14. The method as defined in claim 13, wherein said step of forming said diode structure includes depositing a first doped semiconductor layer over said substrate, depositing an intrinsic semiconductor layer over said first layer, and depositing a second doped semiconductor layer over said intrinsic layer.
- 15. The method as defined in claim 14, wherein said semiconductor layers are formed of amorphous semiconductor material.
- 16. The method as defined in claim 13, wherein said layer of phase changeable material is a chalcogenide material.
- 17. The method as defined in claim 13, wherein said layer of phase changeable material is an amorphous silicon alloy.
- 18. The method as defined in claim 1, further including the step of removing said comparatively high conductive layer portions prior to forming said address lines.
- 19. The method as defined in claim 1, wherein said step of forming said address lines includes forming said lines prior to irradiating said areas and forming at least one of said sets of address lines of substantially irradiation transparent material.
- 20. The method as defined in claim 19, wherein said step of irradiating selected areas of said layer includes irradiating said layer through a mask and through said transparent lines.
- 21. The method as defined in claim 20, wherein said step of irradiating said layer includes laying said mask over said transparent lines in contact therewith.
- 22. The method as defined in claim 1, including testing said selected portions to insure that the portions are in their programmed states.
- 23. The method as defined in claim 22, wherein said phase changeable material is resettable, further including bulk erasing said layer so that it can then be reprogrammed.
- 24. The method as defined in claim 22, including optically testing said selected portions.
- 25. The method as defined in claim 22, including electrically testing said selected portions.
- 26. The method as defined in claim 22, including reprogramming selected non-converted areas which did not change states.
- 27. The method as defined in claim 26, including optically reprogramming said areas.
- 28. The method as defined in claim 26, including electrically reprogramming said areas.
RELATED APPLICATION
This is a continuation of copending U.S. patent application Ser. No. 513,997 filed July 14, 1983, now U.S. Pat. No. 4,545,111, which is a continuation-in-part of copending U.S. patent application Ser. No. 458,919 filed Jan. 18, 1983.
US Referenced Citations (1)
Number |
Name |
Date |
Kind |
4545111 |
Johnson |
Oct 1985 |
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Continuations (1)
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Number |
Date |
Country |
Parent |
513997 |
Jul 1983 |
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Continuation in Parts (1)
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Number |
Date |
Country |
Parent |
458919 |
Jan 1983 |
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