Method for producing a semiconductor component having a metallic control electrode, and semiconductor component

Abstract

A method for producing a semiconductor component, and a semiconductor component, having a metallic gate electrode deposited onto a semiconductor layer, with the gate electrode having a gate foot and a gate head. The component is produced by depositing a first layer of aluminum on the semiconductor layer, depositing a second layer of a second metal on the first layer, depositing at least one additional layer (G3) of an additional metal, different from the second metal, on the second layer, and carrying out a temperature treatment at elevated temperature.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

Other objects and features of the present invention will become apparent from the following detailed description considered in connection with the accompanying drawings. It is to be understood, however, that the drawings are designed as an illustration only and not as a definition of the limits of the invention.

In the drawings, wherein similar reference characters denote similar elements throughout the several views:

FIGS. 1 a-1d show a process sequence according to the invention, in several steps; and

FIG. 2 shows an enlarged detail from FIG. 1d.

Claims

1. A method for producing a semiconductor component having a metallic gate electrode deposited onto a semiconductor layer, with a gate foot and a gate head, comprising the following steps: depositing a first layer (G1) of aluminum on the semiconductor layer;depositing a second layer (G2) of a second metal on the first layer (G1),depositing at least one additional layer (G3) of an additional metal, different from the second metal, on the second layer; andcarrying out a temperature treatment at elevated temperature, wherein said second metal limits growth of grain sizes of the aluminum in the first layer (G1) during said temperature treatment.

2. A method according to claim 1, wherein the first layer is deposited with a layer thickness (D1) that amounts to not more than 1.5 times a gate length.

3. A method according to claim 1, wherein the first layer is deposited with a first layer thickness (D1) between 10 nm and 100 nm.

4. A method according to claim 1, wherein the second layer is formed from a metal that can form an alloy with Al, and wherein during the step of temperature treatment, Al and the metal of the second layer are alloyed at a border surface of first and second layer.

5. A method according to claim 4, wherein the second layer (G2) is produced from Ti, Ni, or Pt.

6. A method according to claim 1, wherein the second layer (G2) is deposited with a second layer thickness (D2) that is less than a thickness (D1) of the first layer.

7. A method according to claim 6, wherein the second layer thickness (D2) is less than 10 nm.

8. A method according to claim 1, wherein the gate head is produced mostly from the additional metal.

9. A method according to claim 1, wherein the additional metal is deposited in a layer thickness (D3) that is greater than a sum of thicknesses of the first and second layers.

10. A method according to claim 1, wherein the additional metal is predominantly aluminum.

11. A method according to claim 1, wherein at least some of the layers of the gate electrode are deposited by means of vapor deposition or cathode atomization.

12. A method according to claim 1, wherein the gate foot is deposited in a recess channel (RC) through an opening (MF) of an under-etched layer.

13. A method according to claim 12, wherein the first layer is deposited with a first layer thickness that amounts to at least 50% of a depth (DR) of the recess channel (RC).

14. A method according to claim 11, wherein the gate head is produced using a lift-off method.

15. A semiconductor component having a metallic gate electrode on a semiconductor layer of semiconductor material on GaAs substrate, said gate electrode having a gate foot and a gate head and consisting of several layers when viewed in a direction perpendicular to a plane of the semiconductor layer, said layers comprising: a first layer (G1) consisting of aluminum and having a first layer thickness (D1);a second layer (G2) on top of the first layer (G1) and consisting of a second metal, different from aluminum; andat least one additional layer (G3) formed above the second layer and consisting of an additional metal, different from the metal of the second layer.

16. A semiconductor element according to claim 15, wherein the first layer thickness (D1) is not greater than 1.5 times a length of the gate.

17. A semiconductor element according to claim 15, wherein the first layer thickness (D1) is between 10 nm and 100 nm.

18. A semiconductor element according to claim 15, wherein the gate foot is disposed in a recess channel.

19. A semiconductor element according to claim 18, wherein the first layer thickness (D1) amounts to at least 50% of a depth of the recess channel.

20. A semiconductor element according to claim 15, wherein the metal of the second layer forms an alloy with the Al of the first layer at a border surface between the first and second layers.

21. A semiconductor element according to claim 20, wherein the alloy is disposed at a distance from the semiconductor layer.

22. A semiconductor element according to claim 20, wherein the second layer contains Ti, Ni, or Pt.

23. A semiconductor element according to claim 15, wherein the second layer (G2) has a layer thickness (D2) that is less than the first layer thickness (D1).

24. A semiconductor element according to claim 23, wherein the second layer thickness (D2) is less than 10 nm.

25. A semiconductor element according to claim 15, wherein the gate head is formed mostly by the additional layer (G3).

26. A semiconductor element according to claim 23, wherein a layer thickness (D3) of the additional layer (G3) is greater than a sum of the layer thicknesses of the first and second layers (D1, D2).

27. A semiconductor element according to claim 15, wherein the additional layer (G3) consists mostly of aluminum.

28. A semiconductor element according to claim 27, wherein an average grain size of the aluminum in the first layer (G1) is less than an average grain size of the aluminum in the additional layer (G3).

29. A semiconductor element according to claim 28, wherein the average grain size of the aluminum in the first layer amounts to less than 50% of the average grain size in the additional layer.