Claims
- 1. A method of fabricating a semiconductor storage device, said semiconductor storage device comprising: a semiconductor substrate having a device activation region defined by a device isolation structure; an access transistor formed at said device activation region in said semiconductor substrate, and having a gate electrode and a pair of impurity diffusion layers; a bit line insulated from said access transistor and a memory capacitor in which a lower electrode and an upper electrode are opposed to each other and capacitive-coupled through a dielectric film, comprising:a first step of forming a first insulating film over said access transistor; a second step of forming a protective film on said first insulating film; a third step of patterning said first insulating film and said protective film by means of a photolithography so as to form first and second contact holes for exposing a portion of a surface of one of said pair of impurity diffusion layers in said first insulating film and said protective film, respectively, said first contact hole is formed so that a side face of said bit line is exposed on the side wall face of said first contact hole; a fourth step of forming a second insulating film in a uniform film thickness or a homogeneous film thickness on side wall faces of said first and second contact holes and on a surface of said protective film, said second insulating film insulating said bit line from said contact hole; a fifth step of etching said second insulating film with said protective film as a stopper so as to leave said second insulating film only on the side wall faces of said first and second contact holes insulating said first contact hole from said bit line; a sixth step of forming a conducing film on said protective film so as to fill said first and second contact holes forming one contact insulated from said bit line; and a seventh step of patterning said conducting film so as to form said lower electrode of said memory capacitor in an island-like shape on said protective film.
- 2. A method of fabricating a semiconductor storage device as claimed in claim 1, wherein each of said first and second contact holes has a diameter of the minimum dimension determined by the exposure limit in the photolithography.
- 3. A method of fabricating a semiconductor storage device as claimed in claim 1, wherein each of said lower and upper electrodes is made of a polycrystal silicon film.
- 4. A method of fabricating a semiconductor storage device as claimed in claim 1, wherein said protective film is made of a silicon nitride film.
- 5. A method of fabricating a semiconductor storage device as claimed in claim 1, whereinsaid protective film is made of a polycrystal silicon film; and in said seventh step, said protective film is patterned together with said conducting film so as to form said protective film only between said island-like shaped lower electrode and said first insulating film.
- 6. A method of fabricating a semiconductor storage device as claimed in claim 1, wherein said device isolation structure is a field oxide film which is formed by LOCOS method.
- 7. A method of fabricating a semiconductor storage device as claimed in claim 1, wherein said device isolation structure is a trench type device isolation structure in which an insulating film is formed in a groove which is formed in said semiconductor substrate.
- 8. A method of fabricating a semiconductor storage device as claimed in claim 1, wherein in said fourth step, said second insulating film is formed in a film thickness not greater than one-half of the diameter of said first or second contact hole.
- 9. A method of fabricating a semiconductor storage device, said semiconductor storage device comprising: a semiconductor substrate having a device activation region defined by a device isolation structure; an access transistor formed at said device activation region in said semiconductor substrate, and having a gate electrode and a pair of impurity diffusion layers; and a memory capacitor in which a lower electrode and an upper electrode are opposed to each other and capacitive-coupled through a dielectric film, comprising:a first step of forming a first insulating film over said access transistor; a second step of forming a protective film on said first insulating film; a third step of said first contact hole is formed so that the side face of said gate electrode is exposed on the side wall face of said first contact hole; a fourth step of forming a second insulating film in a uniform film thickness or a homogeneous film thickness on side wall faces of said first and second contact holes and on a surface of said protective film; a fifth step of etching said second insulating film with said protective film as a stopper so as to leave said second insulating film only on the side wall faces of said first and second contact holes; a sixth step of forming a conducing film on said protective film so as to fill said first and second contact holes; and a seventh step of patterning said conducting film so as to form said lower electrode of said memory capacitor in an island-like shape on said protective film.
Priority Claims (1)
Number |
Date |
Country |
Kind |
9-347063 |
Dec 1997 |
JP |
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Parent Case Info
This application is a division of Ser. No. 09/124,852 filed Jul. 30, 1998, now U.S. Pat. No. 6,255,686.
US Referenced Citations (9)
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