Claims
- 1. A method of patterning a first photoresist layer on a semiconductor wafer using an attenuated phase shifting reflective mask, comprising:
providing a mask substrate having a reflective layer; depositing an attenuating phase shift layer over the reflective layer; depositing a buffer layer over the attenuating phase shift layer; depositing a repairable layer over the buffer layer; depositing a second photoresist layer over the repairable layer; patterning the second photoresist layer to form a patterned photoresist layer; etching the repairable layer using the patterned photoresist layer as a first mask to form a patterned repairable layer; removing the patterned photoresist layer; inspecting and repairing the patterned repairable layer to form a patterned repaired layer; etching the buffer layer using the patterned repaired layer as a second mask to form a patterned buffer layer; removing the patterned repaired layer; etching the attenuating phase shift layer using the patterned buffer layer as a third mask; removing the patterned buffer layer to form the attenuated phase shifting reflective mask; applying the first photoresist to the semiconductor wafer; and reflecting radiation off the attenuated phase shifting reflective mask to the first photoresist on the semiconductor wafer to provide an exposed pattern on the photoresist.
- 2. The method of claim 1, further comprising:
inspecting the patterned buffer layer after etching the buffer layer; and repairing the patterned buffer layer if the patterned buffer layer has a defect.
- 3. The method of claim 1, wherein the attenuating phase shift layer is characterized as being selectively etchable with respect to the reflective layer.
- 4. The method of claim 3, wherein the attenuating phase shift layer comprises chromium.
- 5. The method of claim 3, wherein the attenuating phase shift layer comprises a material selected from chromium, ruthenium, and germanium.
- 6. The method of claim 3, wherein the attenuating phase shift layer comprises a metal.
- 7. The method of claim 3, wherein attenuating phase shift layer comprises:
a chromium layer; and a chromium oxide layer over the chromium layer.
- 8. The method of claim 1, wherein the buffer layer comprises silicon oxynitride.
- 9. The method of claim 1, wherein the repairable layer comprises tantalum silicon nitride.
- 10. The method of claim 1, wherein the reflective layer comprises a plurality of alternating layers of molybdenum and silicon.
- 11. The method of claim 1, wherein the buffer layer is selectively etchable with respect to the attenuating phase shift layer.
- 12. The method of claim 1, wherein the repairable layer is selectively etchable with respect to the buffer layer.
- 13. A method for obtaining a desired pattern of exposed photoresist on a semiconductor wafer, comprising:
providing a mask substrate having a reflective layer; depositing an attenuating phase shift layer over the reflective layer; depositing a repairable layer over the attenuating phase shift layer; depositing a first photoresist layer over the repairable layer; patterning the first photoresist layer according to the desired pattern; transferring the desired pattern from the first photoresist layer to the repairable layer; inspecting the repairable layer to determine if it has the desired pattern; repairing the repairable layer to the desired pattern if inspecting showed that the repairable layer did not have the desired pattern; transferring the desired pattern from the repairable layer to the attenuating phase shift layer to form an attenuated phase shifting reflective mask; applying a second photoresist layer to the semiconductor wafer; and reflecting radiation off the attenuated phase shifting reflective mask to expose the second photoresist with the desired pattern.
- 14. The method of claim 13, further comprising:
depositing a buffer layer over the attenuating phase shift layer prior to depositing the repairable layer; and using the buffer layer to transfer the desired pattern from the repairable layer to the attenuating phase shift layer.
- 15. The method of claim 13, wherein the reflective layer comprises a plurality of alternating molybdenum and silicon layers and the attenuating phase shift layer comprises chromium.
- 16. The method of claim 13, wherein the reflective layer comprises a plurality of alternating molybdenum and silicon layers and the attenuating phase shift layer comprises a material is that is selectively etchable with respect to the reflective layer.
- 17. The method of claim 16, wherein the attenuating phase shift layer comprises one of chromium, ruthenium, and germanium.
- 18. The method of claim 16, wherein the attenuating phase shift layer has a thickness to cause reflection of the radiation at a 180 degree phase shift in relation to the radiation reflected from the reflective layer.
- 19. The method of claim 18, wherein the thickness of the attenuating phase shift layer is sufficient to cause reflection of the radiation through the attenuating phase shift layer with at least 90% attenuation in relation to the radiation reflected from the reflective layer.
- 20. The method of claim 16, wherein the reflective layer comprises a plurality of alternating layers of molybdenum and silicon, the attenuating phase shift layer comprises chromium, and the repairable layer comprises silicon and oxygen.
- 21. A method for form forming a desired pattern on a semiconductor wafer, comprising:
providing a mask substrate having a reflective layer; depositing an attenuating phase shift layer, which is selectively etchable with respect to the reflective layer, over the reflective layer; depositing a buffer layer comprising silicon and oxygen over the attenuating phase shift layer; depositing a repairable layer, which is selectively etchable with respect to the buffer layer, over the buffer layer; patterning the repairable layer according to the desirable pattern; inspecting the repairable layer after patterning the repairable layer; repairing the repairable layer to the desired pattern if inspecting showed that the repairable layer did not have the desired pattern; transferring the desired pattern from the repairable layer to the attenuating phase shift layer to form an attenuated phase shifting reflective mask; and using the attenuated phase shifting reflective mask to form the desired pattern on the semiconductor wafer.
RELATED APPLICATION
[0001] This is related to U.S. patent application Ser. No. 08/414,735 filed Oct. 8, 1999, and entitled “Method of Manufacturing a Semiconductor Component” and is assigned to the current assignee hereof.