The invention may be understood by reference to the following description taken in conjunction with the accompanying drawings, in which like reference numerals identify like elements, and in which:
a-1b schematically show cross-sectional views of a conventional semiconductor device during the formation of a contact region for directly connecting a polysilicon line and a drain/source region during various manufacturing stages in accordance with conventional techniques, resulting in an increased risk for leakage currents or short circuits;
a-2c schematically show cross-sectional views of a semiconductor device including a circuit element and a contact region for a direct connection of certain contact regions of the circuit elements during various manufacturing stages in accordance with illustrative embodiments of the present invention, in which an additional silicon dioxide based etch stop layer is formed prior to the deposition of the interlayer dielectric material; and
a-3d schematically show cross-sectional views of a semiconductor device during the formation of a contact portion, wherein the etch rate of the contact etch stop layer is modified prior to the patterning of the contact etch stop layer according to further illustrative embodiments of the present invention.
Number | Date | Country | Kind |
---|---|---|---|
10 2006 004 412.6 | Jan 2006 | DE | national |