Method of manufacturing ferroelectric memory device

Abstract
A method of manufacturing a ferroelectric memory device includes: forming an active element on a substrate; forming an interlayer insulating layer on the substrate; forming an opening on the interlayer insulating layer and forming a contact plug inside the opening; forming a foundation layer above the substrate; and laminating, on the foundation layer, a first electrode, a ferroelectric layer, and a second electrode. In this method, the forming of the foundation layer includes: forming a first titanium layer having a thickness less than a depth of a recess; nitriding the first titanium layer into a first titanium nitride layer; forming a second titanium layer on the first titanium nitride layer so as to at least partially fill the recess remaining on the contact plug; nitriding the second titanium layer into a second titanium nitride layer, and polishing a surface of the second titanium nitride layer.
Description

BRIEF DESCRIPTION OF THE DRAWINGS


FIG. 1 is a schematic cross-sectional view of a ferroelectric memory device according to an embodiment of this invention.



FIG. 2 is a schematic cross-sectional view of the orientation mode of the relevant part of the ferroelectric memory device in FIG. 1.



FIGS. 3A to 3E are schematic cross-sectional views of a manufacturing process for the ferroelectric memory device in FIG. 1.



FIGS. 4A to 4D are schematic cross-sectional views of a manufacturing process for the ferroelectric memory device in FIG. 1.


Claims
  • 1. A method of manufacturing a ferroelectric memory device, comprising: forming an active element on a substrate;forming an interlayer insulating layer on the substrate;forming an opening on the interlayer insulating layer and forming a contact plug inside the opening;forming a foundation layer above the substrate; andlaminating, on the foundation layer, a first electrode, a ferroelectric layer, and a second electrode, whereinthe forming of the foundation layer includes: forming, on a surface of the interlayer insulating layer and on a surface of the contact plug, a first titanium layer having a thickness less than a depth of a recess formed on the contact plug;nitriding the first titanium layer into a first titanium nitride layer;forming a second titanium layer on the first titanium nitride layer so as to at least partially fill the recess remaining on the contact plug;nitriding the second titanium layer into a second titanium nitride layer, andpolishing a surface of the second titanium nitride layer.
  • 2. The method of manufacturing the ferroelectric memory device according to claim 1, wherein the surface of the second titanium nitride layer is polished until the first titanium nitride layer formed on the interlayer insulating layer is exposed.
  • 3. The method of manufacturing the ferroelectric memory device according to claim 1, wherein the surface of the second titanium nitride layer is polished until the first titanium nitride layer formed on the interlayer insulating layer is exposed and so that the second titanium nitride layer remains inside of the recess on the contact plug.
  • 4. The method of manufacturing the ferroelectric memory device according to claim 1, wherein before the forming of the first titanium layer, an ammonium plasma process is applied onto the interlayer insulating layer.
  • 5. The method of manufacturing the ferroelectric memory device according to claim 1, further comprising forming, on a top surface of the foundation layer, a barrier layer serving as a barrier to oxygen.
  • 6. The method of manufacturing the ferroelectric memory device according to claim 5, wherein the barrier layer is made of a compound represented by a chemical formula Ti(1-xAlxNy(0<x≦0.3, 0<y).
Priority Claims (1)
Number Date Country Kind
2006-069100 Mar 2006 JP national