Method of manufacturing interconnect substrate

Abstract

A method of manufacturing an interconnect substrate by electroless plating, including: (a) forming a catalyst layer with a specific pattern on a substrate; (b) immersing the substrate in a first electroless plating solution including a first metal to deposit the first metal on the catalyst layer to form a first metal layer; and (c) immersing the substrate in a second electroless plating solution including a second metal to deposit the second metal on the first metal layer to form a second metal layer, an ionization tendency of the first metal being higher than an ionization tendency of the second metal.

Description

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING

FIG. 1 is a diagram showing a method of manufacturing an interconnect substrate according to one embodiment of the invention.

FIG. 2 is a diagram showing a method of manufacturing an interconnect substrate according to one embodiment of the invention.

FIG. 3 is a diagram showing a method of manufacturing an interconnect substrate according to one embodiment of the invention.

FIG. 4 is a diagram showing a method of manufacturing an interconnect substrate according to one embodiment of the invention.

FIG. 5 is a diagram showing a method of manufacturing an interconnect substrate according to one embodiment of the invention.

FIG. 6 is a diagram showing a method of manufacturing an interconnect substrate according to one embodiment of the invention.

FIG. 7 is a diagram showing a method of manufacturing an interconnect substrate according to one embodiment of the invention.

FIG. 8 is a diagram showing a method of manufacturing an interconnect substrate according to one embodiment of the invention.

FIG. 9 is a diagram showing a method of manufacturing an interconnect substrate according to one embodiment of the invention.

FIG. 10 is a diagram showing a method of manufacturing an interconnect substrate according to one embodiment of the invention.

FIG. 11 is a diagram showing a method of manufacturing an interconnect substrate according to one embodiment of the invention.

FIG. 12 shows an example of an electronic device to which an interconnect substrate according to one embodiment of the invention is applied.

Claims

1. A method of manufacturing an interconnect substrate by electroless plating, the method comprising: (a) forming a catalyst layer with a specific pattern on a substrate;(b) immersing the substrate in a first electroless plating solution including a first metal to deposit the first metal on the catalyst layer to form a first metal layer; and(c) immersing the substrate in a second electroless plating solution including a second metal to deposit the second metal on the first metal layer to form a second metal layer,an ionization tendency of the first metal being higher than an ionization tendency of the second metal.

2. The method of manufacturing an interconnect substrate as defined in claim 1, wherein, in the step (c), the second metal is deposited by displacement plating in which the first metal is replaced with the second metal, and the second metal is then deposited by electroless plating.

3. The method of manufacturing an interconnect substrate as defined in claim 1, wherein, in the step (c), the substrate is immersed in the second electroless plating solution in a state in which a surface of the first metal layer is exposed.

4. The method of manufacturing an interconnect substrate as defined in claim 1, wherein the first metal is nickel, and the second metal is copper.

5. The method of manufacturing an interconnect substrate as defined in claim 4, wherein the second electroless plating solution includes formalin as a reducing agent.

6. The method of manufacturing an interconnect substrate as defined in claim 4, wherein the catalyst layer includes palladium.

7. The method of manufacturing an interconnect substrate as defined in claim 6, further comprising: forming a surfactant layer on the substrate before the step (a).

8. The method of manufacturing an interconnect substrate as defined in claim 7, wherein the surfactant layer includes a cationic surfactant.

9. The method of manufacturing an interconnect substrate as defined in claim 4, wherein the step (c) is performed within a specific period after performing the step (b).

10. The method of manufacturing an interconnect substrate as defined in claim 1, further comprising: washing the substrate with water between the step (b) and the step (c).

11. The method of manufacturing an interconnect substrate as defined in claim 1, further comprising: forming a resist layer on the substrate in a region other than a region of a desired interconnect pattern before the step (a); andforming a surfactant layer on the substrate before the step (a),wherein the step (a) includes:forming a catalyst layer on the surfactant layer; andremoving the resist layer to remove the surfactant layer and the catalyst layer in the region other than the region of the desired interconnect pattern.