Methods and apparatus for stripping

TECHNICAL FIELD OF THE INVENTION

One or more embodiments of the present invention relate to method and apparatus that is useful for stripping applications (as used herein the term stripping includes photoresist removal, and cleaning processes such as, for example, residue removal) used to manufacture integrated circuit (“IC”) devices, including, without limitation, post-implant stripping, post-oxide-etch stripping, post-metal-etch stripping, post-low-k-etch stripping, post-polysilicon-etch stripping, and so forth. In addition, it should be understood that one or more embodiments of the present invention may also be used in areas of manufacturing that utilize IC manufacturing techniques, such as, for example, and without limitation, processing of organic-based substrates used in plastic light emitting diodes (“LEDs”), microfluidics, and optical devices.

BACKGROUND OF THE INVENTION

As a part of a traditional integrated circuit (“IC”) manufacturing process, various layers of dielectric, semiconducting, and conducting films (such as, for example, and without limitation, silicon dioxide, polysilicon, and metals, metal compounds and alloys) are deposited in layers on a wafer or substrate (such as, for example, and without limitation, a silicon substrate or a glass substrate). Features are then defined in these films by lithography and etching. To do this, the wafer is coated with a layer of resist (for example, and without limitation, a photoresist), the resist is patterned, and the pattern is transferred to underlying layers by etching—with the patterned resist layer serving as an etch mask. Many such etch processes leave resist and post-etch residues on the wafer or substrate that must be removed before the next processing step.

Some conventional photoresist stripping chambers utilize: (a) a remote plasma source, sometimes referred to as a downstream plasma source (typically, a microwave or an RF energy-based source) to generate a plasma (in an attempt to reduce damage to devices being fabricated on the wafer that might be caused by exposure of the wafer to ions and UV light generated by the plasma); and (b) a gas distribution system that includes: (i) quartz components, (ii) quartz liners to cover chamber surfaces (in an attempt to minimize a reduction of the concentration of radicals generated by the remote, or downstream, plasma source due to heterogeneous recombination on inner chamber surfaces), (iii) a pumping system to maintain a vacuum, and (iv) a high temperature wafer pedestal to generate pedestal temperatures that are typically in a range from about 150 to about 350° C.

Conventional photoresist stripping processes use O₂as a primary gas precursor with additives such as, for example, N₂, H₂O, NH₃, and a forming gas (for example, N₂/4% H₂) for strip rate enhancement, passivation, and residue removal and softening. In a typical stripping process, the chamber pressure is in a range from about 0.1 to about 10 Torr, and gas flow rates are in a range from about 0.5 to about 10 slm. With such O₂chemistries, the stripping process is thermally activated, and as a result, relatively high temperatures are required. This is problematic because high temperatures can “harden” etch residues, thereby increasing the difficulty of residue removal in either DI-H₂O (de-ionized water) or other solvents.

It is known to add fluorine containing gases such as, for example, CF₄and NF₃, to O₂gas precursor chemistries to provide a fluorine chemistry that reduces the thermal activation energy required for stripping processes. For example, the use of such a fluorine chemistry may: (a) reduce the thermal activation energy from a range from about 6 to about 12 kcal/mole to a range from about 0.5 to about 4 kcal/mole; and (b) enable stripping rates in a range from about 5000 to about 10,000 Å/min at temperatures below about 150° C. However, the use of a fluorine chemistry can have undesired side effects. For example, fluorine radicals (“F radicals”) generated by a remote, or downstream, plasma source can etch quartz components in a stripping chamber. In addition, F radicals can attack dielectric, semiconducting, and conducting films on the wafer, thereby reducing their selectivity relative to photoresist.

In addition to the above-described issues, during at least one type of implant process, a crust is formed on the surface of the photoresist, which crust is often described in the art as a carbonized layer. As is known, this crust is resistant to conventional stripping processes. To remove the crust, stripping might ordinarily occur at high temperature. However, as is known, this would be problematic since volatile solvents that are trapped beneath the crust layer might rupture the crust, thereby generating particles. Consequently, conventional post-implant stripping processes typically include multiple steps: (a) one or more steps directed to crust removal; (b) one or more steps directed to bulk photoresist stripping; and (c) one or more steps directed to residue removal. In accordance with such conventional post-implant stripping processes, the crust is removed at low temperatures accompanied by the use of an RF bias, or by the addition of fluorine containing gases. Although the addition of fluorine containing gases to oxygen based plasmas reduces the thermal activation energy required for stripping (see above), the selectivity of the stripping to oxide can be compromised. For example, the use of CF₄or NF₃, even at low temperatures, can lead to oxide etching and microloading (i.e., etching differences between densely and more sparsely populated features).

U.S. Pat. Nos. 5,795,831, 5,882,489, and 5,908,319 disclose photoresist stripping and cleaning apparatus that utilize reactive ion etching (“RIE”) processes in combination with microwave remote, or downstream, plasma sources, such apparatus having post-implant stripping as a primary application. In addition, these patents disclose stripping rates of about 2000 Å/min for a pure RIE mode with reasonable selectivity to oxide, and stripping rates of about 6000 Å/min for a dual power mode (use of RIE and a downstream plasma source) for 200 mm substrates. As a result, throughput is compromised due to these relatively low stripping rates.

U.S. Pat. Nos. 5,534,231, 5,811,022, and 6,143,129 disclose photoresist stripping and etching apparatuses that utilize a non-remote, inductively coupled plasma (“ICP”) source. These patents disclose different methods to reduce the ion density of the plasma above the wafer surface. In addition, U.S. Pat. No. 5,198,634 discloses a capacitively coupled, parallel plate reactor (wherein power is delivered to an upper electrode/showerhead) operating at relatively low energy/pressure ratios (E/P of <0.150 for E in watts/cm³and P in Torr) to minimize plasma damage, and still maintain reasonable stripping rates. The operating pressure disclosed is in a range from about 10 to about 50 Torr.

U.S. Pat. No. 6,203,657 B1 discloses an inductively coupled remote, or downstream, plasma source stripping chamber that is designed to maximize dissociation, and reduce the ion density in a remote source only mode. The patent also discloses the use of an RF-biasable chuck.

European Patent Number EP0942463A2 discloses an RIE process for stripping ion-implanted photoresist using a chemistry that includes H₂O, He, and CF₄, as well as O₂to minimize oxide loss. However, this patent discloses relatively low stripping rates of about 4400 Å/min at best. U.S. Pat. No. 5,209,803 discloses a parallel plate reactor with power delivery to an upper electrode, and a grounded grid inserted between the powered electrode and wafer to reduce ion bombardment.

A number of strip vendors, have developed multi-temperature stripping recipes for use in post-implant stripping that entail the use of lamps to heat the substrate, and stripping with conventional O₂/N₂chemistries after removing the crust layer with RF-bias at low temperatures. However, such recipes are problematic because the stripping chamber is complex, and hence, overall system reliability is compromised. In addition, throughput is reduced due to the transient heating time between low and high temperature steps. In further addition, system configurations having chambers dedicated to low temperature process steps, and chambers dedicated to high temperature process steps also suffer from throughput losses because of added overhead due to inter-chamber wafer transfers.

In light of the above, there is a need for method and apparatus that address one or more of the above-described problems.

SUMMARY OF THE INVENTION

One or more embodiments of the present invention advantageously solve one or more of the above-identified problems. In particular, one embodiment of the present invention is a stripping reactor that comprises: (a) a remote plasma source disposed to output a gas; (b) a gas distribution plate connected to ground that transmits the gas output from the remote plasma source to a processing chamber; (c) a wafer support disposed in the processing chamber; (d) a wafer support assembly disposed about the wafer pedestal that includes an outer conductive peripheral structure connected to ground; and (e) an RF power supply connected to supply RF power to the wafer support.

BRIEF DESCRIPTION OF THE FIGURE

FIG. 1 shows a pictorial representation of salient features of a stripping process apparatus that is fabricated in accordance with one or more embodiments of the present invention;

FIG. 2 shows a pictorial representation of a wafer holder and surrounding focus ring that is fabricated in accordance with one or more embodiments of the present invention;

FIG. 3 shows a pictorial representation of a stripping reactor having an exhaust system that includes a throttle valve and an isolation valve;

FIGS. 4 and 5 show pictorial representations of emission lines that can be used to determine a stripping process endpoint in accordance with one or more embodiments of the present invention;

FIG. 6 shows average stripping rates for a DUV photoresist as a function of RF bias power applied to a wafer support to generate a plasma in the processing chamber of the stripping reactor for different conditions: (a) RF bias power applied alone; (b) RF bias power applied to the wafer support to generate a plasma in the processing chamber, and power applied to the remote plasma source to generate a plasma therein (a dual plasma mode); and (c) the dual plasma mode with higher gas flows than those used for (b);

FIG. 7 shows time-varying optical emission spectra for ion-enhanced photoresist stripping of a 1.2 micron DUV blanket resist on a Si substrate in accordance with one or more embodiments of the present invention where an O radical peak is reduced in intensity during photoresist stripping while an O₂⁺ ion peak remains relatively constant;

FIG. 8. shows an endpoint trace for O radical species during a dual plasma mode stripping process on an 80 keV, 5E15 dose, As-implanted, 1.2 micron DUV blanket photoresist wafer; and

FIG. 9. shows a more detailed pictorial representation of certain aspects of the stripping process apparatus shown in FIG. 1.

DETAILED DESCRIPTION

Advantageously, one or more embodiments of the present invention enable stripping process applications (as used herein the term stripping includes photoresist removal, and cleaning processes such as, for example, residue removal) such as, for example, and without limitation, post-implant stripping, post-oxide-etch stripping, post-metal-etch stripping, post low-k-etch stripping, post-polysilicon-etch stripping, and so forth. In addition, it should be understood that one or more embodiments of the present invention may also be used in areas of manufacturing that utilize integrated circuit (“IC”) manufacturing techniques, such as, for example, and without limitation, processing of organic-based substrates used in plastic light emitting diodes (“LEDs”), microfluidics, and optical devices.

Stripping Reactor

A stripping reactor fabricated in accordance with one or more embodiments of the present invention includes a remote, or downstream, plasma source (for example, a microwave plasma source or an inductively coupled, toroidal, RF plasma source) to generate radicals for stripping. In accordance with one or more further embodiments of the present invention, the stripping reactor further includes an RF power supply that supplies RF bias power to a wafer pedestal to generate a plasma in a processing chamber of the reactor (and produce ion bombardment thereby) to enhance the stripping rates obtained by use of radicals generated by the remote plasma source alone. In accordance with one or more still further embodiments of the present invention, the stripping reactor further includes one or more of: (a) a gas distribution plate connected to ground (for example, and without limitation, a conductive gas distribution plate); (b) a wafer support assembly (for example, and without limitation, a focus ring assembly) disposed about a perimeter of the wafer support, which wafer support assembly is comprised of an insulating or non-conducting peripheral structure (for example, and without limitation, a ring) and an outer conducting peripheral structure (for example, and without limitation, a ring) that is electrically connected to a grounded chamber body; and (c) an internal chamber configuration having a relatively narrow gap between the gas distribution plate and the wafer pedestal.

As will be described in more detail below, one or more of such embodiments provide several advantages over stripping reactors found in the prior art. First, it is believed that the wafer support assembly, the grounded chamber body, and the grounded gas distribution plate create a capacitively coupled plasma apparatus having a large ratio of anode area to cathode area that provides increased ion bombardment on a wafer for a given amount of applied RF power. Advantageously, this enables the stripping reactor to obtain relatively high stripping rates at relatively low temperatures. Second, it is believed that the grounded gas distribution plate and the relatively narrow gap produce a substantially uniform plasma in the processing chamber of the stripping reactor. Advantageously, this uniform plasma mitigates device damage on the wafer. Third, it is believed that the large area ratio also reduces sputtering from the gas distribution plate. Advantageously, this enables the use of, for example, and without limitation, an aluminum gas distribution plate without causing excessive contamination on the wafer.

FIG. 1 shows a pictorial representation of salient features of stripping process apparatus or reactor 1000 that is fabricated in accordance with one or more embodiments of the present invention. As shown in FIG. 1, stripping reactor 1000 comprises remote plasma source 100 which is an RF inductively-coupled, toroidal plasma source. As shown in FIG. 1, precursor gases are input through entrance orifice 110 into tube 120 having a toroidal geometry. Tube 120 is surrounded by ferrite core 130, and wires 140 surround at least a portion of ferrite core 130. RF energy supplied by RF power supply 150 is inductively coupled to precursor gases flowing into and through tube 120 to generate a plasma therein. Advantageously, the toroidal geometry of tube 120 physically confines the plasma, efficiently generates radical species, and enhances dissociation of precursor gases. It is also believed that use of the toroidal geometry lowers the electron temperature of the plasma formed within source 100.

In accordance with one or more such embodiments, tube 120 is a metal tube that is cooled, for example, by flowing water therethrough (alternatively, tube 120 may be fabricated from a dielectric material such as, for example, and without limitation, a ceramic material). In accordance with one or more further such embodiments, tube 120 includes at least one dielectric region that electrically isolates a portion of tube 120 so that electrical continuity through tube 120 is broken. In accordance with one or more still further such embodiments, the inside of tube 120 is lined with a ceramic material or quartz. Appropriate liners can be chosen in accordance with any one of a number of methods that are well known to those of ordinary skill in the art to minimize recombination losses of desired species such as radicals for particular applications. In accordance with one or more still further such embodiments, power supply 150 is a high frequency, tunable power supply that enables dissociation of oxidizing, reducing, and/or fluorinating gases (in accordance with one such embodiment power supply 190 has a fixed impedance and variable frequency, for example, a frequency that is variable over a range from about 200 to about 600 kHz). Note that one or more further embodiments of the present invention exist wherein remote plasma source 100 is a remote microwave plasma source. However, it has been discovered that for stripping processes wherein only remote plasma source 100 is utilized, stripping rates obtained utilizing a remote inductively coupled plasma source as a function of power can be up to 1.5 to 2 times higher than stripping rates obtained utilizing a remote microwave plasma source. It is believed that this result is due to a higher efficiency of producing radicals for a remote inductively coupled plasma source when compared to that of a remote microwave plasma source.

Plasma species generated in tube 120 flow through exit tube 163, and enter gas distribution plenum 160 through orifice 165. It should be noted that although remote plasma source 100 is shown in FIG. 1 to be mounted directly above gas distribution plenum 160, further embodiments of the present invention exist wherein remote plasma source 100 is mounted in other configurations (for example, and without limitation, alongside stripping chamber 190), and wherein gas flows from the remote plasma source into a side-feed gas distribution ring, which side-feed gas distribution ring transfers the gas, in turn, into gas distribution plenum 160.

In accordance with one or more embodiments of the present invention, one or both of exit tube 163 and gas distribution plenum 160 may include liners. For example, as shown in FIG. 1, exit tube 163 and gas distribution plenum 160 include liners 170. Liners 170 are chosen, for example, to reduce recombination of at least desired ones of the plasma species generated by remote plasma source 100 such as, for example, radicals. In accordance with one or more such embodiments of the present invention, liners 170 are quartz liners.

As further shown in FIG. 1, gas distribution plate 180 forms a bottom portion of gas distribution plenum 160. In accordance with one or more embodiments of the present invention, gas distribution plate 180 is fabricated from a conductive material such as, for example, and without limitation, aluminum. In accordance with one or further embodiments of the present invention, gas distribution plate 180 is a perforated plate or showerhead, and as such, advantageously provides good flow uniformity of gas into processing chamber 190.

In accordance with one or more embodiments of the present invention, a distance between orifice 165 of remote plasma source 100 and gas distribution plate 180 can be optimized (routinely without undue experimentation by one of ordinary skill in the art) to compensate for competing effects of bulk residence time and surface to volume ratio of gas distribution plenum 160. In particular, specific dimensions utilized for a particular stripping application, or specific dimensions utilized for a set of particular stripping applications, may depend on one or more of the following: the chemistry used for the particular stripping application, process conditions, and the chamber materials of gas distribution plenum 160. For example, typical dimensions for a 300 mm stripping chamber include: (a) a width of gas distribution plenum 160 of about 300 mm, and (b) a distance between orifice 165 and gas distribution plate 180 in a range from about 0.5 to about 2.0 inches, and preferably in a range from about 0.75 to about 1.0 inch.

As further shown in FIG. 1, stripping reactor 1000 includes wafer pedestal 200. As will described below, various embodiments of stripping reactor 1000 include wafer pedestal 200 being fabricated in accordance with various aspects of the present invention. For example, a first aspect of the present invention utilizes one or more embodiments of wafer pedestal 200 that are useful for biasable, low temperature applications (a “biasable, low-T chuck”). In this context, the term low temperature refers to temperatures below about 150° C. A second aspect of the present invention utilizes one or more embodiments of wafer pedestal 200 that are useful for biasable, low temperature, electrostatic chuck (“ESC”) applications (a “biasable, low-T, ESC chuck”). A third aspect of the present invention utilizes one or more embodiments of wafer pedestal 200 that are useful for high temperature applications (a “high-T chuck”). In this context, the term high temperature refers to temperatures in a range from about 150° C. to about 450° C. A fourth aspect of the present invention utilizes one or more embodiments of wafer pedestal 200 that are useful for biasable, high-temperature applications (a “biasable, high-T chuck”). As will be described below, one or more of embodiments of the present invention may be fabricated utilizing one or more embodiments of the various aspects of the present invention to address requirements of particular stripping applications.

Wafer pedestal 200 shown in FIG. 1 is fabricated in accordance with an embodiment of a “biasable, low-T chuck.” As shown in FIG. 1, wafer support 203 is fabricated in accordance with any one of a number of methods that are well known to those of ordinary skill in the art from, for example, and without limitation, aluminum with an Al₂O₃top surface (for example, an anodized aluminum top surface) upon which wafer 300 rests. As further shown in FIG. 1, wafer support 203 rests upon support 212 that may be fabricated, for example, and without limitation, from Al₂O₃. As further shown in FIG. 1, cathode assembly 205 is fabricated from a conductive material such as, for example, and without limitation, from aluminum, and couples power between RF bias power source 210 and wafer support 203. RF bias power source 210 supplies power at a frequency in a range from about 1 MHz to about 100 MHz, and preferably, for example, and without limitation, at a frequency equal to about 13.56 MHz (in accordance with one embodiment of the present invention, power source 210 outputs power substantially at a fixed frequency, and includes a variable impedance match that may be fabricated in accordance with any one of a number of methods that are well known to those of ordinary skill in the art). Wafer pedestal 203 further includes channels (not shown) through which a heat exchange fluid flows to a heat exchanger that is fabricated in accordance with any one of a number of methods that are well known to those of ordinary skill in the art to control the temperature of wafer support 203. In accordance with such embodiments, when RF bias power is supplied to cathode assembly 205 from RF bias power source 210, among other things, a self-chucking action is generated which acts to hold wafer 300 to wafer support 203.

Whenever wafer pedestal 200 is fabricated in accordance with an embodiment of a “biasable, low-T, ESC,” in addition to the mechanisms described above with respect to the biasable, low-T chuck, wafer pedestal 200 would further include: (a) an electrostatic chucking mechanism that is fabricated in accordance with any one of a number of methods that are well known to those of ordinary skill in the art; and (b) a wafer backside cooling mechanism that is fabricated in accordance with any one of a number of methods that are well known to those of ordinary skill in the art. In particular, the ESC may be a monopolar or a bipolar ESC that are well known to those of ordinary skill in the art. In further particular, the wafer backside cooling mechanism can flow a heat transfer gas, for example, and without limitation, helium, across the backside of wafer 300. Such flow of heat transfer gas can take place in accordance with one or methods that are well known to those of ordinary skill in the art in one or more zones at pressures in such one or more zones in a range, for example, and without limitation, from about 2 Torr to about 16 Torr. Advantageously, the ESC may be utilized to provide better control of wafer temperature uniformity, and to avoid temperature runaway due to potentially high thermal loads during particular stripping applications.

Whenever wafer pedestal 200 is fabricated in accordance with an embodiment of a “biasable, high-T chuck,” in addition to the mechanisms described above with respect to the biasable, low-T chuck, wafer pedestal 200 would further include a heater such as, for example, and without limitation, a resistive heater that is fabricated in accordance with any one of a number of method that are well known to those of ordinary skill in the art. In particular, a resistive heating element would be included within wafer support 203 in accordance with any one of a number of methods that are well known to those of ordinary skill in the art, and such element would be powered by a power supply. Further, as was described above with respect to a biasable, low-T chuck, the high-T chuck would include channels through which a heat exchanger fluid would flow to a heat exchanger to help control the temperature in conjunction with feedback information from temperature measurement devices in a manner that is well known to those of ordinary skill in the art. For example, in accordance with one or more embodiments, temperature measurement devices such as thermocouples would be used in accordance with any one of a number of methods that are well known to those of ordinary skill in the art to measure the temperature of a surface of wafer support 203. Alternatively, the temperature measurement devices could measure the temperature of the heat exchange fluid.

Whenever wafer pedestal 200 is fabricated in accordance with an embodiment of a “high-T chuck,” one would utilize an embodiment of a biasable, high-T chuck without RF power supply 210. Accordingly, for such an embodiment, wafer support 203 need not be fabricated from a conductive material. However, if wafer support 203 is not fabricated from a conductive material, the material must still have sufficient thermal conductivity to enable the temperature of wafer 300 to be maintained in the desired range.

In accordance with one or more embodiments of the present invention, wafer pedestal 200 is fixed in position. In accordance with one or more such embodiments, pins that can be extended through wafer pedestal 200 are used in a conventional manner to enable wafer 300 to be transferred from a robot arm that is moved into chamber 190 through an opening in chamber wall 195. As is known, wafer 300 is moved into chamber 190 by the robot arm, the pins are extended to lift wafer 300 from the robot arm, the robot arm is withdrawn from chamber 190, and the pins are retracted so that wafer 300 is brought to rest on wafer support 203. Wafer 300 is similarly removed from chamber 190 after processing is complete. In accordance with one or more further embodiments of the present invention, wafer pedestal 200 may be moved, for example, in a vertical direction, in a conventional manner to change a distance between wafer 300 disposed on wafer pedestal 200 and gas distribution plate 180. In accordance with such further embodiments, pins may also be used to enable wafer 300 to be transferred from, or to, a robot arm that is inserted into and taken out of chamber 190.

In accordance with one or more embodiments of the present invention, a plasma is generated in chamber 190 to enhance stripping rates over those obtained by use of remote plasma source 100 alone. In particular, the plasma is generated by applying RF power to an embodiment of wafer pedestal 200 that is biasable. In accordance with one or more of such embodiments, reactor 1000 provides a substantially uniform plasma by including one or more of the following: (a) a wafer support assembly that includes a conductive peripheral structure (for example, and without limitation, a ring), which conductive peripheral structure is grounded; (b) a DC grounded gas distribution plate (advantageously, a DC grounded gas distribution plate creates a uniform plasma since there is a uniform grounding plane above wafer 300); (c) a grounded chamber body 195; and (d) a relatively narrow gap, for example, and without limitation, in a range from about 0.5 to about 3 inches between wafer 300 or the top of wafer support 203 and gas distribution plate 180.

It is believed that the above-described features enable a substantially uniform plasma to be generated in chamber 190 that is effective in enhancing stripping rates over those obtained by use of remote plasma source 100 alone for the following reasons. First, it is believed that the wafer support assembly, the grounded chamber body and the grounded gas distribution plate create a capacitively coupled plasma apparatus having a large ratio of anode area to cathode area. As is known, a large ratio of anode area to cathode area increases ion bombardment to wafer 300 for a given amount of applied bias power. Second, it is believed that the relatively narrow gap provides an approximation of the anode as an infinite plane, and as such, leads to a uniform plasma. It has been determined that if the gap is too small for a particular application, the plasma becomes unstable, whereas if the gap is too large, there is no stripping rate enhancement over that obtained by use of remote plasma source 100 alone. Thus, the size of the gap may be adjusted routinely without undue experimentation by one of ordinary skill in the art to optimize its effect on reactor performance for a particular application. Third, it is believed that the grounded gas distribution plate provides a uniform grounding plane above the wafer, and thereby, enhances the uniformity of the plasma.

In addition to the above-described advantages, it is believed that embodiments of the present invention that provide a large ratio of anode area to cathode area substantially reduce sputtering from gas distribution plate 180, and it is believed that this has a doubly beneficial effect. First, it is believed that such reduced sputtering may reduce the generation of contaminants from gas distribution plate 180, and second, it is believed that such reduced sputtering may reduce surface recombination at the orifices of gas distribution plate 180. Advantageously, as a result, and in contrast to prior art apparatus, such embodiments of the present invention enable aluminum to be used to fabricate gas distribution plate 180 without wafer contamination resulting from sputtered aluminum, and without excess recombination. In addition, in accordance with one or more embodiments of the present invention, gas distribution plate 180 may be fabricated as a SiC gas distribution plate to produce a gas distribution plate that will produce ultra-low levels of contamination. In accordance with one or more of such embodiments, gas distribution plate 180 may be fabricated as a SiC gas distribution plate having an annulus of a sputtered conductive material such as, for example, and without limitation, aluminum or titanium, to reduce electrical contact resistance to SiC.

Advantageously, in accordance with one or more embodiments of the present invention, the use of liners 170, at least in gas distribution plenum 160, provides that gas species entering chamber 190 through gas distribution plate 180 are substantially all radicals (neutral species), i.e., there are substantially no ions entering chamber 190. As a result, in accordance with one or more embodiments of the present invention, ion concentration uniformity in the plasma is controlled solely by the application of RF bias power to wafer pedestal 200.

As set forth above, such embodiments provide a substantially uniform plasma that minimizes device damage on the wafer (it is believed that device damage is caused by currents flowing through devices on the wafer, and non-uniform charge build-up on a wafer caused by non-uniform plasmas produce such currents). In addition, the above-described benefits of embodiments utilizing a grounded gas distribution plate (namely, uniform plasma and large ratio of anode area to cathode area) are achieved without certain detriments of using aluminum or SiC to fabricate the gas distribution plate (as described above, such pitfalls being low strip rates due to high radical surface recombination of aluminum relative to quartz, and aluminum contamination).

Referring back to FIG. 1, wafer support 203 is surrounded by wafer support (or pedestal) focus ring assembly 211 that includes: (a) dielectric peripheral structure 207 that is supported by wafer support 203; and (b) conductive peripheral structure 209 that is supported by dielectric peripheral structure 207. Further, as shown in FIG. 1, conductive peripheral structure 209 is electrically connected to grounded chamber body 195. FIG. 2 shows a pictorial representation of wafer holder 200 and surrounding focus ring 211 that is fabricated in accordance with one or more embodiments of the present invention.

As shown in FIG. 2, dielectric peripheral structure 207 surrounds wafer support 203, and provides a dielectric break between wafer support 203 and conductive peripheral structure 209. In accordance with one such embodiment, structure 207 is fabricated for example, and without limitation, of quartz. Note that structure 207 may be exposed to ion bombardment, and as such (given the proximity of structure 207 to the wafer's edge), ought to be fabricated from materials that, if sputtered, do not contaminate the wafer. Further, in accordance with one such embodiment, structure 209 is fabricated for example, and without limitation, of aluminum or titanium.

As further shown in FIG. 2, when structure 207 is installed for use, leg 207₁of structure 207 rests upon a ledge formed in wafer support 203, leg 207₂of structure 207 is a vertically extending lip that acts to confine and center wafer 300 on wafer pedestal 200, and leg 207₃of structure 207 supports conductive structure 209. For purposes of understanding the design of structure 207, assume that wafer 300 is centered on wafer pedestal 203. In this configuration, an annular space separates an edge of wafer 300 and leg 207₂of structure 207. This annular space provides a predetermined tolerance for positioning wafer 300 on wafer pedestal 203. If the annular space is too small, or if the annular space is too large, the plasma may not be uniform at the edge of wafer 300. Further, leg 207₂must be sufficiently high so that leg 207₂can contain wafer 300, while not being so high as to create plasma non-uniformities at the edge of wafer 300. Appropriate dimensions for structure 207 can be determined routinely without undue experimentation by one of ordinary skill in the art in light of these considerations.

As further shown in FIG. 2, when structure 209 is installed for use, leg 209₁of structure 209 rests upon leg 207₂of structure 207, and leg 209₂of structure 209 extends toward chamber wall 195. In addition, in use, leg 209₂of structure 209 is electrically connected to chamber wall 195. A gap between leg 209₂of structure 209 and chamber wall 195 provides a conduit for gases to be evacuated from chamber 190 by an exhaust pump (not shown). As such, the size of the gap is determined by the following considerations. If the gap is too small, conductance through the gap may be too small for gas flow to be in a reasonably wide range of values, and this in turn, may limit the pressure to be in an undesirably small range of pressures values. On the other hand, if the gap is too large, pumping uniformity may be compromised, and this in turn, may impact plasma uniformity.

In accordance with one or more further embodiments of the present invention, wafer pedestal focus ring assembly 211 comprises three structures: (a) an inner, electrically conductive peripheral structure that rests on wafer support 203 (fabricated for example, and without limitation, of aluminum), and that acts to extend the effective area of wafer support 203 to provide plasma uniformity at the edge of the wafer; (b) an intermediate, non-conductive ring (fabricated for example, and without limitation, of quartz); and (c) an outer, electrically conductive ring (fabricated for example, and without limitation, of aluminum). In use, the outer, electrically conductive ring is electrically connected to chamber wall 195. In one or more of such further embodiments, the intermediate non-conductive ring may be fabricated with a vertical leg like that of leg 207₂of structure 207 to capture and center wafer 300. In a further alternative embodiment of the present invention, the inner electrically conductive peripheral structure may be fabricated as a part of wafer support 203.

Advantageously, in accordance with one or more embodiments of the present invention, conductive peripheral structure 209 which is electrically connected to grounded chamber wall 195, and which surrounds the outer perimeter of wafer 300, adds significantly to the effective anode grounded area of the capacitively-coupled plasma reactor fabricated in accordance with one or more embodiments of the present invention. In particular, the effective anode grounded area is the sum of the grounded areas that are directly exposed to the plasma. These areas include: (a) gas distribution plate 180 (having an area equal to about 1 to about 2 times the area of a wafer); (b) grounded conductive peripheral structure 209 (having an area equal to about the area of the wafer); and (c) chamber wall 195 between wafer 300 and gas distribution plate 180 (having an area equal to about the area of the wafer). The cathode area is equal to about the area of the wafer. Thus, the overall ratio of the anode area to the cathode area is in a range from about 4:1 to about 5:1. As is known, experimentally, the voltage drop of the cathode to the anode (i.e., the D.C. bias which accelerates ions, or the potential between the plasma and the cathode) scales with the ratio of anode area to cathode area to about at least the 2.5 power. Thus, for one or more embodiments of the present invention, the D.C. bias scales in a range from about 32:1 to about 56:1. As a result, for a given applied RF bias power, most of the usable power is used to maximize ion bombardment on the wafer. Advantageously, this maximizes the stripping rate, and minimizes sputtering of grounded material, which in turn, minimizes contamination.

It has been discovered that the geometry of processing chamber 190 affects the characteristics of plasmas formed therein such as plasma uniformity at the surface of the wafer, as well as stripping rates. In particular, among other things, it has been discovered that use of a conventional slit-valve cut-out (as is well known, a slit-valve cut-out is an aperture that is cut into chamber wall 195 through which wafers are transferred into, and out of, processing chamber 190 from a transfer chamber) resulted in an image of the slit-valve cut-out being reflected on the wafer. In accordance with one or more embodiments of the present invention, this issue is addressed by use of an inner slit-valve door that minimizes plasma and flow non-uniformity induced by asymmetries of chamber body 190 resulting from the use of a slit valve cut-out. In accordance with one or more such embodiments of the present invention, processing chamber 195 includes inner slit-valve door 217 (the chamber also includes a conventional slit valve that is disposed in the transfer chamber side of chamber wall 195). In operation, whenever a wafer is to be inserted into processing chamber 190 through a slit-valve cut-out in chamber wall 195, inner slit-valve door 217 is moved below the wafer plane by a motor (not shown). After the transfer robot arm is removed from processing chamber 190, and the wafer is positioned on wafer pedestal 203, inner slit-valve door 217 is raised to enclose the slit-valve cut-out, and thereby, to provide symmetrical chamber walls relative to the wafer plane. Advantageously, this provides a 360° symmetrical plasma environment.

In accordance with one or more embodiments of the present invention, wafers are transferred into and out of stripping reactor 1000 at atmospheric pressure. As a result, after a wafer has been processed, processing chamber 190 has to be vented to atmospheric pressure. This means that a sufficient amount of gas, for example, and without limitation, N₂, has to be pumped into processing chamber 190 so that the pressure rises to atmospheric pressure. In order that throughput not be impacted adversely, this venting operation needs to take place as quickly as possible. It has been discovered that venting is inhibited by the size of the vent line, i.e., a line connecting a gas supply to processing chamber 190. The inhibition is caused by the fact that a standard sized vent line rapidly becomes depleted of gas, and in order for venting to take place in a time that does not impact processing throughput, the vent line is required to be impractically large. This problem has been solved by a venting mechanism that is fabricated in accordance with one or more embodiments of the present invention. In particular, a gas accumulator, i.e., a large vessel is located near reactor 1000, which vessel is of sufficient size to provide a mass of gas that is sufficient to vent processing chamber 190 in a predetermined amount of time. In use, during a venting operation, the gas in the gas accumulator is depleted. However, the time taken by subsequent processing steps (i.e., transfer of the processed wafer out of processing chamber 190, transfer of a new wafer into processing chamber 190, pumping processing chamber 190 down to a processing pressure, and processing the new wafer) provides a sufficient amount of time to replenish the gas in the gas accumulator without impacting throughput. In accordance with one or more further such embodiments of the present invention, the volume of the gas accumulator can be made much smaller than the volume of processing chamber 190 by increasing the pressure of the gas contained therein. Appropriate volumes for the gas accumulator, pressures for gas stored therein, and distance of the gas accumulator from processing chamber 190 can be determined routinely by one or ordinary skill in the art without undue experimentation. In particular, it has been determined that a gas accumulator having a volume in a range from about 1 L to about 10 L and a back pressure in a range from about 30 psig to about 100 psig is useful for typical stripping applications.

In addition to above-described venting issue caused by the need to accommodate an atmospheric wafer transfer system, another issue arises because pumping and venting must be controlled to avoid particle deposition on the wafer. In particular, venting to atmosphere to remove a wafer from processing chamber 190 must be controlled to avoid particle deposition on the wafer. FIG. 3 shows a pictorial representation of stripping reactor 1000 having an exhaust system that includes throttle valve 400 and isolation valve 410 (“iso-valve 410”). A conventional venting sequence for venting with good particle control is a “dual slow-to-fast” venting sequence. In accordance with this conventional venting sequence, throttle valve 400 and iso-valve 410 are closed, and processing chamber 190 is immediately vented with, for example, N₂. One problem with this conventional venting sequence is that the largest flow rate for a fast vent with adequate particle control is typically about 1 standard liter per second. However, for a typical 300 mm chamber, the chamber volume is in a range from about 15 to about 40 liters, so that the best case vent times using the conventional dual slow-to-fast method is limited to a range from about 15 to about 40 seconds. This may be unacceptable for typical stripping application throughput requirements. An alternative conventional method for venting utilizes a nickel diffuser that has a vent time of up to about 5 liters per second. However, this is undesirable since nickel is a potentially undesirable contaminant. Thus, in accordance with one or more embodiments of the present invention, throttle valve 400 is used to control the effect of flow inertia, which effect is believed to cause particle deposition. In accordance with one or more such embodiments of the present invention, during wafer processing, iso-valve 410 is open, and throttle valve 400 (which can have a variable open area) is used to control the pressure in processing chamber 190. It should be understood that control of throttle valve 400 and iso-valve 410 is accomplished by a system controller (not shown) using software that is generated in accordance with any one of a number of methods that are well known to those of ordinary skill in the art. At the end of the wafer processing sequence of steps, a venting gas, for example, and without limitation, N₂, is injected into processing chamber 190 from a gas accumulator 400 with throttle valve 400 fully open to establish a pseudo-steady state. Then, in accordance with this embodiment, throttle valve 400 is gradually shut, and finally, isovalve 430 is shut to maintain a mass barrier between processing chamber 190 and a vacuum pump (not shown). It is believed that by venting in this manner rather than immediately shutting off throttle valve 400 and iso-valve 410 in accordance with the conventional method, flow inertia is minimized. Advantageously, this enables better particle control, and faster vent times. In addition, in accordance with one or more further embodiments of the present invention, multiple gas injectors into processing chamber 190 can be used to reduce vent times even further. In accordance with one or more such further embodiments of the present invention, there may be two vent locations, a primary one being at a top of remote plasma source 100 shown in FIG. 1, and a secondary one at a bottom of processing chamber 190. Advantageously, in accordance with these embodiments, remote plasma source 100 is used as a natural baffle to establish laminar flow. In accordance with further such embodiments, the flow through the secondary vent is kept much lower than that through the primary vent to avoid excessive upward flow inertia which might deposit particles on the wafer. It is believed that such embodiments might achieve vent times as short as ten (10) seconds.

In accordance with one or more embodiments of the present invention, an endpoint detector is utilized to determine a stripping process endpoint. In accordance with one or more such embodiments, a portion of radiation generated in processing chamber 190 is collected by photodiode assemblies mounted against, for example, and without limitation, sapphire or quartz windows in chamber wall 195 of processing chamber 190. The photodiode assemblies may comprise bandpass filters for radiation at predetermined wavelengths and photodiodes sensitive to such radiation. In accordance with one or more alternative embodiments of the present invention, a portion of the radiation emitted in processing chamber 190 may be collected by one or more optical fibers, and output from the one or more optical fibers may be directed to, for example, a spectrometer. In accordance with one or more embodiments of the present invention, the spectrometer may include, for example, and without limitation, a grating that separates radiation at various wavelengths and directs such radiation to impinge upon one or more photodetectors that are may be disposed, for example, in a line to spatially resolve radiation at one or more predetermined wavelengths in accordance with any one of a number of methods that are well known to those of ordinary skill in the art (in accordance with such embodiments, the photodiodes may be sensitive to each of the one or more predetermined wavelengths). Output from the photodetectors is examined in accordance with any one of a number of methods that are well known to those of ordinary skill in the art to determine a stripping process endpoint. FIGS. 4 and 5 show pictorial representations of emission lines that can be used to determine a stripping process endpoint in accordance with one or more embodiments of the present invention. FIG. 4 shows a representation of the intensity of the 777 nm emission line from oxygen that can be monitored to determine a stripping process endpoint. As shown in FIG. 4, region 500 corresponds to a portion of the stripping process wherein photoresist is being removed from the wafer. Region 510 shown in FIG. 4 corresponds to a time when the photoresist has been cleared. The regions can be identified by analyzing the curve shown in FIG. 4, or by analyzing a derivative of this curve in accordance with any one of a number of methods that are well known to those of ordinary skill in the art. FIG. 5 shows a representation of the intensity of the 656 nm emission line from hydrogen that can be monitored to determine a stripping process endpoint. As shown in FIG. 5, region 520 corresponds to a portion of the stripping process wherein photoresist is being removed from the wafer. Region 530 shown in FIG. 5 corresponds to a time when the photoresist has been cleared. The regions can be identified by analyzing the curve shown in FIG. 5, or by analyzing a derivative of this curve in accordance with any one of a number of methods that are well known to those of ordinary skill in the art.

FIG. 9. shows a more detailed pictorial representation of certain aspects of stripping process apparatus or reactor 1000 shown in FIG. 1. As shown in FIG. 9, stripping reactor 1000 comprises remote plasma source 100. Plasma species generated in remote plasma source 100 flow through exit tube 163 into gas distribution plenum 160. As further shown in FIG. 9, gas distribution plenum liner 170 is extended into processing chamber 190 to form chamber liner portions 170₁and 170₂. As further shown in FIG. 9, endpoint detector port 1100 enables radiation to be observed by endpoint detectors disposed outside chamber walls 195 (for example, and without limitation, fabricated from aluminum), and slit-valve cut-out 1110 enables wafers to be transferred into and out of processing chamber 190 from a transfer chamber (not shown). As further shown in FIG. 9, inner slit-valve door 217 (for example, and without limitation, fabricated from aluminum) is moved by motor 1217 to enclose slit-valve cut-out 1110 to provide symmetrical chamber walls relative to the wafer plane.

As further shown in FIG. 9, wafer support 203 (for example, and without limitation, fabricated from aluminum) includes channels 1200 to enable flow of heat exchange fluid (for example, and without limitation, water) therethrough. The heat exchange fluid flows into channels 1200 through inlet piping 1210 (outlet piping through which the heat exchange fluid flows out of channels 1200 is not shown). As further shown in FIG. 9, lift pin 1250 (for example, and without limitation, fabricated from alumina) is representative of a multiplicity of lift pins that extend through lift pin guides (for example, and without limitation, fabricated from Vespel™) in wafer support 203 (not shown) in a conventional manner. Lift pin 1250 rides on ring 1260 that is raised and lowered by bellows 1270 in a conventional manner to lift wafers off, and to place wafers onto, a robot arm inserted through slit-valve cut-out 1110 from the transfer chamber. As further shown in FIG. 9, electrical connector 1280 provides electrical contact between wafer support 203 and RF bias power supply 210.

As further shown in FIG. 9, dielectric peripheral structure 207 (for example, and without limitation, fabricated from fused quartz) is supported by wafer support 203, and conductive peripheral support 209 (for example, and without limitation, fabricated from aluminum) is supported by dielectric peripheral structure 207. As further shown in FIG. 9, conductive peripheral structure 209 is electrically connected to grounded chamber body 195 by ground structures 1310 and 1320 (for example, and without limitation, fabricated from aluminum). As further shown in FIG. 9, wafer support 203 is surrounded by insulator ring 1340 (for example, and without limitation, fabricated from fused quartz), and wafer support 203 rests on insulator base 1330 (for example, and without limitation, fabricated from alumina).

As those of ordinary skill in the art can readily appreciate, various conventional components have not been described to enable one to better understand the present invention. For example, as those of ordinary skill in the art can readily appreciation, various O-rings are provided to maintain chamber vacuum against atmospheric pressure caused by various of the above-described connections to processing chamber 190. In addition, various assembly guides are provided in accordance with any one of a number of methods that are well known to those of ordinary skill in the art to enable assembly of the components for manufacture and for repair.

Low Temperature Stripping Process Conditions

As one can readily appreciate, the above-described stripping reactor can be used in many stripping applications. One or more embodiments of the present invention include power being applied to remote plasma source 100 to create a plasma only therein; one or more embodiments of the present invention include RF bias power being applied to wafer support 203 to create a plasma only in processing chamber 190 of stripping reactor 1000; and one or more embodiments of the present invention (a dual mode embodiment) include RF bias power being applied to wafer support 203 to create a plasma in processing chamber 190 of stripping reactor 1000, and power being applied to remote plasma source 100 to generate a plasma therein. It has been determined that for stripping applications that utilize remote plasma source 100 alone, stripping uniformity is sensitive to flow rates (and, therefore to the hole pattern in gas distribution plate 180), whereas for stripping application that utilize RF bias power alone to generate a plasma in processing chamber 190, stripping uniformity is less sensitive to flow rates, but it is sensitive to plasma uniformity (and therefore to uniformity of processing chamber geometry).

In accordance with one or more embodiments of the present invention, stripping applications can be carried out utilizing an oxidizing precursor gas, for example, and without limitation, O₂, at a flow rate into remote plasma source 100 in a range from about 100 to about 10,000 sccm, and preferably, in a range from about 500 to about 2000 sccm. In accordance with one or more such embodiments, power is applied to remote plasma source 100 in a range from about 600 to about 6000 W, and preferably, in a range from about 3000 to about 5000 W. In accordance with one or more such embodiments, pressure in process chamber 190 is maintained in a range from about 0.3 to about 3 Torr, and preferably, in a range from about 0.4 to about 1 Torr. In accordance with one or more such embodiments, for low temperature stripping applications, the temperature of wafer support 203 is maintained in a range from about 15 to about 100° C., and preferably, in a range from about 40 to about 80° C. In accordance with one or more further such embodiments, other useful oxidizing precursor gases include O₃, N₂O, H₂O, CO, CO₂, alcohols, and any combinations of these gases. In accordance with one or more such embodiments, to generate a plasma in processing chamber 190, RF bias power may be applied to wafer support 203 in a range from about 100 to 2000 W, and preferably, in a range from about 500 to about 1000 W. In accordance with one or more further such embodiments, other useful oxidizing precursor gases include O₃, N₂O, H₂O, CO, CO₂, alcohols, and any combinations of these gases. In accordance with one or more yet further such embodiments, optional additional precursor gases include gases such as, for example, and without limitation, N₂, H₂O, H₂, forming gas, NH₃, CH₄, C₂H₆, and halogenated compounds such as, for example, and without limitation, CF₄, C₂F₆, C₃F₈, C₄F₈, CH₃F, CHF₃, CH₂F₂, NF₃, and any combinations of the above gases in amounts in a range from about 0.1 to about 10%.

FIG. 6 shows stripping rates obtained for a DUV photoresist as a function of RF bias power being applied to wafer support 203 to create a plasma in processing chamber 190 of stripping reactor 1000 for different conditions at low temperature: (a) RF bias power applied alone; (b) a dual plasma mode; and (c) a dual plasma mode with higher gas flows than those used for (b). As shown in FIG. 6, photoresist removal, or stripping, rates, as high as 12,000 Å/min have been achieved on 300 mm wafers with RF bias power applied alone, which photoresist removal, or stripping, rate is considerably higher than that achieved using prior art processes. Further, in accordance with one or more embodiments of the present invention, in a dual plasma mode, photoresist removal, or stripping, rates in excess of 20,000 Å/min have been achieved, which photoresist removal, or stripping, rates are comparable to stripping rate performance of high temperature strip processes (i.e., the additional use of the remote plasma source increases the stripping rate by about 40 to 50%). The process conditions used to obtain the results shown in FIG. 6 include, a flow rate of O₂into remote plasma source 100 in a range of from about 500 to about 2000 sccm, a pressure in processing chamber 190 in a range from about 0.4 to about 1 Torr, and a temperature of wafer support 203 in a range from about 30 to about 80° C. Advantageously, as one can readily appreciate from FIG. 6, increased gas flow enhances the stripping rates even further, and provides a margin to optimize other parameters of the stripping reactor and the stripping processes. Although FIG. 6 is shown to illustrate a trend in differences between stripping rates achieved by use of RF bias power applied alone and by use of a dual plasma mode, stripping rates as high as about 3 μ/min have been achieved by use of a dual plasma mode.

Stripping Process After Ion Implantation

In accordance with one or more embodiments of the present invention, a plasma is created in processing chamber 190 to create a flux of ions, and the ions bombard the surface of the photoresist, and in particular, the ions bombard a crust formed on the surface during ion implantation. It is believed that ion implant processes form a hydrogen-depleted, dense, and relatively inert crust on the surface of the photoresist, and that ion bombardment generates chemically active sites in the crust. In particular, it is believed that ion bombardment by O₂⁺, and perhaps other ions, excites thermal, vibrational, and/or rotational states of C—H bonds in the crust to form chemically active sites that can react with neutral gas species (for example, radicals) to form volatile products. Advantageously, in accordance with one or more such embodiments of the present invention, ion-enhanced stripping enables a stripping process to remove photoresist crust, bulk photoresist, and residue at lower temperatures than are utilized for prior art stripping processes.

In accordance with one or more embodiments of the present invention, a plasma is formed in processing chamber 190 by flowing O₂gas into processing chamber 190, and by applying RF bias power to wafer support 203 (this creates a plasma of O radicals, O₂⁺ ions, and other excited state species). In addition, the RF bias power causes the ions to bombard the crust formed on the photoresist surface. It is believed that the ion bombardment creates chemically active sites, and it is further believed that the ions do not necessarily participate directly in chemical reactions with the photoresist. As a result, it is believed the O₂⁺ concentration in the gas phase remains roughly constant. On the other hand, it is believed that the O radicals do react with the photoresist, and in particular; that they react at the chemically active sites created by the ion bombardment. As a result, it is believed that the O radical concentration in the gas phase will be suppressed. Evidence to support these beliefs is provided in FIG. 7. In particular, FIG. 7 shows time-varying optical emission spectra for ion-enhanced photoresist stripping of a 1.2 micron DUV blanket resist on a Si substrate in accordance with one or more embodiments of the present invention where an O radical peak is reduced in intensity during photoresist stripping while an O₂⁺ ion peak remains relatively constant.

In accordance with one embodiment of a dual plasma mode stripping process, low temperature, post-implant stripping has been used to remove both a crust layer and bulk photoresist with process times as short as 30 to 35 sec on an 80 KeV, 5E15 dose, As-implanted, 1.2 micron DUV blanket photoresist wafer. FIG. 8 shows an endpoint trace for O radical species during a dual plasma mode stripping process on the As-implanted, 1.2 micron DUV blanket photoresist wafer, 80 KeV, 5E15 dose. As shown in FIG. 8, the crust layer was removed in about 14 sec and the bulk photoresist was removed in about 29 sec. Advantageously, such a dual plasma mode stripping process eliminates photoresist popping, and enables production-worthy throughput in a single chamber without additional complexities of a multi-temperature chamber or two chambers in series, one at low temperature for crust removal, and the other at high temperature for bulk photoresist strip. Thus, because use of one or more embodiments of the present invention can be used to achieve high throughput and selectivity without photoresist popping and without the use of fluorine, fluorine and/or reducing chemistries can be added, if desired, after stripping, solely for the purpose of residue removal.

Another advantage provided by low temperature stripping processes carried out in accordance with one or more embodiments of the present invention is that they do not cause hardening of stripping residues. Yet another advantage provided by one or more embodiments of the present invention is that the use of a plasma generated by the application of RF bias power enables ion bombardment which helps break up stripping process residues. Yet another advantage provided by one or more embodiments of the present invention is that high strip rates can be achieved without the need for quartz liners in processing chamber 190. Consequently, with only a minor sacrifice in throughput (<10%), fluorine-rich processes can be run in processing chamber 190 without consuming chamber materials.

Those skilled in the art will recognize that the foregoing description has been presented for the sake of illustration and description only. As such, it is not intended to be exhaustive or to limit the invention to the precise form disclosed. For example, although certain dimensions were discussed above, they are merely illustrative since various designs may be fabricated using the embodiments described above, and the actual dimensions for such designs will be determined in accordance with circuit requirements. For example, in accordance with one or more embodiments of the present invention, to minimize recombination losses for particular applications, quartz liners can be added to the inner surfaces of chamber 190, and the material of gas distribution plate 180 can be changed from a conductive material to quartz. In addition, further embodiments of the present invention include plasma processing chambers for processing wafers to fabricate at least a portion of an integrated circuit which are like the stripping reactors described above without use of the remote plasma source. Advantageously, such plasma processing chamber may be utilized for deposition and etching applications.

Methods and apparatus for stripping

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