The present disclosure relates to a micro-electromechanical system (MEMS) pump, and more particularly to a MEMS pump manufactured by a semiconductor process.
Currently, the products used in many fields such as pharmaceutical industries, computer techniques, printing industries or energy industries are developed toward elaboration and miniaturization. The fluid transportation device is the curial and important components used in, for example, micro pumps, atomizers, print heads or the industrial printers. Therefore, how to take advantage of an innovative structure to break through the bottleneck in the relevant prior art has become an important issue of development.
With the rapid advancement of science and technology, the application of fluid transportation device tends to be more and more diversified. For example, gas transportation devices are gradually popular in industrial applications, biomedical applications, medical care applications, electronic cooling applications and so on, or even the wearable devices. It is obviously that the conventional fluid transportation devices gradually tend to miniaturize the structure and maximize the flow rate thereof. Therefore, the process hierarchy of MEMS pump attracted more and more attention gradually.
An object of the present disclosure is to provide a MEMS pump manufactured by a semiconductor process for reducing the restriction stein from the volume of the MEMS pump.
In accordance with an aspect of the present disclosure, a MEMS pump is provided. The MEMS pump includes a first substrate, a first oxide layer, a second substrate, a second oxide layer, a third substrate and a piezoelectric element. The first substrate has a first thickness and at least one inlet aperture. The first substrate is manufactured by a thinning process of a semiconductor process. The at least one inlet aperture is formed by a lithography and etching process. The first oxide layer has at least one fluid inlet channel and a convergence chamber. The first oxide layer is formed and stacked upon the first substrate by the semiconductor process. The at least one fluid inlet channel and the convergence chamber are formed by the lithography and etching process, wherein one end of at least one fluid inlet channel is in communication with the convergence chamber, and the other end of the at least one fluid inlet channel is in communication with the at least one inlet aperture. The second substrate has a second thickness and a through hole. The second substrate is manufactured by the thinning process of the semiconductor process and placed upon the first oxide layer. The through hole is formed by the lithography and etching process, and the through hole is misaligned with the inlet apertures of the first substrate and in communication with the convergence chamber of the first oxide layer. The second oxide layer is formed by a sputtering process and stacked on the second substrate. The second oxide layer has a gas chamber with a concave central portion formed by the lithography and etching process. The third substrate has a third thickness and a plurality of gas flow channels. The third substrate is manufactured by the thinning process of the semiconductor process and stacked on the second oxide layer. The plurality of gas flow channels are formed by the lithography and etching process and are misaligned with the through hole of the second substrate. The gas chamber of the second oxide layer is in communication with the through hole of the second substrate and the plurality of gas flow channels of the third substrate. The piezoelectric element is formed and stacked on the third substrate by the semiconductor process. The first substrate, the first oxide layer, the second substrate, the second oxide layer, the third substrate and the piezoelectric element are fabricated into a modular structure, and the modular structure has a length, a width and a height.
In accordance with another aspect of the present disclosure, a MEMS pump is provided. The MEMS pump includes a first substrate, a first oxide layer, a second substrate, a second oxide layer, a third substrate and a piezoelectric element. The first substrate has a first thickness and at least one inlet aperture. The first substrate is manufactured by a thinning process of a semiconductor process. The at least one inlet aperture is formed by a lithography and etching process. The first oxide layer has at least one fluid inlet channel and a convergence chamber. The first oxide layer is formed and stacked upon the first substrate by the semiconductor process. The at least one fluid inlet channel and the convergence chamber are formed by the lithography and etching process, wherein one end of at least one fluid inlet channel is in communication with the convergence chamber, and the other end of the at least one fluid inlet channel is in communication with the at least one inlet aperture. The second substrate has a second thickness and a through hole. The second substrate is manufactured by the thinning process of the semiconductor process and placed upon the first oxide layer. The through hole is formed by the lithography and etching process, and the through hole is misaligned with the inlet apertures of the first substrate and in communication with the convergence chamber of the first oxide layer. The second oxide layer is formed by a sputtering process and stacked on the second substrate. The second oxide layer has a gas chamber with a concave central portion formed by the lithography and etching process. The third substrate has a third thickness and a plurality of gas flow channels. The third substrate is manufactured by the thinning process of the semiconductor process and stacked on the second oxide layer. The plurality of gas flow channels are formed by the lithography and etching process, and are misaligned with the through hole of the second substrate. The gas chamber of the second oxide layer is in communication with the through hole of the second substrate and the plurality of gas flow channels of the third substrate. The piezoelectric element is formed and stacked on the third substrate by the semiconductor process. The first substrate, the first oxide layer, the second substrate, the second oxide layer, the third substrate and the piezoelectric element are fabricated into a modular structure, and the modular structure has a length ranging from 1 nm to 999 nm, a width ranging from 1 nm to 999 nm and a height ranging from 1 nm to 999 nm.
The above contents of the present disclosure will become more readily apparent to those ordinarily skilled in the art after reviewing the following detailed description and accompanying drawings, in which:
The present disclosure will now be described more specifically with reference to the following embodiments. It is to be noted that the following descriptions of preferred embodiments of this disclosure are presented herein for purpose of illustration and description only. It is not intended to be exhaustive or to be limited to the precise form disclosed.
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The first substrate 1, the second substrate 2 and the third substrate 4 described above may be made of the same material, but not limited thereto. In this embodiment, all of the three substrates above are silicon chips formed by a crystal growth process of the semiconductor process. The crystal growth process may be a polysilicon growth technique, such that the first substrate 1, the second substrate 2 and the third substrate 4 may be polysilicon chips. In addition, the first substrate 1 has a first thickness, the second substrate 2 has a second thickness, and the third substrate 4 has a third thickness, wherein the first thickness, the second thickness and the third thickness may be formed by a thinning process. In this embodiment, the first thickness of the first substrate 1 is larger than the third thickness of the third substrate 4, and the third thickness of the third substrate 4 is larger than the second thickness of the second substrate 2. The substrate thinning process may be achieved by grinding, etching, cutting or any other process to obtain the desired thickness of the substrate. Consequently, the first thickness ranging from 150 μm to 200 μm is obtained by the thinning process in the micro-manufacturing process, the second thickness ranging from 2 μm to 5 μm is obtained by the thinning process in the micro-manufacturing process, and the third thickness ranging from 10 μm to 20 μm is obtained by the thinning process in the micro-manufacturing process.
The first oxide layer 3 and the second oxide layer 5 may be both made of the same material, but not limited thereto. In this embodiment, the first oxide layer 3 and the second oxide layer 5 are silicon dioxide (SiO2) films, which can be formed by a sputtering process or high temperature oxidation of the semiconductor procedure, so as to form the films with desired thickness. In this embodiment, the thickness of the first oxide layer 3 is greater than the thickness of the second oxide layer 5. Consequently, the first oxide layer 3 manufactured by the micro-manufacturing process has a thickness ranging from 10 μm to 20 μm, and the second oxide layer 5 manufactured by the micro-manufacturing process has a thickness ranging from 0.5 μm to 2 μm.
The first substrate 1 formed by the crystal growth process of the semiconductor process has a first top surface 12, a first bottom surface 13 and at least one inlet aperture 11, and the at least one inlet aperture 11 is formed by a lithography and etching process. Each inlet aperture 11 penetrates the first substrate 1 from the first bottom surface 13 to the first top surface 12. In this embodiment, there are two inlet holes in the first substrate 1, but not limited thereto. Moreover, the inlet aperture 11 is cone-shaped and tapered from the first bottom surface 13 to the first top surface 12 to enhance the inhale efficiency.
The first oxide layer 3 described above is formed by the sputtering process or high temperature oxidation of the semiconductor procedure and is stacked upon the first top surface 12 of the first substrate 1. In addition, at least one fluid inlet channel 31 and a convergence chamber 32 are formed on the first oxide layer 3 by the lithography and etching process. The number and the position of the at least one fluid inlet channel 31 is corresponding to the inlet aperture 11. In this embodiment, the number of the fluid inlet channel 31 is illustrated by two, but not limited thereto. One end of each fluid inlet channel 31 is in communication with the corresponding inlet aperture 11, and the other end of the fluid inlet channel 31 is in communication with the convergence chamber 32. Consequently, the gas inhaled from the two inlet apertures 11 can be converged into the convergence chamber 32 through the corresponding fluid inlet channels 31, respectively.
The second substrate 2 formed by the crystal growth process of the semiconductor process has a second top surface 22, a second bottom surface 23, a resonance part 24 and a fixed part 25, and a through hole 21 is formed by the lithography and etching process. The through hole 21 located in the center of the second substrate 2 penetrates from the second top surface 22 to the second bottom surface 23. The resonance part 24 locates at the periphery region of the through hole 21, and the fixed part 25 locates at the periphery region of the resonance part 24. Moreover, the second bottom surface 23 of the second substrate 2 is disposed upon the first oxide layer 3. The through hole 21 of the second substrate 2 is perpendicularly aligned and in communication with the convergence chamber 32 of the first oxide layer 3, and the through hole 21 is misaligned with the inlet apertures 11 of the first substrate 1.
The second oxide layer 5 is formed upon the second top surface 22 of the second substrate 2 by the sputtering process or high temperature oxidation of the semiconductor process, and a central portion of the second oxide layer 5 is recessed to form a gas chamber 51 by the lithography and etching process. The gas chamber 51 is corresponding in position to the through hole 21 of the second substrate 2 and the resonance part 24 in the periphery region of the through hole 21. Consequently, the gas can flow into the gas chamber 51 by passing through the through hole 21, and the resonance part 24 can displace upward and downward in the gas chamber 51.
The third substrate 4 described above has a third top surface 42 and a third bottom surface 43 formed by the crystal growth process of a semiconductor process. Moreover, a plurality of gas flow channels 41 penetrated from the third top surface 42 to the third bottom surface 43 are formed by the lithography and etching process, so as to define a vibration part 44, a periphery part 45 and a plurality of connection parts 46 of the third substrate 4, as shown in
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In order to clarify the operation steps of the MEMS pump 100 manufacturing by micro-manufacturing process of the semiconductor process, please refer to
In summary, the present disclosure provides an MEMS pump. The structure of the MEMS pump is manufactured by a semiconductor process to decrease the volume of the MEMS pump, so as to achieve the object of reducing the volume of the MEMS pump, and makes the MEMS pump more compact and miniature, so as to solve the problem of excessive pump volume in the prior art
While the disclosure has been described in terms of what is presently considered to be the most practical and preferred embodiments, it is to be understood that the disclosure needs not be limited to the disclosed embodiment. On the contrary, it is intended to cover various modifications and similar arrangements included within the spirit and scope of the appended claims which are to be accorded with the broadest interpretation so as to encompass all such modifications and similar structures.
Number | Date | Country | Kind |
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110121457 | Jun 2021 | TW | national |