Patent Application
20130199827
This application claims the benefit of priority to Japanese Patent Application Nos. 2011-176805, 2012-073467 and 2012-073468, filed Aug. 12, 2011, Mar. 28, 2012 and Mar. 28, 2012, respectively, of which full contents are incorporated herein by reference.
1. Field of the Invention
The present invention relates to a mounting board and a circuit device using the mounting board.
2. Description of the Related Art
Recently, electronic devices have become readily available and it has been becoming possible to obtain various kinds of information by simply taking the devices out of pockets or bags. One of the reasons for that is the reduction in size and weight of mobile devices. Mobile phones of the name-card size or smartphones having the size of approximately two name cards have been developed, allowing information processing possible anywhere in the world.
There are various factors having realized this reduction in size and weight, and the first factor is sophistication of IC. Various functions are incorporated in an IC chip and further the size thereof has been reduced. This small-sized IC chip has more terminals, and the sizes of the terminals are also reduced.
The second factor is an interposer for mounting this IC chip. This interposer is inserted between a set board and an IC chip and reduces a difference in a thermal expansion coefficient α between the IC chip and a set board.
This interposer (hereinafter referred to as a mounting board) has an insulating resin as a base, and granulated fillers such as oxidized Si, oxidized Al and the like or fibrous filler such as glass, carbon and the like are kneaded therein for adjustment of α.
Recently, with sophistication of functions of the mounting board 10, a thin conductive pattern 12A for a low current and a thick conductive pattern 12B for a high current have been becoming necessary for this mounting board. In the above-described Patent Literature, conductive patterns are applied to a metal board, and a thick conductive pattern and a thin conductive pattern are realized by two processes of etching.
For example, an inverter module or the like has a transistor 14 through which a high current flows and a control IC 15 for controlling this transistor 14 as illustrated in
However, providing conductive patterns having different thicknesses on this mounting board 10 has a problem of increasing the number of manufacturing processes as described above. That is, a Cu foil having a thick film needs to be prepared in advance and a great film thickness and a small film thickness need to be prepared by performing two processes of etching.
As an alternative method, the conductive pattern 12A for a low current may have the same film thickness as that of the thick conductive pattern 12B without being reduced in thickness thereof. However, in this case, the following problems remain.
In general, a Cu pattern is realized by wet etching in view of a cost. Thus, the pattern is subjected to etching isotropically, and thus, such a problem is caused in the case of a thick Cu pattern that etching in the lateral direction progresses accordingly, thereby being unable to form a fine pattern. That is, if etching is executed for a thin conductive pattern, a fine pattern can be arranged with high density accordingly, but using this thick conductive pattern instead results in commensurate sacrifice in pattern.
Increase in the number of terminals and high terminal density in this flip-chip mounting requires L/S of approximately 100 μm in recent years. Thus, if a Cu foil having a film thickness of 70 μm is used, the L/S of 100 μm cannot be realized due to the great film thickness, resulting in difficulty performing flip-chip mounting.
Thus, if the conductive pattern 21A is to be realized with a copper foil (50 μm, for example) having a film thickness smaller than 70 μm, then a high current flowing from a power transistor 14 cannot be allowed to flow therein. Thus, a high current was passed through a via 22 as illustrated in
Thus, a conductive pattern 22B formed on a flat portion of the mounting board 20 was subjected to wire bonding avoiding a spot immediately above the via 22 as in
However, the conductive pattern 22B here is a 50-μm copper foil and has a resistance, and passing the current of the transistor 14 causes a problem of fusing of the conductive pattern or temperature rise of the mounting board 20 itself.
A mounting board according to an aspect of the present invention, includes: a core layer made of an insulating resin; a first conductive pattern provided on a front side of the core layer; a second conductive pattern provided on a back side of the core layer; and a via provided between a first electrode for a high current in the first conductive pattern and an external electrode including the second conductive pattern, the external electrode provided so as to correspond to the first electrode, the first conductive pattern and the second conductive pattern having the same film thickness, the via set at a resistance value lower than a resistance value of the first conductive pattern so that the high current flows to the external electrode through the via.
Other features of the present invention will become apparent from descriptions of this specification and of the accompanying drawings.
For more thorough understanding of the present invention and advantages thereof, the following description should be read in conjunction with the accompanying drawings, in which:
At least the following details will become apparent from descriptions of this specification and of the accompanying drawings.
An embodiment of the present invention will be described below.
In an embodiment of the present invention, terms of a mounting board and a circuit device are employed. Here, the circuit device employs a mounting board according to an embodiment of the present invention. If a semiconductor device and a passive device are employed, a hybrid integrated circuit device is configured. However, when only a semiconductor device is mounted on a mounting board, a semiconductor device is configured. If an LED is mounted thereon, a light emitting device or an illuminating device is configured, and further, if a power transistor and its control IC are mounted thereon and an inverter module is configured, which is a power module. Here, they are collectively referred to as a circuit device. Moreover, those in which this circuit device is mounted on a metal board, a printed board, a ceramic board and the like are referred to as board modules.
A mounting board 50 made of a two-layered board in
First, a core layer 52 of this mounting board 50 is made of an insulating resin and made of a thermosetting or thermoplastic resin. As an example, it is made of polyimide or epoxy resins and the like, and a filler is mixed in these resins as described in examples. The filler is granular, crushed or fibrous, and is made of oxidized Si, oxidized Al, glass or the like. Here, a glass epoxy resin is employed in which a glass fiber is woven in an epoxy resin, and the thickness thereof is approximately 100 μm. A carbon fiber may be woven therein. These are mixed in order to reduce a difference in a thermal expansion coefficient α between a set board and a semiconductor device to be mounted.
A mounting board in which a metal layer is embedded may be employed as the core layer 52, which will be described last.
Subsequently, a conductive pattern will be described. The first conductive pattern 53 on the front side and the second conductive pattern 54 on the back side have a film thickness of approximately 30 to 50 μm, and are made of Cu or metal mainly composed of Cu or an alloy mainly composed of Cu and the like. Methods maybe forming the pattern on the mounting board by plating, or preparing a Cu foil made of these materials in advance and bonding it to the mounting board. Here, a bonding type Cu foil may be one grown by plating, or rolled Cu formed by rolling a plated film.
The first conductive pattern 53 on the front surface of the mounting board 50 is formed as a pattern as illustrated in
Moreover, the second conductive pattern 54 on the back side is made of an external electrode on which a brazing material such as solder is provided, wiring, and the like. The external electrode has a solder placed thereon by screen printing or a solder ball placed thereon to be heated and melted. A conductive paste such as an Ag paste may be provided instead of the solder. The wiring is not usually essential on the back side and may be provided as necessary such as when there is insufficient space on the front surface side or the like. In
Furthermore, as illustrated in
Points of an embodiment of the present invention will be described below.
First, the first conductive pattern 53 provided on the front surface side of the mounting board 50 has the same film thickness over the entire surface, and specifically, is configure with a thin conductive pattern for a low current, which has a film thickness of 40 to 50 μm here. The low current flows at least through the thin first conductive pattern 53. However, the current may flow to the second conductive pattern on the back side through the via as necessary. A high current flows by a route through the conductive pattern immediately above the via, the via, and the conductive pattern immediately below the via.
Specific description will be given referring to
On the other hand, this is not the case for the high current. This is because both the first conductive pattern 53 and the second conductive pattern 54 have a small film thickness. The reason for this, which has been described before, is because the conductive pattern on the front surface side is to be made fine, thereby realizing high density. For example, if the number of IC pins is as large as 1000 pins or more, terminals are small, many wirings provided on the mounting board side might be crossed over when wire bonding is executed from the pad of the control IC. But if the film thickness is great, the spacing is widened, thereby requiring the length of the bonding wire. Since the recently developed control ICs are formed finer due to a technical progress, it is indispensable for the first conductive pattern 53 on the mounting board to be fine.
However, there may be two cases for this high current, which are flowing out of the power transistor 55A and flowing into the power transistor 55A. For example, the high current flows out to the pads 62 and 64 for a high current from the chip surface through the metal thin wire 75, as indicated by the bold line. Since the via 72 is provided, the current does not flow to the wiring on the front surface but flows to the back surface through the via 72. Here, the fourth pad 64 ensures an area whereto thick two wires can be connected, but pads may be separated corresponding to the respective wires. Reference numeral 61 denotes the second pad connected to a gate with a thin line, while reference numeral 58 denotes wiring integrated with this second pad 61.
The current flows from a conductive pattern 73 through the via 72 and the thick wire 75 to the power transistor 55B. In either case, the resistance of the via is filled with a conductive material and lower than the resistance of the first conductive pattern 53 or the second conductive pattern 54, and thus if the metal thin wire is connected immediately above the via, the high current flows through the via 72 without fail.
Subsequently, the first island 56A will be described. Here, this is a portion where a current flows out of the back surface of the power transistor 55A and/or flows into the back surface of the transistor. Thus, at least one via 72 is provided in a region of an island corresponding to the back surface of the power transistor 55A. In
However, it is only necessary that at least one transistor is provided on one island, at least one via is formed between the island on the front surface and a conductive pattern on the back surface, and a power transistor is fixed immediately above the via. For example, in
That is, in
Though roughly illustrated in
Thus, a thin two-layered circuit board is enough for the circuit board. As a result, the number of processes of manufacturing the circuit board can be decreased, thereby being able to reduce a cost, and furthermore, since the thin board is enough, there is a merit that the thickness of the insulating board can be reduced.
In order to maintain a thick Cu foil, the core layer may be made thick considering warpage. Whereas, in an embodiment of the present invention, since the Cu foil is thin, the amount of warpage is small, thereby being able to make the core layer thin. Thus, heat resistance of the insulating resin itself is high, however, the thickness can be reduced, thereby being able to reduce the heat resistance to be small. Thus, increase in temperature can be suppressed, and warpage of the board can be also suppressed. Accordingly, a large number of solder balls provided on the back surface of the mounting board is improved in flatness, and mountability onto the board (SB) is also improved.
Conductive patterns 54 and 73 on the back surface may be embedded in the insulating resin IR as in
Subsequently, a manufacturing method will be described referring to
First, as illustrated in
Moreover, the core layer 52 is a glass epoxy resin here, but it may be another insulating resin.
Subsequently, as illustrated in
Subsequently, when this etching resist 103 is removed, an opening portion from which the core layer 52 is exposed is formed at a portion corresponding to the via (not shown).
Then, the back surface is irradiated with laser, thereby removing the core layer of a portion corresponding to the opening portion. Since the planar shape of the via is circular in general, the removed portion has a columnar shape or a shape expanded from the upper part like a skirt (the cross section thereof is in a trapezoid form or a shape obtained by cutting off the upper part of a cone when seen in a three-dimensional manner). As illustrated in
Moreover, in place of
Subsequently, a process in
Subsequently, as illustrated in
Those having been subjected to the process in
In either process, the films 100 and 101 prepared in
The above description has been given for the two-layered mounting board 50, but this technical idea can be applied to the mounting board having four layers, six layers, eight layers and the like.
Brief description will be given below with reference to
First, as illustrated in
Subsequently, as illustrated in
Alternatively, as illustrated in
Thereafter, in both the processes, the non-electrolytic plating and electrolytic plating are applied on the front and back surfaces including the via. In order to obtain the result as illustrated in
In the case of
Since the mounting board 50 in
The boards illustrated in
Such a configuration will be made clear in the explanation below. A following embodiment is substantially the same as above except that the electrode on the back side of the mounting board is thick.
As described above, the example in which the back-surface electrode is thick will be described below. In the above-described configuration, it is difficult for the high current of the electrode 73 on the back surface to be passed from this position to another by wiring. That is because the thickness is small and there is resistance. Thus, if a high current is to be passed to another area, a thick wiring is provided on the set board, thereby being able to pass the current by the wiring.
Thus,
In
This metal board 300 is mainly made of Al or Cu. In the case of Al, if the surface is oxidatively-treated, corrosion resistance and insulation properties thereof become excellent, but this oxidized film may be omitted. This two-layered mounting board is bonded by an insulating resin IR. Here, thick conductive patterns 54 and 73 on the back surface are embedded in the insulating resin. This insulating resin may be such that there is an insulating resin on the metal board side and the insulating resin IR for embedding is provided thereon.
In
By configuring as such, an external lead can be connected to the lead connection pad L in the vicinity of the side surface 302 of the metal board 300 as necessary.
Though not shown, this metal board and the mounting board 50 may be sealed by the insulating resin using a transfer mold. They may be covered with the insulating resin including the back surface of the metal board, or the back surface of the metal board may be exposed. Moreover, they may be sealed with a case material, can or the like.
Hereinabove, the thick conductive pattern on the back side may have a function of wiring on the back surface side of the mounting board unlike the configuration in
As described above, a printed board or a ceramic board may be used in place of the metal board.
Since a wire-bonding point, that is, the point immediately above the via 72 is flat, it realizes favorable connection. The current is passed through this via 72 and flows to the second conductive pattern 54 on the back. Then, the current is passed from the electrode 73 on the back surface through a pattern which is to be wiring, and flows to the vicinity of the side surface 602 of the island 600. Here, the via is provided in the core layer 52, and the current flows to the first conductive pattern on the front surface side. Here, since the lead connection pad L and the via are connected to each other, the current flows again to the front surface side and flows to the connected lead.
By configuring as above, the lead and the lead connection pad can be connected using a metal thin line in the vicinity of the side surface of the island 600 (periphery of the mounting board 50). The thick solid line on the outside is an insulating resin for sealing, and seals the island and a circuit device and the like mounted thereon.
Referring
Subsequently, an opening portion 104 which is to be a via is formed. In
Subsequently, as illustrated in
The patterning on the front surface is either performed at the same time as patterning of the vias in
Subsequently,
This process includes various works such as plating, solder embedding, conductive paste embedding and the like. Here, Cu is embedded by plating in the opening portion 104. Since the insulating resin is exposed in an inner wall of the via, a conductive material is formed into a film and embedded by non-electrolytic plating, followed by electrolytic plating. The Cu plating is employed here, but such a material is selected that can be formed into a film by plating such as Au plating.
Subsequently, as illustrated in
Subsequently, as illustrated in
Here, the insulating resin IR before being cured is provided on the metal board 300 side, and the mounting board 50 is embedded when the resin IR is in a heated and softened state. Thereafter, the resin is cured by application of heat.
To the contrary, an adhesive is applied onto the mounting board 50 side or an adhesive made of a sheet-shaped insulating resin is provided and thermally pressure-bonded to the metal board 300. Thus, the thick conductive pattern on the mounting board 50 side is embedded in the insulating resin IR provided between the metal board and the mounting board.
Though not shown, devices are mounted and electrically connected as illustrated in
By making configuration as such, this board module can handle a low current and a small signal with the thin conductive pattern on the front surface and a high current and a large signal with the thick conductive pattern on the back surface. Moreover, since the wiring for a high current is provided between the metal board and the mounting board, a signal for a high current and a large signal can be re-wired on the back surface side as in the portion of the lead pad in
The electrode may be a can type instead of the plate as illustrated in
In this case, a via is provided anywhere corresponding to the flange-shaped electrode, and a channel can be expanded unlike a plate, which is suitable for a high current.
The chip back surface is a drain or a source, and a part having a via of the chip front surface is a source or a drain and a part without a via thereof is a gate. Moreover, an IC, in place of the power transistor, may be face-down mounted.
In the case of
Moreover, in
According to an embodiment of the present invention, the pad 64 for a high current is formed having a small film thickness, but the via 72 having a low resistance value is provided below that. Thus, the current flows to the back surface through the via 72 brought into contact with the pad 64 without fail, and does not flow to the first conductive pattern side on the front side. Therefore, it is only necessary to draw the first conductive pattern mainly for a low current. As a result, the film thickness of the first conductive pattern can be reduced, a fine pattern can be drawn, and etching can be completed in a single process, thereby being able to reduce a cost. Moreover, as illustrated in
The above-described embodiment of the invention is for facilitating understanding of the present invention and should not be interpreted to limit the present invention. The present invention can be changed or improved without departing from the gist thereof, and the present invention includes its equivalents.
A great difference between this mounting board 50 and that in
The first opening 202, in consideration of short-circuit with an electrode material filled in the via 72, has the core layer 52 located so as to cover the inside of the first opening, and the opening 202 has a size slightly larger than the via 72.
The second opening 203 is an area in which a passive device 201 is incorporated and has a size slightly larger than this passive device. The same applies to the third opening 204. Here, the power transistor 55A is incorporated, and the opening is provided having a size slightly larger than this transistor. Here, the component referred to as reference numeral 55A only needs to be a semiconductor device or may be an IC. This is of such a type that the board back side is in contact with the second conductive pattern and is a power semiconductor device in which a current flows from and/or into the board back surface thereof.
The metal core 200 in which the passive device 201 and the semiconductor device 55A are accommodated in the openings thereof is covered with the insulating resin 52 which is the core layer 52 from the front surface and the back surface. Since fluidity is given by heating, the insulating resin extends to an unfilled part in the opening portion.
Here, by bonding an insulating resin sheet with a copper foil on the front side, a board bonded with a flat copper foil only on the front surface can be prepared. Then, an electrode portion of the semiconductor device 55A is selectively opened, plating is filled therein, and patterning is performed, thereby enabling a thin and fine pattern only on the front surface.
The portions of the via 72 and/or the back surface of the semiconductor device are opened by laser or mechanical working from the back, thereby exposing the back surface of the third pad 62. Moreover, the back surface of the semiconductor chip is exposed.
Then, these openings are filled with plating, a brazing material, a conductive paste or the like from the back surface. Here, since the thickness is greater only by the portion of the metal core 200, the via is not completely filled. In short, it is only necessary that plating is thicker than the first conductive pattern and the via portion has a resistance value smaller than that of a portion extending from the third pad to the wiring.
By configuring as above, heat of the semiconductor device 55A flows to the metal core of the mounting board and the back side, and if being mounted on a metal board, etc., favorable heat radiating performances can be maintained.
Further, the mounting board 50 may include a ceramic board.
Furthermore, in an embodiment according to the present invention, a metal board (one on which a mounting board according to an embodiment of the present invention is mounted) is described using the metal board (
| Number | Date | Country | Kind |
|---|---|---|---|
| 2011-176805 | Aug 2011 | JP | national |
| 2012-073467 | Mar 2012 | JP | national |
| 2012-073468 | Mar 2012 | JP | national |
