Embodiments of the invention relate to MRAM (Magnetic Random Access Memory) semiconductor devices.
A FIMS (Field Induced Magnetic Switching) MRAM cell comprises a MTJ (Magnetic Tunnel Junction) in the form of a stacked memory element, a bit line (BL) metal running on the MTJ in a first direction, a write word line (WWL) running under the MTJ in a second direction crossing the first direction, a read word line (RWL) as a select gate running in the second direction and a read metal wire connecting the MTJ to a selected device. The MTJ is connected to the BL. An insulation layer is disposed between the MTJ and the WWL to prevent current flow through the MTJ during a write operation.
The MTJ is a stack comprising a pinned layer with fixed magnetism, a tunnel layer and a free layer. Two orthogonal currents carried by the write word line and the bit line manipulate magnetic fields in the free layer. When the direction of the free layer field coincides with that of the pinned layer, tunnel resistance of the MTJ becomes low. When the direction is opposite, the resistance becomes high. A memory high or low state is defined as high or low resistance of the MTJ element. A read word line (RWL) selects a column to be read.
There are two word lines, RWL and WWL, in a unit cell. The RWL or WWL play no role during “write” or “read” operations. Thus, having a RWL and a WWL is not only inefficient but also limits the miniaturization of a memory cell. WWL is patterned in the second or upper metals. A metal stud to connect the read metal is also formed at the WWL metal level. There are two sets of metal and space along bit line direction, and one set along the word line direction. Since the MTJ should be within widths of BL and WWL, overlay margin is added to widths of BL and WWL. Minimum feature size of 2nd or upper metal width is 1.5 to 2 times larger than gate width. The unit cell area becomes 30 to 40 F2, where F is minimum feature size of its technology.
Another serious issue with the conventional MRAM cell is that the write current to switch a vector of free layer is not scaled down with miniaturization. Thus, the problem of electro migration arises from high current density,
According to a first aspect of the invention, there is provided a magnetic random access (MRAM) cell, comprising: a magnetic bit; and write conductors defined by conductors patterned in a second metal layer above the magnetic bit; and a gate formed below the magnetic bit between a source and a drain.
According to a second aspect of the invention, there is provided a magnetic random access (MRAM) device, comprising: a plurality of MRAM cells, wherein each MRAM cell comprises a magnetic bit, and write conductors defined by conductors patterned in a second metal layer above the magnetic bit; and a gate formed below the magnetic bit between a source and a drain; and addressing circuits to address the MRAM cells.
According to a third aspect of the invention, there is provided a method for operating a magnetic random access (MRAM) device, the method comprising: selecting a MRAM cell for writing to; and writing to the selected MRAM cell by passing a write current through a gate between a source and a drain below the MRAM cell.
Other aspects of the invention will become apparent from the written description below.
In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the invention. It will be apparent, however, to one skilled in the art that the invention can be practiced without these specific details.
Reference in this specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. The appearances of the phrase “in one embodiment” in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Moreover, various features are described which may be exhibited by some embodiments and not by others. Similarly, various requirements are described which may be requirements for some embodiments but not other embodiments.
Broadly, embodiments of the present invention disclose a MRAM device in which the write conductors used for write operations are defined by metal conductors in a second metal layer (M2) and metal gates of each memory cell. This obviates the need for defining write conductors using second and third metal layers and results in a more compact MRAM array.
As shown in
A pillar 108 of via 1 and second metal is also stacked on the bit stack as shown in
With the metal gate MRAM shown in
Up to the gate process, the fabrication method is same as with the base line structure. The gate electrode 203 in
The thin local metal is used for the write word line to increase current density. A Global Write Word Line (GWWL) runs along a first direction, parallel to the Bit Line. A Local Write Word Line (LWWL) is split into two ways from the GWWR in a second direction. The LWWR runs under 8 or 16 cells per side. The LWWR is connected a write transistor.
The STI 301 and active area 300 in
As shown in
Although the present invention has been described with reference to specific exemplary embodiments, it will be evident that the various modification and changes can be made to these embodiments without departing from the broader spirit of the invention. Accordingly, the specification and drawings are to be regarded in an illustrative sense rather than in a restrictive sense.
This application is a continuation of U.S. patent application Ser. No. 13/311,470 filed Dec. 5, 2011, which claims the benefit of priority to U.S. Provisional Patent Application No. 61/419,403 filed Dec. 3, 2010, the entire specification of each of the above applications is incorporated herein by reference.
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Number | Date | Country | |
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20140254255 A1 | Sep 2014 | US |
Number | Date | Country | |
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61419403 | Dec 2010 | US |
Number | Date | Country | |
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Parent | 13311470 | Dec 2011 | US |
Child | 14282497 | US |