This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2009-180038, filed on Jul. 31, 2009, the entire contents of which are incorporated herein by reference.
1. Field of the Invention
The present invention relates to a multilayer laminated circuit that includes ceramic layers sandwiched between all adjacent layers of a plurality of passive-element conductor layers and a plurality of wiring conductor layers.
2. Description of the Related Art
Conventionally, a circuit on an end portion of an endoscope has been downsized by using a multilayer integrated circuit to further decrease a diameter of the endoscope and shorten the length of a hard portion.
As the multilayer integrated circuit, as disclosed in Japanese Patent No. 2627625, a compact laminated integrated circuit including a capacitor for example is constructed by integrally stacking a laminated ceramic capacitor substrate on a base multilayer wiring substrate and forming an external electrode on the side surfaces of the substrates.
A multilayer laminated circuit according to an aspect of the present invention includes a plurality of passive-element conductor layers; a plurality of wiring conductor layers; a plurality of ceramic layers between all adjacent layers of the passive-element conductor layers and the wiring conductor layers; at least two first external connection electrodes formed on a principal surface of the multilayer laminated circuit; a first external wiring conductor that is formed on the principal surface and that connects at least a pair of the first external connection electrodes; and a first via that pierces through at least one of the ceramics layers and that electrically connects at least one of the passive-element conductor layers and wiring conductor layers to at least one of the first external connection electrodes.
The above and other features, advantages and technical and industrial significance of this invention will be better understood by reading the following detailed description of presently preferred embodiments of the invention, when considered in connection with the accompanying drawings.
Exemplary embodiments of the present invention are explained in detail below with reference to the accompanying drawings. The present invention is not limited by the following embodiments. In the following explanation, each drawing only schematically represents the shape, size, and positional relationship such that the contents of the present invention are understood; therefore, the present invention is not limited by the shape, size, and positional relationship that are exemplified in the drawings.
A plurality of external electrodes 14 (external connection electrodes) for making an electrical connection to an external apparatus is formed on a principal-surface top side Sa being a top surface of the topmost ceramic layer 10. The external electrodes 14 and the passive-element conductor layers 11 are connected to each other via a via 13 that pierces through the ceramic layers 10. The via 13 is a blind via of which one end is connected to the principal-surface top side Sa, and which connects the external electrodes 14 that are exposed outside to the internal passive-element conductor layers 11. A conductor layer is formed on the inner wall or over the whole interior portion of a hole of the via 13, so that the external electrodes 14 and the passive-element conductor layers 11 are electrically connected to each other. It is possible to insert a lead wire such as a copper wire inside the hole.
The external electrodes 14 formed on the principal-surface top side Sa are connected to the internal wiring conductor layers 12 via a via 15. The internal wiring conductor layers 12 are connected to each other via buried vias 16, so that a complex and three-dimensional wiring is formed. The wiring is not limited to the internal wiring, and it is possible to form an external wiring conductor 17 between the external electrodes 14 on the principal-surface top side Sa as illustrated in
The passive-element conductor layers 11 and the wiring conductor layers 12 are formed on the top surface or the back surface of each ceramic layer 10 by patterning, and the patterned ceramic layers 10 are joined together. Subsequently, the buried vias 16 are formed at a step of stacking the ceramic layers 10, and then after the ceramic layers 10 are stacked, the vias 13 and 15 that communicate with the principal-surface top side Sa are formed. Conductor layers are formed on the inner wall surfaces of the vias 16, 13, and 15 as described above. Subsequently, the external electrodes 14 are formed by a process such as plating, inkjet patterning, or the like. Furthermore, the external wiring conductor 17 is formed as described above. Thus, the multilayer laminated circuit 1 as described above is formed.
Subsequently, as illustrated in
In the multilayer laminated circuit 1, because the external electrodes are formed on the large principal-surface top side Sa, and also because the internal wiring is formed, design possibilities can be enhanced, so that it is possible to form a circuit which can be equipped with a number of functions. Furthermore, in the integrated circuit module 3, because the external electrodes 14 are not formed on the side surfaces and a principal-surface back side Sb of the multilayer laminated circuit 1, a portion that is electrically connected to the outside is reduced, so that it is possible to form a module resistant to external stress, contact, or the like.
In the first embodiment described above, the external electrodes 14 are formed only on the principal-surface top side Sa of the multilayer laminated circuit 1. However, in a second embodiment, external electrodes are formed on both the principal-surface top side Sa and the principal-surface back side Sb.
As illustrated in
While the single multilayer laminated circuit 4 is explained as an example in the second embodiment described above, the present invention is not limited to this example. For example, it is possible to form a multistage multilayer integrated circuit by connecting the principal-surface top side Sa and the principal-surface back side Sb to each other. Furthermore, while the wires 40 are used to make a connection to the principal-surface back side Sb in the second embodiment described above, the present invention is not limited to this configuration. For example, it is possible to form wiring between the external electrodes 34 on the principal-surface back side Sb and the electrodes 21 by inkjet printing or the like along the side surfaces of the multilayer laminated circuit 4.
In the multilayer laminated circuit 4, because the external electrodes are further formed on the principal-surface back side Sb, design possibilities can further be enhanced, so that it is possible to form a circuit which can be equipped with even more number of functions. In particular, it is possible to selectively make an electrical connection between the principal-surface back side Sb and the external connection device 5.
Additional advantages and modifications will readily occur to those skilled in the art. Therefore, the invention in its broader aspects is not limited to the specific details and representative embodiments shown and described herein. Accordingly, various modifications may be made without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents.
Number | Date | Country | Kind |
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2009-180038 | Jul 2009 | JP | national |