This disclosure relates generally to packaged electronic devices, and more particularly to plasma cleaning of package substrate strips with mounted electronic devices during the packaging process.
In a described example, a method includes loading at least one package substrate strip including electronic device dies mounted on the at least one package substrate strip into a plasma process chamber; positioning at least one E-field shield in the plasma process chamber spaced from and over the at least one package substrate strip; and plasma cleaning the at least one package substrate strip.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts, unless otherwise indicated. The figures are not necessarily drawn to scale.
In this description, certain structures and surfaces are described as “perpendicular” to one another. For purposes of this disclosure, two elements are “perpendicular” when the elements are intended to form a 90-degree angle at their intersection. However, the term “perpendicular” as used herein also includes surfaces that may slightly deviate from 90 degrees due to manufacturing tolerances. Generally, for purposes of this description, an expected manufacturing tolerance is =/−10% for any measured characteristic. For example, for purposes of this description, an angle intended to be a perpendicular angle that falls between 80 degrees and 100 degrees when measured is perpendicular.
As is further described hereinbelow, certain structures and surfaces are described as being “horizontal” or “vertical.” A horizontal surface has an orientation in a single plane such as a tabletop or the floor of a room. A vertical surface has an orientation in a single plane that is perpendicular to a horizontal surface. For example, a vertical wall of a room is perpendicular to the horizontal floor. However, when surfaces intended to be horizontal or vertical are manufactured, some variation occurs due to manufacturing defects or tolerances. A surface that is intended to be vertical is a vertical surface, as described herein. A surface that is intended to be a horizontal surface is a horizontal surface, as described herein. Further, the surfaces may be described as being in a single plane, this does not mean the surfaces are perfectly planar. In manufacturing, the surfaces may vary and the surfaces may be rough or smooth, and may have warp or other slight variations in planarity. The relative positions of these surfaces when an object including these surfaces is rotated or otherwise placed in a different position than that described does not change the meanings of the terms horizontal or vertical as used herein.
The terms “encapsulated” and “encapsulates” are used herein to describe a packaged electronic device covered in a mold compound. However, the term “encapsulated” means that while the electronic device and portions of the package substrate frame such as a lead frame are covered in mold compound, some portions of the lead frame may be exposed to form external leads or external terminals of the packaged electronic device. A term commonly used for encapsulation in integrated circuit (IC) packaging is “potting.” Another term used is “encapsulation.” During an electronic device potting process, a lead frame with a device bonded to it is placed in an injection or transfer mold. Mold compound such as filled epoxy resin is injected in the mold to cover, encapsulate, or “pot” the device plus lead frame and form a packaged electronic device.
The terms “plasma ashing” and “plasma cleaning” are used herein. In some uses of the term plasma ashing, a layer such as a photoresist is removed from a surface by placing the workpiece, such as a semiconductor die or wafer, in a process chamber. In a vacuum, a single species gas is introduced and a plasma is formed using ionizing energy. The energized ions or atoms are attracted to impact the surface of the workpiece with sufficient energy to sputter the photoresist layer. The material is then removed from the process chamber by vacuum. When photoresist is removed in this process a white residue is removed, so the plasma process is often called “ashing.” In this description the surfaces are being cleaned of oxides and metal and solder residue in a plasma process, and so the process cleans the surfaces, and the process is described herein as “plasma cleaning” or as “plasma ashing.”
The term “E-field shield” is used herein. As used herein, an E-field shield is a conductive element placed between a source of an electric field and a device to be protected. The E-field shield receives at least a portion of the electric field, reducing or preventing the electric field from reaching the protected device. In the arrangements, a plasma cleaning process is used where atoms are accelerated in an electric field and directed towards a target to be cleaned. The atoms impact the target and remove residues by sputtering on impact. Sharp conductive edges and other non-uniform portions of the target can cause the electric field to concentrate in certain areas, forming a non-uniform electric field, which causes a non-uniform sputtering process. Use of an E-field shield in the arrangements can control and make the electric field at the target more uniform, reducing or preventing dilatory effects including over-sputtering and non-uniform sputtering at the target.
The term “packaged electronic device” is used herein. A “packaged electronic device” is an electronic device in a protective package. The package includes a package substrate for mounting one or more electronic devices, such as semiconductor devices, passive devices such as capacitors, resistors, inductors, coils and transformers, sensor devices, couplers such as opto-couplers, or micro-electromechanical systems (“MEMS”) devices. A semiconductor device can be a digital or analog transistor, a sensor, a digital or analog integrated circuit, a micro electro-mechanical system (MEMS) device, a high power transistor, a high power circuit such as a switching power supply. The term “electronic device die” is used herein. An electronic device die is an individual die taken from a semiconductor substrate where the devices are manufactured using semiconductor manufacturing processes.
The packaged electronic device further includes terminals or leads located at an exterior surface to provide electrical connection to the devices mounted within the package, the terminals also provide mechanical mounting points for the packaged electronic device. In example arrangements, the terminals can be leads extending from the body of the package electronic device. In alternative arrangements, the terminals can be “no-lead” terminals, terminals that are coextensive with the package body.
The term “package substrate” is used herein. A package substrate is a component used in mounting and packaging a semiconductor die. Examples shown in the figures herein show a metal lead frame as the package substrate. Other package substrates useful with the arrangements include pre-molded lead frames (PMLF). In addition, useful package substrates for the arrangements include conductive lead frames, partially etched or half-etched conductive lead frames, and molded interconnect substrates (MIS). The package substrate can be a film, laminate or tape that carries conductors, or can be a printed circuit board such as reinforced fiber glass (such as FR4), bismaleimide triazine (BT) resin, alumina, silicon carbide, or aluminum nitride. The materials for the package substrate can include conductors such as copper and copper alloys, iron-nickel alloys such as Alloy 42, and gold and gold alloys. Gold, silver, palladium, nickel and tin platings can be made on the metal conductors. These platings improve solderability, bondability, reduce diffusion and reduce possible corrosion. The package substrates can include dielectrics including silicon, glass, mold compound, ceramic, polyimide, fiberglass, and resins. Multiple levels of conductors spaced from one another by dielectric layers and conductive vias forming conductive connections between the multiple conductor levels can be used in the package substrates.
In examples, a packaged electronic device is formed in a leaded package. An example is a small outline integrated circuit (SOIC) package. The package substrate is a lead frame with portions of the lead frame leads forming leads extending from the body of the finished package, these leads are then shaped to form terminals for the packaged semiconductor device. In an alternative a “no-lead” or “leadless” package is used. In a quad flat no-lead (QFN) package, the lead frame leads end coextensively with the molded package body to form terminals on four sides of the package body that are “no lead” terminals for surface mounting the device to a system board. Other no-lead packages can be used.
Packaging electronic devices involves mounting electronic device dies on a package substrate strip such as a lead frame strip (a lead frame strip includes multiple individual lead frames connected together by saw streets). Devices can be coupled electrically to conductors in the package substrate by bond wires in a wire bonding process. Ribbon bonds can be used instead of bond wires. In an alternative arrangement, the semiconductor dies can be coupled to the package substrate in a flip chip process, using solder reflow of solder on conductive posts that extend from bond pads on the electronic devices. The package substrate is then subjected to encapsulating (potting) of the electronic device, covering a portion of the package substrate strip with a mold compound such as a filled epoxy resin. Thermoset mold compound can be used. Room temperature liquid mold compound can be used. After molding to cover the device, the mold compound can be cured using cooling time, or using time with applied thermal or UV energy, depending on the particular mold compound used. Individual packaged electronic devices are then formed by cutting through the mold compound and saw streets.
The process of mounting the electronic device die on the package substrate typically involves forming wire bonds between bond pads on the electronic device dies and conductive leads of the lead frame. In an alternative arrangement, flip chip packaging is used where the die is mounted to the package substrate using solder connections. Solder resin may be applied to the package substrate to facilitate solder wetting. In a thermal reflow process, the package substrate strip with mounted electronic device dies is heated to flow the solder. Solder joints form between the electronic device dies and the package substrate strip.
Residues such as metals, solder, solder resin and including surface oxides formed on the package substrate strip and electronic device dies during heating in the presence of air cause poor adhesion between the mold compound and the surface of electronic device dies and the surfaces of the package substrates. Poor mold compound adhesion can result in delamination of the mold compound from the surfaces of the package substrate and the electronic device dies during reliability testing, such as temperature and humidity cycling. Resulting failures result in increased scrap and reduced yield. Plasma cleaning in an oxygen or oxygen/argon plasma after the electronic device die mount, and prior to the encapsulation, cleans surfaces by removing residues such as plating residues, solder residue, and solder resin residue, oxides, and other organic residues such as fingerprints. Plasma cleaning also removes surface oxides that cause poor mold compound adhesion.
Electric fields between the showerhead 114 and the tray 120 accelerate the argon atoms 112, providing the atoms with sufficient energy to impact the package substrate strips and remove surface oxides and other residues that otherwise would prevent strong adhesive bonding between the mold compound and the surfaces of the package substrate strips 124 and mounted dies 126. Package substrate strips 124 such as lead frames have a large variety of designs with a large range of metal densities, and with numerous metal edges and metal points. Electric fields in the plasma concentrate at metal edges and especially at metal points, forming high electric field regions. Charged argon atoms 112 can gain sufficient energy when accelerated in these concentrated electric fields to sputter metal from exposed surfaces such as lead frame (package substrate 124) metal and bond wire 128 metal. Sputtering can reduce the size of the bond wires 128, resulting in reliability failures. Sputtering can also redeposit metal on surfaces of the electronic device die 126 between bond wires 128, causing leakage paths to form. Leakage paths are especially problematic for high voltage electronic devices and can result in shorting and premature package failure in field use or during time dependent dielectric breakdown (TDDB) reliability testing.
In the arrangements, the problems of bond wire thinning and undesirable package substrate sputtering, as well as the problems of metal residue redeposited in unwanted areas of an electronic device during a plasma cleaning process, are addressed by disposing an E-field shield over a package substrate strip in the process chamber of a plasma cleaning tool. Use of the E-field shield results in increased uniformity of the E-field and increased control of the cleaning process, reducing or eliminating metal sputtering, preventing redeposition of metal sputter residue and reducing wire bond thinning during the cleaning process.
In the arrangements, an E-field shield can be designed for a particular lead frame or family of lead frames to make the E-field above the lead frame more uniform. The E-field shield can be removed from the plasma process chamber and can be replaced with another E-field shield when the package substrate being processed changes. In this way the E-field shield can be used to control the E-field above the package substrate, for example a lead frame for a particular product. A robot handler or other transfer mechanism that is used to move workpieces in and out of the process chamber in the plasma tool can remove and replace the E-field shields.
In an example application, a lead frame having two die mount areas that are electrically isolated is used to mount two semiconductor dies, the two semiconductor dies having bond pads that are coupled to leads on the lead frame using bond wires. At least one of the two semiconductor dies is a high voltage device. When high voltages are used in a wire bonded package, if the bond wires are thinned due to plasma sputtering, the packaged device can fail or have hot spots or have higher than expected resistance. Damage to bond wires and the leads of the lead frame can increase failures or reduce product lifetime. Use of the E-field shield in the arrangements enables forming a uniform E-field in the plasma tool that effectively cleans the package substrate and the dies, while also avoiding unwanted sputtering of the lead frame and avoiding damage to the bond wires.
The horizontal spacing 334 of the support rails 322 in the tray 320 is determined by the width of the package substrate strips 324 to be cleaned. Package substrate strip 324 width is typically between about 50 mm and 90 mm, although other package substrate strip 324 widths are also possible. In this example arrangement, the support rails 322 have three sections each with a different width: a base section 319 with a first width, an intermediate section 321 extending from the base section with a second width that narrower than the first width, and an end section 323 extending from the intermediate section with a third width that is narrower than the second width. The support rails 322 are vertical with the base 319 section proximate to the floor of the tray 320. First supports 335 with a width 336 between approximately 2 mm and 4 mm are formed between the base 319 and the intermediate section 321. The package substrate strips 324 are supported on these first support shelves 335 during plasma cleaning.
Second supports 337 with a width 338 between approximately 2 and 4 mm are formed between the intermediate section 321 and the upper end section 323. The at least one E-field shield 330 is supported on the second horizontal shelves 337 during plasma cleaning.
The second support 337 is spaced a distance 332 of greater than about 0.5 mm above the first support 335 to prevent the E-field shield 330 (lying on the second support 337) from contacting any portion of the underlying electrical device (lying on the first support 335.) The support rails 322 position the E-field shield 330 between the package substrate strips 324 and the plasma source (208,
A few representative examples of E-field shields 430 useful in the arrangements are illustrated in
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Electronic device dies 526 are built (step 701,
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The package substrate strips 524 are removed from the plasma process chamber 502 prior to covering the mounted electronic device 526 and a portion of the package substrate strips 524 with mold compound 564. See
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Modifications are possible in the described arrangements, and other alternative arrangements are possible within the scope of the claims.