Optical DUV (deep ultraviolet, 193 nm) immersion lithography with NA’1.3 has the capability of printing half-pitch features down to about 40 nm. The potential next-generation lithography (NGL) technologies include EUV (extreme ultraviolet), maskless, and nano-imprint lithography [1]. However, all these NGL technologies face their own technological challenges and still need a long development time before their applications in high-throughput manufacturing. Recently, double patterning has attracted much industrial interest which prints less dense line/space or contact hole patterns twice on the same wafer to finally obtain dense patterns with double spatial frequency [2]. In principle, a similar multiple-patterning concept can be developed but both need extremely high alignment accuracy. It is a severe challenge to significantly reduce the misalignment budget in a lithographic process to meet the multiple-patterning requirement at 32 nm half pitch and below. Therefore, post-lithography misalignment correction will be a promising alternative technology enabling multiple patterning (including double patterning) for future semiconductor manufacturing. It provides a production-worthy method for the whole semiconductor industry to continue device scaling beyond sub-40 nm generation with no need of NGL technology.
Several post-lithography misalignment correction techniques based on the shadow effect in anisotropic plasma etch or sputtering/evaporation processes are invented which allow us to significantly reduce the misalignment created in a lithographic process. Next, we demonstrate the forming mechanism of misaligned dense line/space patterns during a double-patterning process. Similar misalignment mechanism exists in the multiple-patterning process.
In
The process flow shown in
As demonstrated before, if the ions' incident direction is vertical to the substrate surface, the misalignment will be transferred to the targeted layer. Next, we shall describe a so-called shadow effect which occurs in both subtractive anisotropic plasma etching and additive sputtering/evaporation processes, and can be used to correct the misalignment created during a lithographic process. As shown in
The shadow effect also occurs in an additive process such as sputtering or evaporation deposition as shown in
The misalignment correction process can vary depending on whether a sacrificial layer is used between two exposures (e.g., in a double-patterning process) and when the misalignment can be measured. We shall demonstrate the correction processes based on the shadow effect of anisotropic plasma etching without a sacrificial layer first.
If the misalignment can be measured right after the exposed resist is developed and baked, then the correction process is shown in
Another possibility exists if a sacrificial (to be used as a hard-mask) layer is deposited between two lithographic exposures as shown in FIG. 6(3). In this case, misalignment can be corrected with a similar tilted etching when the pattern on the resist is transferred to the hard-mask layer. First, the targeted layer is patterned with semi-dense features wherein the size of lines is three times of the size of spaces. Then a hard-mask layer is deposited and an optional CMP step may be used to planarize the surface. After this, a resist is spun on the top and the second lithographic step will print another pattern of semi-dense features which are the same as the previous pattern and ideally should be shifted by a distance equal to the space size. Due to the misalignment in the second exposure, the shift distance will not be exactly equal to the desired value. As a result, the distance B indicated in FIG. 6(4) is not equal to C. Apparently, C-B (assuming C>B) is the misalignment which can be measured right after the lithographic step. After the misalignment data is available, the tilted etching will be applied to correct this error during the following dry etching process. The goal is to create equal line/space pattern (e.g., size=A as shown in step (7)) with double spatial frequency. Ideally, if the hard-mask structure such as slope and CD does not change during the following etching, then the bottom CDs as indicated in FIG. 6(5) should be equal ( i.e., A′=A) such that the transferred line/space structures in the targeted layer have the uniform size “A” everywhere. Practically, however, the shape of hard-mask structures may slightly change after dry etching; therefore, A′ will be close, but not exactly equal to A. Similar conclusion about this small difference is applicable to all the cases discussed in this patent, but not mentioned repeatedly elsewhere.
On the other hand, if misalignment can not be measured right after the lithographic step, then we will not be able to apply the shadow effect to correct the misalignment during the first following etching. In this condition, the first anisotropic etching direction will still be vertical as shown in FIG. 7(4) due to the lack of real-time data for correction. After this plasma etching, the misalignment in the resist pattern will be transferred to the hard mask layer underneath (e.g., A≠B). If misalignment can be measured only after the first etching (with patterned resist on the top) is finished, then this hard mask layer is necessary as we shall apply the tilted etching to correct the misalignment during the second etching which will transfer the pattern on the hard mask to the targeted layer as shown in step (5).
All we discussed before is to use the subtractive shadow effect of a tilted anisotropic etching to correct the misalignment created during the lithographic processes. Another possibility is to apply the additive shadow effect of a sputtering/evaporation as demonstrated before to correct the misalignment. As shown in FIG. 8(1) and (2), the targeted layer is deposited on top of the substrate and patterned with semi-dense features first. A sacrificial material is then deposited to fill the trenches and may be polished (with a CMP process) to planarize the surface. A resist thin film is spun on the top and another pattern of semi-dense features is printed on the resist, however, with a misalignment such that unequal distances are created in the following vertical dry etching (e.g., A≠B as shown in (4)). After that, the misaligned pattern is etched into the targeted layer as shown in (5). A following isotropic etching (either wet or dry) will be used to produce the undercut structures as shown in (6) assuming the shape of the top sacrificial layer is not changed. However, this assumption is not essential and a slight change of the shape of top sacrificial layer due to the isotropic etching can be allowed. This undercut forming step is important in that it will remove the undesired effect of shrinking the trench in the following sputtering/evaporation process. The misalignment correction is then achieved by tilting the sputtering angle (toward the left side in this example) such that only the top and the left side wall are covered by the sputtering material. In reality, the tilting angle can be arbitrary (2-D) depending on the misalignment in both X and Y directions. In this way, the unequal width of line structures as seen in FIG. 8(7) can be compensated such that uniform line CD as shown in (8) can be obtained. In step (9), a CMP process is applied to remove the top layers and expose the sacrificial layer which will be etched away in step (10). The final line/space structures after sacrificial release with double spatial frequency is shown in FIG. 8(10).
In all above discussions, we assume that misalignment is uniform for every field on the wafer. However, practically each field might have different misalignment (in both X and Y); therefore, it is valuable to develop local correction technology which allows us to correct varying misalignment on different fields in the same etching process. There are two possible ways to achieve this. The first way is to divide the bottom (or top/both) electrode of etching chamber to a number of smaller areas and each of them is electrically isolated from each other such that different voltages can be applied to different areas. In this way, we are able to control the voltages applied to different areas on the same wafer and adjust the ions' speed for different areas during the same plasma etching. Since the correction is affected by the local ion speed, non-uniformity of misalignment can be significantly reduced. The second way is to locally adjust the etching angle, which needs the capability to locally adjust the angles of emitting surface of electrodes. For this purpose, electrodes can be designed to consist of a number of smaller pieces of metals and each of them can be moved (up and down) and rotated independently.
For sputtering/evaporation-based local correction of non-uniform misalignment, the local control of incident speed and angle of sputtering atoms can be achieved by inserting a speed/angle filter (which can determine the local incident speed and angle of atoms) between sputtering source and wafer/substrate.