The present disclosure relates to the field of semiconductor manufacturing device and, more particularly, relates to a pre-cleaning chamber and a semiconductor processing apparatus containing the same.
Semiconductor processing apparatus is currently widely used in the manufacturing processes of semiconductor integrated circuits, solar cells, flat display panels and other products. The semiconductor processing apparatus, widely used in industry field, utilizes different types of plasma for processing, such as the DC discharge plasma, capacitively coupled plasma (CCP), inductively coupled plasma (ICP), and electron cyclotron resonance (ECR) plasma. The semiconductor processing apparatus are often used in manufacturing processes including steps such as deposition, etching, and cleaning.
During the manufacturing processes, in order to improve product quality, a pre-clean process is often performed to remove oxides and other impurities on the wafers before a deposition process. Conventionally, the working principle of a pre-cleaning chamber often includes forming plasma by exciting a cleaning gas, such as argon, helium, or hydrogen in the chamber. The formed plasma is used to perform chemical reaction and physical bombardment on the wafer. Thus, the impurities on the surface of the wafer can be removed.
In the semiconductor manufacturing process, as the integration levels of chips increase, the widths of the interconnections and wire spacing have been reduced. As a result, resistance and parasitic capacitance increase, which further increases delays of RC signals. Thus, low-k materials, i.e., materials with low dielectric constants, are used as interlayer dielectrics. However, in the pre-clean process, technical issues may still arise. For example, ions in the plasma may generate certain kinetic energy under the sheath voltage of the plasma. The ions may penetrate into the low-k material when the kinetic energy drive the ions to move close to the wafer surface. As a result, the quality of the low-k material may degrade, which may further adversely affect product performance.
The present disclosure provides a pre-cleaning chamber and a semiconductor processing apparatus to overcome at least one of the technical problems in the related technologies. The apparatus provided in this disclosure is able to prevent low-k material from being adversely affected by ions in plasma, by filtering the ions from the plasma when the plasma is moving towards the wafer surface. Embodiments of the present disclosure may improve the performance of related products.
One aspect of the present disclosure provides a pre-cleaning chamber. The pre-cleaning chamber includes a cavity, a top cover of the cavity, an ion filtering unit with venting holes. The ion filtering unit is configured to divide the cavity into an upper sub-cavity and a lower sub-cavity and to filter out ions from plasma when the plasma is moving through the filtering unit from the upper sub-cavity to the lower sub-cavity. The pre-cleaning chamber also includes a carrying unit located in the lower sub-cavity for supporting a wafer.
Optionally, the ion filtering unit includes one or more filtering plates; and each filtering plate includes a plurality of venting holes distributed in the filtering plate. At least one of the filtering plates includes venting holes with maximum diameters no greater than a sheath thickness of plasma times two.
Optionally, the ion filtering unit includes one filtering plate. The one filtering plate divides the cavity into the upper sub-cavity and the lower sub-cavity. The plurality of venting holes connect the upper sub-cavity and the lower sub-cavity.
Optionally, the ion filtering unit includes N filtering plates arranged vertically in the cavity, N being an integer greater than 1. The filtering plates divide the cavity into the lower sub-cavity, (N−1) middle sub-cavities, and the upper sub-cavity.
Optionally, the venting holes are distributed uniformly in the filtering plate.
Optionally, the venting holes are distributed in the filtering plate according to processing deviations on a wafer placed on the carrying unit.
Optionally, a distribution density of the venting holes is determined according to a processing rate.
Optionally, a venting hole is a through hole with a trapezoid shaped cross section or a step-shaped cross section.
Optionally, the venting holes are through holes, a diameter of a venting hole ranging from about 0.2 mm to about 20 mm.
Optionally, the venting holes are cone-shaped holes or multi-cylinder-shaped holes, a maximum diameter of a venting hole being no greater than 20 mm, and a minimum diameter of a venting hole being no smaller than 0.2 mm.
Optionally, the filtering plate is made of an insulating material, a metal coated with insulating materials, or a combination thereof.
Optionally, a thickness of a filtering plate ranges from about 2 mm to about 50 mm.
Optionally, the carrying unit includes a heating device for heating the wafer.
Optionally, the carrying unit includes an electrostatic chuck for fixing the wafer by electrostatic forces, and the heating device is positioned in the electrostatic chuck.
Optionally, the cavity includes a protection layer on an inner surface of the cavity, the protection layer being of an insulating material.
Optionally, the cavity further includes an inner liner on an inner sidewall of the cavity, the inner liner being made of an insulating material, a metal coated with insulating material, or a combination thereof.
Optionally, the top cover is of a dome shape, and is made of an insulating material.
Optionally, the top cover is of a barrel shape, with a top ceiling, and made of an insulating material.
Optionally, the top cover further includes a Faraday shielding piece that is positioned on an inner sidewall of the top cover, the Faraday shielding piece being made of a metal, an insulating material coated with a conductive material, or a combination thereof.
Optionally, the Faraday shielding piece includes at least one slit along an axial direction of and extending through the shielding piece.
Optionally, the pre-cleaning chamber includes an inductance coil, and an RF matching device and a radio frequency (RF) power supply connected to the inductance coil sequentially. The inductance coil is wound and overlying along an outer periphery of a sidewall of the top cover, the inductance coil being a helical solenoid with one or more turns. The RF power supply provides RF power to the inductance coil.
Optionally, diameters of turns of the helical solenoid are same or increase from top to bottom of the helical solenoid.
Another aspect of the present disclosure provides a plasma processing apparatus. The apparatus includes one or more of the pre-cleaning chambers as described above.
Another aspect of the present disclosure provides a wafer pre-cleaning process. The process includes providing a pre-cleaning chamber with a cavity, a top cover of the cavity, an ion filtering unit dividing the cavity into an upper sub-cavity and a lower sub-cavity, the ion filtering unit including venting holes, and a carrying unit located in the lower sub-cavity. The process further includes placing a wafer on the carrying unit; forming plasma in the upper sub-cavity; filtering out ions from the plasma when the plasma moves through the filtering unit from the upper sub-cavity into the lower sub-cavity through the venting holes; and pre-cleaning the wafer on the carrying unit.
Optionally, the ion filtering unit includes one or more filtering plates, each filtering plate having a plurality of venting holes.
Optionally, the top cover is of a dome shape or of a barrel shape.
The present disclosure has several advantages. In the pre-cleaning chamber provided by the present disclosure, by arranging the ion filtering unit above the carrying unit in the cavity, ions in the plasma may be filtered out when the plasma is moving downward to the carrying unit during the pre-cleaning process. Only free radicals, atoms, and molecules are able to reach the wafer surface on the carrying unit. Adverse effects on the low-k materials on the wafer, caused by ions in the plasma, may be prevented. The pre-cleaning chamber may have improved performance. Further, because the plasma passing through the ion filtering unit does not contain ions, the free radicals, atoms, and molecules may diffuse onto the wafer surface. No biasing voltage is needed to be applied on the wafer. Biasing devices such as biasing power supply and matching devices are not needed. The fabrication cost of the pre-cleaning chamber may be further reduced.
In the semiconductor processing apparatus provided by the present disclosure, by using the disclosed pre-cleaning chamber, adverse effects on the low-k materials on the wafer caused by ions in the plasma, may be reduced or prevented. The plasma processing apparatus may have improved performance.
The following drawings are merely examples for illustrative purposes according to various disclosed embodiments and are not intended to limit the scope of the present disclosure.
For those skilled in the art to better understand the technical solution of the invention, reference will now be made in detail to exemplary embodiments of the invention, which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings to refer to the same or like parts.
It should be noted that in this disclosure, the figures are only for illustrative purposes and do not reflect the actual ratios or dimensions of the objects.
An ion filtering unit may be located above the carrying unit 23 in the cavity 21. The ion filter unit may be configured to filter the ions when the plasma is moving downward to the carrying unit 23 from above the carrying unit 23. The structure and function of the ion filtering unit is described in details as follows. In particular, in one embodiment, the ion filtering unit includes a filtering plate 24. The filtering plate 24 may be made of insulating materials or metals coated with insulating materials. The insulating material may be ceramic and/or quartz. The thickness of the filtering plate 24 may range from about 2 mm to about 50 mm. Further, the filtering plate 24 may divide the cavity into an upper sub-cavity 211 and a lower sub-cavity 212. The carrying unit 23 may be located in the lower sub-cavity 212. Optionally, the vertical distance between the filtering plates 24 and the carrying unit 23 may be greater than 20 mm.
A plurality of venting holes 241 may be distributed in the filtering plate 24 to connect the upper sub-cavity 211 and the lower sub-cavity 212. The venting holes 241 may be uniformly distributed across the surface of the filtering plate 24. As shown in
In one embodiment, the venting hole 241 may be through holes. The diameter of a venting hole 241 may be no longer than twice the sheath thickness of the plasma. Optionally, the diameter of a through hole may range from about 0.2 mm to about 20 mm. The sheath of plasma is a non-neutral region formed between the boundary of the plasma and the sidewall of the cavity 21. In a pre-cleaning process, the RF power supply 27 may provide RF power to the inductance coil 25 to form plasma in the upper sub-cavity 211. The formed plasma may diffuse towards the carrying unit 23. When the plasma is passing through the venting holes 241 in the filtering plate 24, because the maximum diameter of a venting hole 241 is no longer than twice the sheath thickness of the plasma, the ions in the plasma may transform into other forms, such as atoms, because of the sizes of the venting holes 241. Thus, no ions would be contained in the plasma after passing through the venting holes 241. The plasma may only include free radicals, atoms, molecules, etc. The free radicals, atoms, and molecules may keep diffusing downward until reaching the wafer surface on the carrying unit 23. The plasma may start etching the wafer after reaching the wafer surface. Thus, by using the filtering plate 24, ions in the plasma may be filtered out. Such a process may reduce or prevent adverse effects caused by ions in the plasma on the low-k materials, which are used as dielectrics in the wafers. Product performance may thus be improved.
Because the plasma that has passed through the ion filtering unit does not contain ions, the free radicals, atoms, and molecules may diffuse onto the wafer surface. No bias voltage is needed to be applied on the wafer. Biasing devices such as biasing power supply and matching devices are therefore not needed. The fabrication cost of the pre-cleaning chamber may be further reduced.
In one embodiment, the cavity 21 may include an inner liner 28 positioned on the inner sidewall of the cavity 21. The inner liner 28 may be made of insulating materials, or metals coated with insulating materials. The insulating materials may include ceramic and/or quartz. By using the inner liner 28, the sidewall of the cavity 21 may be protected from being etched or eroded by the plasma. The service time and the maintainability of the pre-cleaning chamber may be improved. The activity of the free radicals in the plasma may be modulated or adjusted. In some embodiments, a protection layer made of insulating materials may be formed on the inner surface of the cavity 21. For instance, an oxidation treatment may be applied on the inner surface, e.g., sidewall, of the cavity 21.
In one embodiment, the carrying unit 23 may include an electrostatic chuck, configured to fix or hold the wafer using electrostatic force. The electrostatic chuck may include a heating device 29 in the electrostatic chunk, configured to heat the wafer. By using the heating device, the activity of the reactions between the plasma and the wafer surface may be increased. Processing rate may be improved or increased. Optionally, the heating temperature of the heating device 29 may range between about 100° C. to about 500° C. The heating period may range between about 5 seconds to about 60 seconds. In some embodiments, the carrying unit 23 may be a wafer holder for holding the wafer. In this case, the wafer holder may include the heating device 29 therein. The heating device 29 may include any suitable heating mechanism such as resistance wire heating.
It should be noted that, in one embodiment, the venting holes 241 may be through holes. In some embodiments, the cross-sections of the venting holes 241 may have various shapes. The specific shapes of the venting holes 241 should not be limited by the embodiments.
It should also be note that, in one embodiment, the ion filtering unit may include a filtering plate 24. In embodiments of the present disclosure, the number of filtering plate 24 should not be limited to the embodiment of the present disclosure. As shown in
In some embodiments, as shown in
It should be further noted that, in practice, the filtering plates 24 may be fixed in the cavity through various mechanisms. For example, flanges may be arranged at locations corresponding to the filtering plates 24 on the inner sidewall of the cavity. The peripheral region on the lower surface of a filtering plate 24 may be fixed and/or jointed onto the upper surface of the corresponding flanges through lap joint connections and/or thread connections.
It should be further noted that, in some embodiments, the number of turns of an inductance coil 25 may be one or more. The number of turns of an inductance coil 25 may be determined or adjusted according to the plasma distribution in the upper sub-cavity 211. In addition, the diameters of the turns of the helical solenoid may be same, or may increase, from the top to the bottom of the helical solenoid.
The top cover of the pre-cleaning chamber is described in detail. In particular, the top cover 30 may have a barrel shape with a ceiling 301. The top cover 30 may be made of insulating materials, such as ceramic and/or quartz. The barrel-shaped structure refers to a cylinder with a closed periphery formed by surrounding of the side wall of the top cover 30, which is closed by the ceiling 301 at the top, that is, the top cover 30 is similar to an inverted bucket. Compared to a dome shaped top cover, a top cover 30 with the barrel shape may be easier to manufacture. The fabrication cost to make the top cover 30 can be reduced. The fabrication cost and the utilization cost of the pre-cleaning chamber can thus be reduced. The inductance coil 25 may be wound and overlying along an outer periphery of a sidewall of the top cover 30. The inductance coil 25 may be a helical solenoid with one or more turns.
Further, a Faraday shielding piece 31 may be arranged on the inner sidewall of the barrel-shaped top cover 30. The Faraday shielding piece 31 may be made of metals or insulating materials coated with suitable conductive materials. The insulating materials may include ceramic and/or quartz. By using the Faraday shielding piece 31, electromagnetic field can be shielded to reduce plasma erosion on the upper sub-cavity 211. The service time of the upper sub-cavity 211 may be increased or improved. The cavity may be easier to clean and the utilization cost of the cavity may be reduced. It should be noted that, to ensure the Faraday shielding piece 31 maintains at the floating potential, the top of the Faraday shield piece 31 should be lower than the upper boundary of the sidewall of the top cover 30. In addition, the top of the Faraday shield piece 31 should not contact the ceiling 301, and the bottom of the shield piece 31 should not contact the cavity 21.
Optionally, the Faraday shielding piece 31 may include at least one slit 311 along the axial direction and extending through the Faraday shielding piece 31. As shown in
Another aspect of the present disclosure includes a semiconductor processing apparatus. The semiconductor processing apparatus may include one or more of the disclosed pre-cleaning chambers.
In the embodiment of the semiconductor processing apparatus provided in the present disclosure, using the pre-cleaning chamber provided in the present disclosure, the performance of related products may be improved by preventing the adverse effects on the low-k materials caused by ions in plasma.
Number | Date | Country | Kind |
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2013-10341787.3 | Aug 2013 | CN | national |
This application claims the priority of PCT/CN2014/083709 filed on Aug. 5, 2014, which claims priority of Chinese Patent Application No. 201310341787.3 filed on Aug. 7, 2013, the entire content of all of which is incorporated herein by reference.
Number | Date | Country | |
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Parent | PCT/CN2014/083709 | Aug 2014 | US |
Child | 15012941 | US |