Patent Application
20160178467
Pressure sensing devices have become ubiquitous the past few years as they have found their way into many types of products. Utilized in automotive, industrial, consumer, and medical products, the demand for pressure sensing devices has skyrocketed and shows no signs of abating.
Pressure sensing devices may include pressure sensors as well as other components. Pressure sensors may typically include a diaphragm or membrane. Typically, this membrane is formed by creating the Wheatstone bridge in a silicon wafer, then etching away the silicon from the opposite surface until a thin layer of silicon is formed beneath the Wheatstone bridge. The thin layer is a membrane that may be surrounded by a thicker, non-etched silicon water portion forming a frame. When a pressure sensor in a pressure sensing device experiences a pressure, the membrane may respond by changing shape. This change in shape causes one or more characteristics of electronic components on the membrane to change. These changing characteristics can be measured, and from these measurements, the pressure can be determined.
Often, the electronic components are resistors that are configured as a Wheatstone bridge located on the membrane. As the membrane distorts under pressure, the resistance of the resistors also changes. This change results in an output of the Wheatstone bridge. This change can be measured through wires or leads attached to the resistors.
Conventional pressure sensors may be formed of a diaphragm or membrane attached to and surrounded by a frame. In some pressure sensors, the sensor may measure a pressure difference between two different locations, such as the two sides of a filter. These may be referred to as gauge pressure sensors. In other types of sensors, an output may be compared to a known, consistent pressure, which may typically be a vacuum. This type of sensor may be referred to as an absolute pressure sensor. In an absolute pressure sensor, a first side of the membrane may be exposed to the media to be measured, while a second side may be in contact with the reference chamber, which may be a vacuum chamber. The first side of the membrane exposed to the media may be subjected to high pressures.
This high pressure on the membrane may result in a highly concentrated tensile force at the frame-membrane junction. This stress may create cracks or other damage in the silicon crystal structure of the membrane. This damage may lead to errors in pressure measurements or non-functionality of the pressure sensor.
Metals for bonding a pressure sensor to another device may be forced into the cavity or distributed along a sidewall of the sensor during various processing steps, thereby causing electrical shorts or other damage to the sensor.
Undesirable electrical charges may affect the sense elements if they are not shielded properly. And electrostatic discharge may damage the sensor or its components.
Additionally, it may be desirable to provide temperature sensing.
Thus, what is needed are structures and methods of protecting a membrane on a pressure sensor from damage due to high pressures. In some embodiments, formation of a bondable metal stack that will avoid shorts is needed. In certain embodiments, a field shield is needed. In various embodiments, a temperature sensor and/or circuitry that prevents damage from electrostatic discharge is needed.
For the avoidance of doubt, the above-described contextual background shall not be considered limiting on any of the below-described embodiments, as described in more detail below.
The following presents a simplified summary of the specification in order to provide a basic understanding of some aspects of the specification. This summary is not an extensive overview of the specification. It is intended to neither identify key or critical elements of the specification nor delineate the scope of any particular embodiments of the specification, or any scope of the claims. Its sole purpose is to present some concepts of the specification in a simplified form as a prelude to the more detailed description that is presented in this disclosure.
Accordingly, embodiments of the present invention may provide structures and methods of protecting a membrane on a pressure sensor from damage due to high pressures. An illustrative example may provide a pressure sensor having a first wafer portion including a handle wafer or layer and a device wafer or layer, the handle wafer or layer having a backside cavity, the backside cavity defining a membrane in the device wafer or layer. The pressure sensor may further include a bonding layer over the membrane and a cap over or attached to the bonding layer. The bonding layer may be an oxide layer formed on the device wafer, the cap wafer, or both. In various embodiments of the present invention, a reference cavity may be formed in one or more of the membrane, the bonding layer, the cap, or other layer or portion of the pressure sensor. The reference cavity, regardless of which layer or layers in which it resides, may have a lateral or planar width that is narrower than a width of the backside cavity in at least one direction. In other embodiments, the reference cavity may be shaped such that it has an outer edge that is within an outer edge of the backside cavity. This may provide reinforcement and reduce stress at a junction of the membrane and frame. Also, the narrower reference cavity may define an active portion of the membrane such that the active portion of the membrane is spaced away from the device layer and backside cavity junction. (As used here, a membrane may be defined by a backside cavity and a frame, while a portion of the membrane, the active membrane, may be defined by a reference cavity. Also as used here, the more general term membrane may mean either membrane or active membrane, particularly where the distinction is not critical.) In various embodiments of the present invention, the device wafer or layer may be formed of a silicon wafer portion or other material, the bonding layer may comprise silicon dioxide or glass or other material, while the cap or cap layer may be formed of a silicon wafer portion, silicon dioxide or glass, or other glass, including a heat-resistant glass with a low temperature coefficient or temperature coefficient close to that of silicon, such as a borosilicate glass including Pyrex®, which is licensed by Corning Incorporated, or other material.
Embodiments of the present invention may provide sensors that simplify manufacturing. Again, a membrane on a sensor may be fabricated by first creating a Wheatstone bridge in a silicon wafer, and then etching away the silicon beneath the Wheatstone bridge to form a thin membrane of silicon containing the Wheatstone bridge. One factor affecting the sensitivity of the device may be the proximity of the resistors of the Wheatstone bridge to the edges of the active membrane. Embodiments of the present invention may provide a pressure sensor in which the edges of an active portion of the membrane are determined by the location of the reference cavity, rather than the backside cavity cut from the back of the silicon. Because the reference cavity is much thinner than the cavity cut from the backside of the silicon, it may be easier to align the Wheatstone bridge to the edges of the active membrane during manufacturing. The relative thinness of the reference cavity may also help in controlling the size of the cavity. Moreover, the reference cavity and the Wheatstone bridge may be on the same side of the device, rather than on opposite sides, which may make them easier to align. Also, by locating the reference cavity in the device wafer or bonding layer on the device wafer, alignment during bonding may not be as critical as compared to when a reference cavity is etched into a cap layer or wafer, since this second configuration may require the alignment of two wafers during bonding.
Embodiments of the present invention may also provide pressure sensors that are protected from damage by high pressures in at least two ways. In conventional pressure sensors, the size of the membrane may be determined by the size of the cavity etched into the backside of the wafer. In various embodiments of the present invention, this restriction on the size of the backside cavity may be removed. Significantly, the size of the active portion of the membrane is no longer determined by the size of the backside cavity, and thus the size of the backside cavity can be made much larger than the size of the active portion of the membrane. As the size of the backside cavity increases, a tensile stress generated at the corner of the backside cavity may be reduced. Also, the edge of the active membrane, where the most stress is generated, is no longer proximate with the corner of the back cavity. Thus, the highest stress may not only be reduced, but the locus of the highest stress may shift to a top side corner of the active membrane, and this stress may be compressive rather than tensile. Silicon can withstand a higher compressive stress than tensile stress before fracturing, further protecting the device from damage.
Embodiments of the present invention may also limit damage caused by high pressures of fluids in the backside cavity by limiting an amount the membrane may deflect. Specifically, the reference cavity above the active portion of the membrane may have a height or thickness such that it may limit the deflection of the membrane. This may prevent the membrane from deflecting more than an amount where damage may occur due to high or excessively high pressures. In a specific embodiment of the present invention, it may be desirable that the membrane deflect a first distance during normal operation. It may also be expected that damage may occur if the membrane is allowed to deflect a second distance, the second distance greater than the first. In this example, the reference cavity may have a thickness or height such that the membrane is prevented from deflecting more than a third distance, the third distance greater than the first distance to allow desired operation, but less than the second distance to prevent damage.
In various embodiments of the present invention, various layers may be included or omitted in embodiments of the present invention. For example, an optional layer of eutectically bondable metal or other material may be placed on the back or bottom of the device. This layer may be formed as a thin layer of gold on the back or bottom of the device for bonding purposes. This layer may facilitate bonding to a second integrated circuit device, a device package, a device enclosure, or a printed or flexible circuit board or other substrate. An optional layer of polysilicon or other material may be placed or formed on a top surface of device layer or wafer. This optional layer may be located on a top surface of the device layer and under the bonding or oxide layer. That is, optional layer may be located between device layer or wafer and bonding or oxide layer.
Various embodiments of the present invention may incorporate one or more of these and the other features described herein. A better understanding of the nature and advantages of the present invention may be gained by reference to the following detailed description and the accompanying drawings.
The following description and the drawings set forth certain illustrative aspects of the specification. These aspects are indicative, however, of but a few of the various ways in which the principles of the specification may be employed. Other advantages and novel features of the specification will become apparent from the following detailed description of the specification when considered in conjunction with the drawings.
The various embodiments are now described with reference to the drawings, wherein like reference numerals are used to refer to like elements throughout. In the following description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the various embodiments. It may be evident, however, that the various embodiments can be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form in order to facilitate describing the various embodiments.
This pressure sensor may include cap 160 attached to a top of a first wafer portion of a pressure sensor, where the first wafer portion further includes device wafer or layer 130 and handle wafer or layer 110. Device wafer of layer 130 may be supported by handle wafer or layer 110. Handle wafer or layer 110 may include a backside cavity 114 defining an edge of sidewall 112. Backside cavity 114 may extend from a bottom surface of handle wafer or layer 110 to a bottom 122 of oxide layer 120. Device layer 130 may have one or more electrical components 132 formed in its top surface. Electrical components 132 may be protected by oxide layer 140.
Cap 160 may include oxide layer 150 on a bottom surface, though oxide layer 150 may be omitted in various embodiments of the present invention. Cap 160 may be attached to device layer 130 by fusion bonding oxide layer 150 to oxide layer 140. Where one or more oxide layers 140 or 150 are omitted, cap 160 may be attached to device layer 130 by fusion bonding cap 160 to oxide layer 140, by fusion bonding oxide layer 150 to device layer 130, or by fusion bonding cap layer 160 directly to device layer 130. Oxide layer 150 may be etched before fusion bonding to form a recess, which may form reference cavity 152. Reference cavity 152 may be defined by outer edge 154. While reference cavity 152 is formed in oxide layer 150, in this and other embodiments of the present invention, reference cavity 152 may be formed in oxide layer 150 and cap layer 160, in oxide layer 150 and oxide layer 140, in device layer 130, or in any combination thereof.
Reference cavity 152 may have a width that is narrower than a width of backside cavity 114 in at least one direction. Specifically, a distance 192 from a center line of the pressure sensor to an edge 154 of reference cavity 152 may be shorter than a distance 194 from a center line to an edge 112 of backside cavity 114. In this way, an active portion of a membrane defined by edge 154 may be narrower than the membrane defined by edge 112. In various embodiments of the present invention, an outside edge of reference cavity 152 may be inside of an edge of backside cavity 114, where the edges are considered vertically in this and other embodiments.
In conventional pressure sensors, cap 160 may be absent. In such case, as a membrane or diaphragm formed by a backside cavity deflects, a junction point between a diaphragm and frame may experience a large tensile force. In this figure, if cap 160 were absent, this force would be concentrated at location 124. This concentration of force may result in cracks or other damage at or near location 124.
Accordingly, embodiments of the present invention may provide a cap or other reinforcing structure, such as cap 160, where a reference cavity, such as reference cavity 152, may be narrower than a backside cavity, such as backside cavity 114. In this case, location 124 may be reinforced by cap 160. Also, the location of highest stress may move from the location 124 to location 159. The stress at location 159 is compressive when pressure is applied to the underside of membrane 122, rather than tensile. Further, even when one or more cracks or other damage appears at or near location 124, the cracks are away from the active membrane area, which is defined by reference cavity 152.
Also, in conventional pressure sensors, a membrane or diaphragm may deflect an amount that may cause damage to the pressure sensor. This may occur due to the presence of unforeseen high pressures of fluids in the backside cavity, or by another event.
Accordingly, embodiments of the present invention may provide a reference cavity having height or thickness that limits a maximum deflection of the active membrane. In various embodiments of the present invention, this height or thickness may be such that an active membrane may be able to deflect enough for desired operation, but not enough to cause damage to the pressure sensor. Specifically, edge 154 may have a height that allows the active membrane to deflect enough for proper operation of the pressure sensor, but not enough to cause damage or rupture the membrane. Instead, the active membrane deflects such that it reaches a top of the reference cavity 152 and cannot go any further even if the pressure continues to increase, preventing damage from being caused. That is, the top of the reference cavity 152 may act as a deflection stop to prevent damage to the pressure sensor. In various embodiments of the present invention, the topside of reference cavity 152, the underside of cap 160, may include one or more bosses or other structures that may determine a height of the reference cavity 152 and the maximum deflection of the active membrane.
In various embodiments of the present invention, the structures used in pressure sensors may have various sizes and width. For example, handle wafer or portion may have a thickness of 250 to 600 microns, though it may be thinner than 250 or thicker than 600 microns. Device wafer or layer 130 may be considerable thinner since it forms the membrane. This thickness may be 15-25 microns, though it may be thinner than 15 or thicker than 25 microns. The cap wafer or layer 160, and other cap wafer or layers, may have a thickness that is at least approximately 150 microns, though it may be narrower or thicker than 150 microns. The buried or bonding oxide layers 120, 140, and 150 may have a thickness between 0.1 and 3 microns, though they may be thinner or thicker than this range. The reference cavity 136, as with the other reference cavities in other embodiments of the present invention, may have a thickness or height of 100 nm to 500 nm, though in other embodiments may it may be from 50 nm to 1000 nm. A specific embodiment of the present invention may have a reference cavity having a height of 4000 A.
In this and other embodiments of the present invention, an optional layer 117 of eutectically-bondable metal or other material may be placed on the back or bottom of handle wafer 110. This layer may be formed as a thin layer of gold on the back or bottom of the device for bonding purposes. Layer 117 may facilitate bonding to a second integrated circuit device, a device package, a device enclosure, or a printed or flexible circuit board or other substrate. Optional layer 117 has been omitted from the other figures for clarity.
Referring now to
Specifically, a solder preform 2373a, 2373b, 2375a, 2375b is deposited, stamped, or otherwise formed on substrate 2371a, 2371b in a pattern intended to match the footprint of metal layer 2217. The solder pattern may be rectangular, circular, or any number of patterns in which the footprint of a die may be formed.
The metal layer 2217 is formed on the bottom side of the handle wafer 110 to adhere more strongly than would solder to the oxide or silicon on the bottom of wafer 110. The metal layer 2217 may be formed as a gold layer or as a combination of metals. One preferably metal combination for use in forming metal layer 2217 is co-deposited Ti-Tungsten alloy sputtered onto the bottom of handle wafer 110, followed by gold sputtered onto the Ti-Tungsten alloy in the same vacuum pump down during processing, such that any delay that might otherwise be caused by allowing a return to atmosphere is avoided. The Ti-Tungsten layer adheres to the silicon and/or oxide on which it is sputtered. And it prevents the gold layer from reaching the silicon or oxide layer. Other metal systems may also be used in forming metal layers such as layer 2217. For example, in a device having a glass bottom layer, a Tantalum-Platinum layer or a Tantalum-Platinum layer followed by a gold layer may be deposited to form metal layer 2217.
In one embodiment, a Titanium-Tungsten layer that is approximately 1500 angstroms thick is co-sputtered using a sputtering target composed of an alloy having a 1 to 9 ratio of the two elements. Following deposition of the Titanium-Tungsten layer, a layer of gold is sputtered onto the device, preferably in the same vacuum chamber and using the same vacuum pump down. By maintaining the Titanium and Tungsten in a vacuum, exposure to atmosphere and the attendant oxidation is avoided. Avoiding the oxidation is important, because following the deposition of Titanium and Tungsten, a gold layer is deposited. And gold will not properly adhere to an oxidized surface. It is preferable to sputter approximately 5000 Angstroms of gold onto the Titanium-Tungsten layer in this embodiment. A person of skill will recognize that it is possible to have a significant amount of deviation from the preferred thicknesses of the identified layers without deviating from the scope of the invention. One of ordinary skill in the art will recognize that soldering a device with a gold layer as described in the paragraph will often result in the solder dissipating a significant amount of gold. It will also result in a significant amount of gold moving into the barrier layer of Tungsten. Thus, adjustment of the process steps may be needed to ensure that enough gold remains for the desired eutectic solder process.
It has been observed that deposits sputtered from a Titanium-Tungsten alloy target do not adhere as well to an oxide as does a layer comprising solely Titanium. Thus, in some devices, it will be desirable to initially deposit a layer of Titanium using sputter deposition, followed by deposition of a layer of Tungsten by sputter deposition, upon which a layer of gold is deposited by sputter deposition. Depositing the layers in this three-step process has been observed to result in better adhesion between the metal layer and the substrate. Preferably, the adhesion layer (in this embodiment, Titanium) is less than 500 Angstroms thick. The barrier layer (in this embodiment, Tungsten) should be relatively thick compared to the adhesion layer. Thus, it is preferable that barrier layers be approximately 1500 Angstroms thick. The final metal layer (in this embodiment, gold) may be deposited to a thickness of approximately 5000 Angstroms. It is also possible to form the triple metal layer by first sputtering titanium, followed by a barrier layer comprising Titanium and Tungsten, and finally a layer of gold.
It is preferable, but not required, that all three layers be deposited in the same vacuum pump down because, for example, allowing atmosphere to enter will not only cause an undesirable delay in processing, but it may also cause oxidation or other contamination that would require the addition of cleaning steps. In this triple metal layer, titanium forms an adhesion layer and promotes stronger adhesion of the metals to the silicon or oxide. The tungsten is included to provide a barrier layer between the titanium and gold to prevent the gold from reaching the titanium, silicon or oxide and thereby disrupting adhesion. And the gold is provided for connection to the solder.
Further metal combinations may also be used, including Titanium, nickel and gold in a triple layer system that is similar to the above-identified triple layer system except that nickel rather than tungsten provides the barrier layer. A dual chrome and gold layer may also be used in certain devices. However, it is known that chrome-gold metal layers do not provide the same high level of adhesion that is provided by other combinations that are disclosed herein. Yet another acceptable metal layer system is obtained using a triple layer structure of Titanium, Niobium and Gold. It is anticipated that additional metal layer systems will fall within the scope of the disclosed embodiments of pressure sensors, and this invention is not necessarily limited to the metals disclosed herein.
Referring again to
In
Referring to
Following the application of passivation layer 2727, deep reactive ion etching (“DRIE”) is employed (as indicated on
As indicated in
Referring to
In this and other embodiments of the present invention, an optional layer 137 of polysilicon or other material may be placed or formed on a top surface of device layer or wafer 110. Optional layer 137 may be located on a top surface of the device layer 130 and under the bonding or oxide layer 140. That is, optional layer 137 may be located between device layer or wafer 130 and bonding or oxide layer 140. Polysilicon layer 137 may provide a field shield to stabilize the electrical performance of the resistors or other components 132 on the top surface of device layer 130. Optional layer 137 has been omitted from the other figures for clarity.
Again, reference cavity 152 may have a width that is narrower than a width of the backside cavity 114 in at least one direction. In this in other embodiments, reference cavity 152 may be sized and aligned such that it fits within the outer boundaries of backside cavity 114. The result may be that the device membrane is defined in size by recess 152 in cap 160, instead of backside cavity 114, as is conventional. An example is shown in the following figure.
Referring to
A large p+ diffusion 2233 may also be formed in wafer layer 130, encompassing at least the densest portions of resistor 2232a, and extending laterally to come into contact with the bottom of bonding pad 2235 at the surface where bonding pad 2235 interfaces with wafer layer 130 so that an electrical signal may be conveyed in either direction between bonding pad 2235 and resistor 2232a via diffusion 2233. Diffusion 2233 may also be referred to as an electrical connection. A plurality of such electrical connections may be formed between a plurality of bonding pads and a plurality of implanted components 132 or between two or more implanted components 132. Such diffusions are preferably formed by implanting a very heavy dose of an appropriate impurity to reduce the amount of resistance in the electrical connections. In contrast to this, piezo-resistors, such as resistors 2232a or 2232b are much more lightly doped to provide for an appropriate resistance level and stress responsiveness.
In certain devices, it may be preferable to connect resistor 2232a to bonding pad 2235 using a metal layer (not illustrated) between wafer layer 130 and oxide layer 140. However, in the illustrated embodiments, it is often preferably to use the implanted electrical connection 2233 to preserve the seal between cap 160 and the device layers below the cap. Extending a metal connection across the seal may cause adhesion problems and leave the cavity 152 inadequately sealed. In other embodiments, it may be desirable to extend the electrical connection 2233 from resistor 2232a to a region immediately outside of the outer edge of the cap 160 and provide a metal connection (not illustrated) on top of layer 130 from that region to bonding pad 2235, thereby reducing the implanted length of electrical connection 2233. However, the preferred embodiment is that shown in
Preferably the implant dosage for the lower resistance electrical connection 2233 will be on the order of 1×1015 to 1×1019 atoms per square centimeter. Such a high dosage lowers the resistance for the electrical connectors. In contrast, the resistors will preferably be dosed with a 1×1013 to 1×1015 atoms per square centimeter dosage to enhance the piezo-resistive response. A person of ordinary skill in the art will understand how to vary the dosage according to the specific process being used to fabricate a particular device. A person of ordinary skill will also understand that, generally, after doping, an annealing process is used to impart desirable qualities to the doped material.
When considering an overhead view of a pressure sensor device, it is known that the overhead width of connection 2233 will affect its resistance. In general, widening connection 2233, while remaining in an appropriate scale for a semiconductor device, will reduce its resistance. Similarly, connection 2233 will have lower resistance if the doping is relatively deep, whereas connection 2233 will have increased resistance as the doping becomes shallower. Similarly, as the length of connection 2233 increases, the resistance will be increased.
As illustrated in
Referring back to
The various layers shown here may be omitted, and others may be included consistent with embodiments of the present invention. A specific example of a method of manufacturing an embodiment of the present invention is shown in the following figures.
In
In
In
Again, other embodiments of the present invention may provide pressure sensors having a recess that is narrower in at least one direction than a backside cavity. An example is shown in the following figure.
As before, various techniques may be utilized to manufacture these pressure sensors. Similar steps to those shown in
In
Again, edges 814 of cavity 812 may have other shapes. An example is shown in the following figure.
Cap 160 may include oxide layer 150 on a bottom surface, though in this and other embodiments of the present invention, oxide layer 150 may be omitted. Cap 160 may be attached to device layer 130 by fusion bonding oxide layer 150 to oxide layer 140. Where oxide layer 150 is not used, cap 160 may be fusion bonded directly to oxide layer 140. Oxide layer 140 may be etched before fusion bonding to form a recess, which is reference cavity 142. Etching oxide layer 140, or other oxide layer, provides an advantage in that oxide etching is traditionally a very well-controlled process step. Also, the thickness of the reference cavity may be precisely controlled by the thickness of the thermal oxide layer 140, which is also a very well controlled process. Reference cavity 142 may be defined by outer edge 144. While in this example reference cavity is shown as extending through oxide layer 140, in various embodiments of the present invention, reference cavity 142 may extend only part way through oxide layer 140. As compared to forming a reference cavity in the cap 160 (as shown in
Reference cavity 142 may have a width that is narrower than a width of backside cavity 114 in at least one direction. Specifically, a distance 192 from a center line of the pressure sensor to an edge 144 of reference cavity 142 may be shorter than a distance 194 from a center line to an edge 112 of backside cavity 114. In this way, an active portion of a membrane defined by edge 144 may be narrower than the active membrane defined by edge 112.
In conventional pressure sensors, cap 160 may be absent, or cap 160 may have a recess that forms an opening that is wider than a corresponding backside cavity. In such case, as a membrane or diaphragm formed by a backside cavity deflects, a junction point between a diaphragm and frame may experience a large tensile force. In this figure, if cap 160 were absent, this force would be concentrated at location 124. This concentration of force may result in cracks or other damage at or near location 124.
Accordingly, as described above, embodiments of the present invention may provide a cap or other reinforcing structure, such as cap 160, where a reference cavity, such as reference cavity 142, may be narrower than a backside cavity, such as backside cavity 114. In this case, location 124 may be reinforced by cap 160. Also, the location of highest stress moves from the location 124 to location 149. The stress at location 149 is compressive when pressure is applied to the underside of membrane 122, rather than tensile. Further, even when one or more cracks or other damage appears at or near location 124, the cracks are away from the membrane area, which is defined by reference cavity 142.
Also, in conventional pressure sensors, a membrane or diaphragm may deflect an amount that may cause damage to the pressure sensor. This may occur due to the presence of unforeseen high pressures from fluids in the backside cavity, or by another event.
Accordingly, embodiments of the present invention may provide a reference cavity having height or thickness that limits a maximum deflection of the membrane. In various embodiments of the present invention, this height or thickness may be such that a membrane may be able to deflect enough for desired operation, but not enough to cause damage to the pressure sensor. Specifically, edge 144 may have a height that allows the membrane to deflect enough for proper operation of the pressure sensor, but not enough to cause damage or rupture the membrane. Instead, the membrane deflects such that it reaches a top of the reference cavity 142 and cannot go any further before damage is caused. That is, the top of the reference cavity 142 may act as a deflection stop to prevent damage to the pressure sensor. In this and other embodiments of the present invention, one or more surfaces, such as the top surface of reference cavity 142 may include one or more bosses or other structures that may act as a stop or limit on the amount that an active membrane may deflect.
Again, in various embodiments of the present invention, the structures used in pressure sensors may have various sizes and width. For example, handle wafer or portion may have a thickness of 250 to 600 microns, though it may be thinner than 250 or thicker than 600 microns. Device wafer or layer 130 may be considerable thinner since it forms the membrane. This thickness may be 15-25 microns, though it may be thinner than 15 or thicker than 25 microns. The cap wafer or layer 160, and other cap wafer or layers, may have a thickness that is at least approximately 150 microns, though it may be narrower or thicker than 150 microns. The buried or bonding oxide layers 120, 140, and 150 may have a thickness between 0.1 and 3 microns, though they may be thinner or thicker than this range. The reference cavity 142, as with the other reference cavities in other embodiments of the present invention, may have a thickness or height of 100 nm to 500 nm, though in other embodiments may it may be from 50 m to 1000 nm. A specific embodiment of the present invention may have a reference cavity having a height of 4000 A.
Again, reference cavity 142 may have a width that is narrower than a width of the backside cavity 114 in at least one direction. In this in other embodiments, reference cavity 142 may be sized and aligned such that it fits within backside cavity 114. The result is that the device membrane is defined in size by recess 142 in oxide layer 140, instead of backside cavity 114, as is conventional. An example is shown in the following figure.
The various layers shown here may be omitted, and others may be included consistent with embodiments of the present invention. A specific example of a method of manufacturing an embodiment of the present invention is shown in the following figures.
Cap 160 may include oxide layer 150 on a bottom surface, though oxide layer 150 may be omitted in this and other embodiments of the present invention. Cap 160 may be attached to device layer 130 by fusion bonding oxide layer 150 to oxide layer 140. Where oxide layer 150 is not used, cap 160 may be fusion bonded directly to oxide layer 140, or cap 160 may be bonded directly to device layer 130. Oxide layer 140 may be etched before fusion bonding to form a top portion of a recess, which is reference cavity 142. Device layer 130 may also be etched to form a bottom portion of reference cavity 134. Reference cavity 134 may be defined by outer edges 144 and 136. As compared to forming a reference cavity in the cap 160 (as shown in
Reference cavity 136 may have a width that is narrower than a width of backside cavity 114 in at least one direction. Specifically, a distance 192 from a center line of the pressure sensor to edge 144 and 136 of reference cavity 134 may be shorter than a distance 194 from a center line to an edge 112 of backside cavity 114. In this way, an active portion of a membrane defined by edges 144 and 136 may be narrower than the membrane defined by edge 112.
Also, in conventional pressure sensors, a membrane or diaphragm may deflect an amount that may cause damage to the pressure sensor. This may occur due to the presence of unforeseen high pressures from fluids in the backside cavity, or by another event.
Accordingly, embodiments of the present invention may provide a reference cavity having height or thickness that limits a maximum deflection of the membrane. In various embodiments of the present invention, this height or thickness may be such that a membrane may be able to deflect enough for desired operation, but not enough to cause damage to the pressure sensor. Specifically, edges 136 and 144 may have a height that allows the membrane to deflect enough for proper operation of the pressure sensor, but not enough to cause damage or rupture the membrane. Instead, the membrane deflects such that if it reaches a top of the reference cavity 142 or 134, it cannot go any further before damage is caused. That is, the top of the reference cavity 134 may act as a deflection stop to prevent damage to the pressure sensor. In this and other embodiments of the present invention, one or more surfaces, such as the top surface of reference cavity 134 may include one or more bosses or other structures that may act as a stop or limit on the amount that an active membrane may deflect.
Again, in various embodiments of the present invention, the structures used in pressure sensors may have various sizes and width. For example, handle wafer or portion may have a thickness of 250 to 600 microns, though it may be thinner than 250 or thicker than 600 microns. Device wafer or layer 130 may be considerable thinner since it forms the membrane. This thickness may be 15-25 microns, though it may be thinner than 15 or thicker than 25 microns. The cap wafer or layer 160, and other cap wafer or layers, may have a thickness that is at least approximately 150 microns, though it may be narrower or thicker than 150 microns. The buried or bonding oxide layers 120, 140, and 150 may have a thickness between 0.1 and 3 microns, though they may be thinner or thicker than this range. The reference cavity 134, as with the other reference cavities in other embodiments of the present invention, may have a thickness or height of 100 nm to 500 nm, though in other embodiments may it may be from 50 m to 1000 nm. A specific embodiment of the present invention may have a reference cavity having a height of 4000 A.
Again, reference cavity 134 may have a width that is narrower than a width of the backside cavity 114 in at least one direction. In this in other embodiments, reference cavity 134 may be sized and aligned such that it fits within backside cavity 114. The result is that the device active membrane is defined in size by reference cavity in oxide layer 140 and device layer 130, instead of backside cavity 114, as is conventional. An example is shown in the following figure.
The various layers shown here may be omitted, and others may be included consistent with embodiments of the present invention. A specific example of a method of manufacturing an embodiment of the present invention is shown in the following figures.
The pressure sensor portion in
In other embodiments of the present invention, the pressure sensor portion of
In other embodiments of the present invention, the membrane may include structures such as bosses, racetracks, and other structures. Examples may be found in U.S. Pat. No. 8,381,596, which is incorporated by reference. An example is shown in the following figure.
Cap 160 may include oxide layer 150 on a bottom surface, though oxide layer 150 may be omitted in this and other embodiments of the present invention. Cap 160 may be attached to device layer 130 by fusion bonding oxide layer 150 to oxide layer 140. Where oxide layer 150 is not used, cap 160 maybe fusion bonded directly to oxide layer 140. Oxide layer 140 maybe etched before fusion bonding to form a top portion of a recess, which is reference cavity 142. Device layer 130 may also be etched to form racetracks, bosses, or other structures that may form a portion of reference cavity 134. These structures may limit a maximum deflection of an active membrane to prevent damage to the device due to the presence of high pressures in backside cavity 114 or other event. Reference cavity 134 may be defined by outer edges 144 and 136. As compared to forming a reference cavity in the cap 160 (as shown in
Reference cavity 136 may have a width that is narrower than a width of backside cavity 114 in at least one direction. Specifically, a distance 192 from a center line of the pressure sensor to edge 144 and 136 of reference cavity 134 may be shorter than a distance 194 from a center line to an edge 112 of backside cavity 114. In this way, an active portion of a membrane defined by edges 144 and 136 may be narrower than the membrane defined by edge 112.
As noted above, polysilicon layer 137 may provide a field shield to stabilize the electrical performance of the resistors or other components 132 on the top surface of device layer 130. In many embodiments, however, it is preferable to form an implanted field shield within a top surface of the wafer layer 130, with the conductive traces/connections 2233 below the field shield.
A field shield would ideally surround the sensor devices such as resistors 2232a, 2232b, 3301, 3303, 3305, 3307 with Faraday cage or metal cage that is impenetrable by electrical fields and charges. However, in semiconductor fabrication of the type disclosed herein, it is not now possible to create such cages with metal. However, it is possible to surround the p− regions with n− doped regions that will act as a field shield and reflect or repel undesired charges and/or fields. For example, a positive charge sitting on or above the surface of oxide layer 3501 (indicated, for example, as a circled-plus on
The implanted field shield disclosed herein provides for advantageous operation of the resistors shielded by the field shield, as they will be less likely to encounter interference from external charges. It will be particularly advantageous to employ the field shield disclosed herein in the formation of pressure sensors that have membranes exposed to the atmosphere and attendant free-floating ions when in use. Such free-floating ions may otherwise affect the resistor(s). Additionally, undesirable surface charges may form along the interface between the oxide layer 3501 and the silicon layer 3507. Such surface charges may change over time; changing of the surface charges may affect the resistor below, unless a barrier such as an implanted field shield is formed between the resistor and the interface.
A preferred method of forming such a field shield is now disclosed. Referring now to
Referring now to
After the n− doping, referring to
It is preferable to implant a p− dopant following the p+ doping. Referring to
In another process embodied by the invention disclosed herein, the n− layer 3503 may be implanted after the p− and/or p+ dopants with appropriate modification of the process flow, times and temperatures to ensure that the n− layer 3503 remains above the p− and p+ regions 3505, 3509. In other words, regardless of the order of implantation, it is important that the n− dopant is not driven as deeply into silicon layer 3507 as are the p− and p+ dopants.
As noted above, with respect to
In use, if a current of, for example, 50 μA is drawn through diode 3903, then a voltage will develop. It is known that Vsub will be set, preferably, at a fixed voltage of 5V. With the current and Vsub fixed, the voltage measured on diode bonding pad 3901 will be dependent on temperature according to known principles. Thus, a temperature sensor may be implemented with little extra effort and only a minimal power usage.
The pressure sensor described herein may also be provided with circuitry to prevent damage to the pressure sensor or its components from electrostatic discharge. Electrostatic discharges may occur in various voltages that, if significant enough and protection circuitry is absent, may cause damage to or render nonfunctional the sensor. Such discharges may be as high as 2000V or higher. It is known that with sufficient structure, electrostatic discharges of much higher voltage may be handled in a manner that will prevent damage. However, it may be cost-prohibitive to provide such structures. Thus, for purposes of the devices disclosed herein, it is assumed that handling discharges in the range between 0V and 2000V will be sufficient while maintaining the size and cost-effective structure of the device.
Such protection circuitry may be placed at or near the bonding pad so that if an excessive voltage is present, a transistor (not illustrated) will turn on and shunt the current directly into the device substrate to prevent the high voltage from being transferred to the other device circuitry. Transistors of this type may be placed at, below, or near the Vdd and Gnd bonding pads and attached to those pads.
In the examples above and in other embodiments of the present invention, a reference cavity may be formed in any one or more of the cap layers 810 or 160, oxide layers 150 and 140, and device layer 130. One or more of these layers may be omitted, for example oxide layer 150. Also, one or more other layers not shown may be included.
Directional references in the descriptions and claims in this disclosure—such as top, bottom, left, right, above, below, beside, etc.—are intended for simplicity and providing a frame of reference to the other portions of the disclosed apparatuses and to the FIGS. provided herewith, but are not intended to be limiting. For example, a person of ordinary skill in the art would recognize that, which the sensor may be illustrated in a particular orientation in each of the FIGS., the sensor may effectively function in multiple orientations, including orientations that are inverted, rotated, or otherwise altered from the orientations illustrated in the FIGS. Thus, the disclosure of directional references herein is not intended to be limiting.
The above description of embodiments of the invention has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form described, and many modifications and variations are possible in light of the teaching above. The embodiments were chosen and described in order to best explain the principles of the invention and its practical applications to thereby enable others skilled in the art to best utilize the invention in various embodiments and with various modifications as are suited to the particular use contemplated. Thus, it will be appreciated that the invention is intended to cover all modifications and equivalents within the scope of the following claims.
The processes described above can be embodied within additional hardware, such as a single integrated circuit (IC) chip, multiple ICs, an application specific integrated circuit (ASIC), or the like. Further, the order in which some or all of the process steps appear in each process should not be deemed limiting. Rather, it should be understood that some of the process steps can be executed in a variety of orders that are not all of which may be explicitly illustrated herein.
What has been described above includes examples of the implementations of the present invention. It is, of course, not possible to describe every conceivable combination of components or methods for purposes of describing the claimed subject matter, but many further combinations and permutations of the subject embodiments are possible. Accordingly, the claimed subject matter is intended to embrace all such alterations, modifications, and variations that fall within the spirit and scope of the appended claims. Moreover, the above description of illustrated implementations of this disclosure, including what is described in the Abstract, is not intended to be exhaustive or to limit the disclosed implementations to the precise forms disclosed. While specific implementations and examples are described herein for illustrative purposes, various modifications are possible that are considered within the scope of such implementations and examples, as those skilled in the relevant art can recognize.
In particular and in regard to the various functions performed by the above described components, devices, circuits, systems and the like, the terms used to describe such components are intended to correspond, unless otherwise indicated, to any component which performs the specified function of the described component (e.g., a functional equivalent), even though not structurally equivalent to the disclosed structure, which performs the function in the herein illustrated exemplary aspects of the claimed subject matter. In this regard, it will also be recognized that the various embodiments includes a system as well as a computer-readable storage medium having computer-executable instructions for performing the acts and/or events of the various methods of the claimed subject matter.
This application claims priority to U.S. Provisional Application Ser. No. 62/240,782 filed Oct. 13, 2015, and is a continuation-in-part of U.S. patent application Ser. No. 14/622,576, filed on Feb. 13, 2015, which claims priority to U.S. provisional application Ser. Nos. 62/030,604, filed Jul. 29, 2014, and 62/090,306, filed Dec. 10, 2014, the entireties of each are incorporated herein by reference.
| Number | Date | Country | |
|---|---|---|---|
| 62240782 | Oct 2015 | US | |
| 62030604 | Jul 2014 | US | |
| 62090306 | Dec 2014 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | 14622576 | Feb 2015 | US |
| Child | 15040899 | US |
