1. Technical Field
The present disclosure relates to printed circuit boards and, particularly, to a printed circuit board with an anti-static protection structure.
2. Description of Related Art
Most static electricity interference generated in a printed circuit board can be reduced by a ground connection. However, a poor layout of a ground layer may strengthen the electromagnetic interference.
For example,
The electronic component 10 includes a ground pin GND connected to the ground layer 22, thus eliminating or reducing internal static electricity interference generated in the electronic component 10. However, a portion of external static electricity 30 may easily reversely flow into the electronic component 10 via the copper foil 25 and the ground pin of the electronic component 10 (shown as the direction indicated by the dotted line with an arrow), during a process that static electricity is conducted on the conductive metal layer 21, thus increasing electromagnetic interference to the electronic component 10.
Many aspects of the embodiments can be better understood with reference to the drawings. The components in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the present disclosure. Moreover, in the drawings, like reference numerals designate corresponding parts throughout the several views.
A number of through-holes 44 are defined in the printed circuit board 40 running through the first conductive metal layer 41, the first insulating layer 43 and the ground layer 42. The through-holes 44 are configured for insertion of a number of solder feet of an electronic component 10. In the embodiment, the through-hole 441 is configured for an insertion of a ground pin GND of the electronic component 10. A second insulation layer 46 is formed on an inside wall of the first conductive metal layer 41 in the through-hole 441, thereby the ground pin GND inserted in the through-hole 441 being insulated from the first conductive metal layer 41. Thereby the path of external static electricity conducted to the first conductive metal layer 41 is cut off to prevent the external static electricity from flowing back into the electronic component 10 from the ground pin GND. Therefore, the amount of the static electricity interference on the electronic component 10 is effectively reduced.
A second conductive metal layer 45 is formed on an inside wall of the ground layer 42 and an inside wall of the first insulating layer 43 in the through-hole 441, to electrically connect the ground pin GND inserted in the through-hole 441 to the ground layer 42, and provide a ground path for the electronic component 10. With such a structure, a ground loop (shown as the directions indicated by the dotted lines with arrows) is formed by the ground pin GND of the electronic component 10 being connected to the ground layer 42. In the embodiment, the second conductive metal layer 45 is a copper foil.
Moreover, it is to be understood that the disclosure may be embodied in other forms without departing from the spirit thereof. Thus, the present examples and embodiments are to be considered in all respects as illustrative and not restrictive, and the disclosure is not to be limited to the details given herein.
Number | Date | Country | Kind |
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201210125617.7 | Apr 2012 | CN | national |