This application claims priority under 35 U.S.C. ยง119(a) on Japanese Patent Application No. 2005-232053 filed in Japan on Aug. 10, 2005, the entire contents of which are hereby incorporated by reference.
The present invention relates to fabrication methods for a printed wiring board with respect to creation of a wiring pattern, photomasks for a printed wiring board, and programs for creating a photomask.
First, a conventional fabrication method for a printed wiring board will be described with reference to the drawings.
A substrate of a printed wiring board is constituted from insulating resin, and copper foil is layered on the surface of the substrate. A dry film photoresist is applied to the copper foil, a photomask is overlaid, and ultraviolet rays are irradiated, forming an etching resist. Next, a portion that is not covered by the etching resist is etched with an etching solution. Then, a wiring pattern is formed by removing the etching resist, forming a printed wiring board.
The rate of etching advancement changes depending on the flow, the degree of activity, the temperature, and the concentration of the etching solution. Accordingly, because the flow, the degree of activity, the temperature, and the concentration of the etching solution change depending on the manner of disposing the printed wiring board relative to the etching solution, the form of the wiring pattern, and the like, even on a single printed wiring board, the rate of etching advancement varies depending on the location. Thus, even on a single printed wiring board, an equivalently etched wiring pattern is not formed; rather, portions are produced in which etching has advanced too much.
For example, depending on the wiring pattern, there are portions in which the etching solution flows easily and portions in which the etching solution easily accumulates, and the amount of etching is comparatively greater in portions where the etching solution flows easily. Also, in portions where the etching solution easily accumulates, the concentration of the etching solution is kept high, and the degree of activity is relatively high, so there is a tendency for the amount of etching to become comparatively large. For regions on the upstream side relative to the flow of the etching solution as well, contact is made in a state with a high degree of activity of the etching solution, and so the amount of etching becomes relatively large.
Also, because the rate of etching advancement changes according to the properties of the copper foil, the direction of a crystal face, thickness, and the like even on a single printed wiring board, if the state of the copper foil varies depending on the location, the amount of etching at that location will vary.
Accordingly, various methods for solving these sorts of problems have been proposed. For example, in the technology disclosed in JP S59-116657A (Conventional Technology 1), the amount of side etching is measured by first etching on a trial basis, and the wire pattern is corrected based on this measured value.
However, with Conventional Technology 1, it is necessary to actually perform etching in advance, and in addition to the amount of processing increasing, the correction value needs to be measured, which is a problem for production efficiency.
Also, as disclosed in JP H4-23338A, there is also technology (Conventional Technology 2) in which adjacent wiring patterns have approximately the same form.
As shown in
However, with Conventional Technology 2, although it is possible to make the etching state equivalent between adjacent terminals, because the amount of etching is not controlled, it is not possible to control the wiring pattern to a predetermined width. Also, because there is correction in the terminal portions, the Conventional Technology 2 cannot be applied to other wiring patterns.
Also, as disclosed in JP H5-110226A, there is technology (Conventional Technology 3) in which a bent portion of the wiring pattern is made thick.
As shown in
However, with Conventional Technology 3, because there is correction in the bent portion, the Conventional Technology 2 cannot be applied to the wiring patterns other than the bent portion, i.e. the straight portions.
Also, with above Conventional Technology 2 and 3, there is the problem that it is necessary to revise the original etching resist itself, which is troublesome.
The present invention was made in view of these problems, and it is an object thereof to provide a printed wiring board fabrication method in which it is possible to easily control side etching in necessary portions, a photomask for a printed wiring board, and a photomask creation program.
In order to address the above problems, in the printed wiring board fabrication method according to the present invention, an etching resist is formed on metal foil that has been layered on an insulating resin board and etching is performed via the etching resist, thus forming a wiring pattern, and the wiring pattern is provided with a circuit pattern constituting an electronic circuit and a dummy pattern provided in the vicinity of and separated from the circuit pattern.
With this configuration, because the dummy pattern is formed at the same time that the circuit pattern is formed by etching, etching solution near the circuit pattern etches both the circuit pattern and the dummy pattern, so the speed at which etching advances for the circuit pattern is mitigated, and it is possible to suppress side etching of the circuit pattern. That is, by forming the dummy pattern in the vicinity of the circuit pattern, for which dimensional precision is sought, it is possible to improve the dimensional precision of the circuit pattern.
Also, by changing, for example, the size, shape or arrangement of the dummy pattern, it is possible to control the flow, degree of activity, temperature, concentration, and the like of the etching solution in the etching process, so it is possible to suitably control the form of etching to match the form of side etching of the circuit pattern.
Also, in the printed wiring board fabrication method according to the present invention, the dummy pattern is completely removed by etching.
Thus, when the printed wiring board is completed, unnecessary dummy patterns are eliminated, so mistakes in packaging do not occur. That is, when a dummy pattern remains, there is a risk that a terminal of an electronic component or the like will be disposed on a dummy pattern due to a packaging mistake, but this sort of packaging mistake does not occur.
Also, in the printed wiring board fabrication method according to the present invention, the dummy pattern is partially removed by etching.
Thus, because the dummy pattern is present in the vicinity of the circuit pattern while etching is being performed, side etching is constantly suppressed during etching, so it is possible to appropriately control etching. That is, when the present invention has been configured such that the dummy pattern is completely removed, the dummy pattern is completely removed before etching of the circuit pattern finishes, so only the circuit pattern is etched after the dummy pattern has been completely removed, and therefore side etching advances. On the other hand, when a configuration has been adopted in which the dummy pattern is partially removed and part remains, such a situation does not occur, so side etching is effectively controlled and an appropriate circuit pattern can be formed.
Also, in the printed wiring board fabrication method according to the present invention, etching conditions for the etching are modified according to the amount of etching of the dummy pattern.
Thus, it is possible to form an optimum circuit pattern. Also, because the dummy pattern is separated from the circuit pattern, it is easy to compare the resist area for the dummy pattern and the area of the dummy pattern after etching, and it is possible to change to suitable etching conditions as appropriate, in concert with the rate of etching advancement.
Also, in the printed wiring board fabrication method according to the present invention, the dummy pattern is formed on a line extended from an end of the circuit pattern.
Thus, it is possible to control the flow, degree of activity, temperature, and concentration of the etching solution in the vicinity of the end of the circuit pattern, so it is possible to control side etching in the end of the circuit pattern.
Also, in the printed wiring board fabrication method according to the present invention, the dummy pattern is formed on both sides of a line extended from the end of the circuit pattern.
Thus, it is possible to control the flow, degree of activity, temperature, and concentration of the etching solution that passes through both sides of the end of the circuit pattern, so it is possible to control side etching in the end of the circuit pattern.
Also, in the printed wiring board fabrication method according to the present invention, the circuit pattern is formed with a rectangular terminal shape.
Thus, it is possible to control side etching in the end of a rectangular terminal formed in the printed wiring board.
Also, in the printed wiring board fabrication method according to the present invention, ends of the circuit pattern are disposed in parallel, and dummy patterns are disposed in parallel corresponding to each end of a circuit pattern.
Thus, it is possible to suppress side etching for the respective ends of the parallel circuit patterns.
Also, in the printed wiring board fabrication method according to the present invention, the dummy patterns are formed and disposed lined up in a plurality of lines.
Thus, because the dummy patterns are disposed in a plurality of lines, it is possible to effectively control the flow, degree of activity, temperature, and concentration of the etching solution, so it is possible to suppress side etching in the end of the circuit pattern.
Also, in the printed wiring board fabrication method according to the present invention, the dummy patterns formed in a plurality of lines are formed and disposed with each of the plurality of lines offset relative to one another in the direction in which they are lined up.
Thus, because it is possible to control the flow of etching solution that flows between dummy patterns with better precision, it is possible to reduce the difference in the concentration of the etching solution according to the location in the end of the circuit pattern, so it is possible to reduce variation in the rate of side etching according to the location.
Also, in the printed wiring board fabrication method according to the present invention, the dummy pattern is formed in the vicinity of an angled portion of the circuit pattern.
Thus, it is possible to control the flow, degree of activity, temperature, and concentration of the etching solution in the vicinity of the angled portion of the circuit pattern (for example, an angled portion of a land on which an electronic component is mounted), so it is possible to control side etching in the angled portion.
Also, in the printed wiring board fabrication method according to the present invention, the angled portion is a bent portion of the circuit pattern.
Thus, it is possible to control the flow, degree of activity, temperature, and concentration of the etching solution in the vicinity of the bent portion of the circuit pattern (for example, a bent portion of a wiring line), so it is possible to control side etching in the bent portion.
Also, in the printed wiring board fabrication method according to the present invention, the dummy pattern has a circular, oval, rectangular, or triangular shape.
Thus, it is possible to appropriately control the flow, degree of activity, temperature, and concentration of the etching solution in the vicinity of the circuit pattern.
Also, by disposing the dummy pattern with its shape appropriately modified according to the position (position relative to the printed wiring board as a whole), shape, and the like of the circuit pattern, the amount of etching for each portion is controlled, and it is possible to create a circuit pattern that is optimum as a whole.
Also, in a photomask according to the present invention, which is a photomask for a printed wiring board for forming an etching resist that corresponds to a wiring pattern on metal foil that has been layered on an insulating resin board, the wiring pattern is provided with a circuit pattern constituting an electronic circuit and a dummy pattern provided in the vicinity of and separated from the circuit pattern.
Thus, it is possible to form a circuit pattern that constitutes an electric circuit and a dummy pattern that can suppress side etching for a printed wiring board.
Also, in a photomask creation program according to the present invention, which is a photomask creation program that creates a mask pattern of a photomask for forming a photoresist that corresponds to a wiring pattern of a printed wiring board, the wiring pattern is provided with a circuit pattern constituting an electronic circuit and a dummy pattern provided in the vicinity of and separated from the circuit pattern.
Thus, the photomask creation program can create a photomask that has a circuit pattern that constitutes an electric circuit and a dummy pattern that can suppress side etching.
Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.
First, the fabrication method for a printed wiring board according to an embodiment of the present invention will be described.
A substrate of a printed wiring board is constituted from insulating resin such as, for example, glass epoxy resin or paper phenol resin. On the surface of the substrate, metal foil, for example copper foil, is formed. Next, a dry film photoresist is applied on the metal foil, a photomask is overlaid, and by irradiating ultraviolet rays, an etching resist is formed. Next, a portion that is not covered by the etching resist is etched by an etching solution. Afterward, a wiring pattern is formed by removing the etching resist, completing the printed wiring board.
The wiring pattern is configured from a circuit pattern that constitutes an electric circuit and a dummy pattern that is not necessary in order to constitute an electric circuit. The circuit pattern, for example, is configured from a land connected to a terminal of a semiconductor or the like, a terminal that is connected to a terminal of another electronic component, and a conducting wire that connects the land and the terminal.
Next is a description of a wiring pattern formed by etching.
The dummy pattern 21 is formed isolated in the vicinity of the circuit pattern. In particular, the dummy pattern 21 is formed in the vicinity of a portion where it is anticipated that there will be much side etching compared to other portions. In
The terminal 22 and the dummy pattern 21 formed in this manner are smaller overall than the resist patterns 31 and 32. The end 24 of the terminal 22 also has about the same amount of side etching as the other portions of the terminal 22, so the rate of etching advancement is suppressed. The reason for this is that due to the dummy pattern 21 being present in the vicinity of the end 24 of the terminal 22, the etching solution in this vicinity etches both the dummy pattern 21 and the terminal 22, and the speed of etching advancement for the end 24 is mitigated by lowering the concentration of the etching solution, suppressing side etching of the end 24.
Also, the dummy pattern 21 disposed in the vicinity of the end 24 obstructs the flow of the etching solution, the frequency of turnover of the etching solution is lowered and inflow of new etching solution is reduced, and activity of the etching solution decreases, so that side etching of the end 24 is suppressed.
Because the circuit pattern is etched by side etching, the resist patterns 31 and 32 are designed somewhat large in consideration of the amount of side etching.
Next is a description of modifications of the etching conditions. The wiring pattern is formed in an appropriate shape by adjusting the etching conditions. The etching conditions can be modified by, for example, the concentration, the temperature, or the flow quantity of the etching solution.
The etching state is known by measuring the amount of etching of the dummy pattern 21. Also, because the dummy pattern 21 is disposed in the vicinity of the circuit pattern for which excessive side etching is anticipated, the dummy pattern 21 becomes an indicator for knowing the etching state in the vicinity. It is also possible to provide the dummy pattern 21 at a plurality of locations on the printed wiring board, so it is possible to monitor the etching state of the circuit pattern at a plurality of locations at the same time.
Further, because the dummy pattern 21 is separated from the circuit pattern, it is possible to easily compare the area of the resist for the dummy pattern 21 to the area of the dummy pattern 21, so that the amount of etching can be easily measured. Thus, the rate at which etching advances can easily be known. Also, the rate at which etching advances can be judged visually.
For example, when the area of the dummy pattern 21 is not more than half of the area of the etching resist for the dummy pattern 21, it is preferable to adopt processing that decreases the flow quantity of the etching solution, or processing that decreases the temperature of the etching solution. Also, a configuration may be adopted in which the etching conditions are not modified by measuring the amount of etching in the dummy pattern 21 with this form, but by measuring the amount of etching in the circuit pattern.
Next is a description of an example of a wiring pattern in the present embodiment.
Also, a dummy pattern 21 is disposed at a constant distance relative to each terminal 22. Thus, parallel terminals 22 are formed with approximately the same size and shape by etching with the same conditions.
Also, in this embodiment, the dummy patterns 21 are formed in an approximately circular shape, but the present invention is not limited to a configuration in which the dummy patterns 21 are circular. For example, the dummy patterns 21 may be formed in an oval, rectangular, or triangular shape. Thus, according to the position, shape, and the like of the circuit patterns that suppress side etching, the dummy patterns 21 can be disposed with an appropriately modified shape, so that the amount of etching is controlled according to the respective portions, and as a whole an optimum circuit pattern can be created.
Also,
In the present invention, the providing of such dummy patterns 21 can be applied in any sort of case if they are provided in the vicinity of the angled portion of the circuit pattern. For example, if as described above the circuit pattern is not in a line (conducting line 23), that is, if the circuit pattern is a land on which an electronic component is mounted, dummy patterns 21 may be provided in the vicinity of an angled portion of this land, similar to the disposed form as given for example in
Next is a description of a photomask for the printed wiring board according to the present invention, with reference to FIGS. 1 to 7.
In the photomask, a mask pattern for forming the wiring pattern 20 is formed. As described in Embodiment 1, the wiring pattern 20 is configured from a circuit pattern that constitutes an electric circuit, and the dummy pattern 21, which is not necessary in order to constitute the electric circuit. On the other hand, the mask pattern is configured from a circuit mask pattern and a dummy mask pattern that correspond to the circuit pattern and the dummy pattern 21.
When fabricating the printed wiring board 1, by using this sort of photomask, a photoresist that corresponds to the circuit pattern and the dummy pattern 21 is formed, and it is possible to create the printed wiring board 1 having the circuit pattern and the dummy pattern 21.
Next is a description of the photomask creation program according to the present invention, with reference to FIGS. 1 to 7.
The photomask creation program is configured from a circuit module that forms a circuit mask pattern from a circuit pattern that constitutes an electric circuit, a dummy module that forms a dummy mask pattern that corresponds to the dummy pattern 21, and a combining portion that combines the circuit mask pattern and the dummy mask pattern.
The circuit module creates a circuit mask pattern for a circuit pattern that is input to the photomask creation program.
The dummy module designs positions at which it is possible to dispose dummy patterns 21, the shape of the dummy pattern 21, and the like based on the circuit pattern that is input to the photomask creation program, and creates a corresponding dummy mask pattern based on the designed dummy mask pattern 21.
Also, the circuit mask pattern and the dummy mask pattern are combined in the combining portion, creating the mask pattern.
With this sort of program, because it is possible to create a mask pattern that corresponds to the circuit pattern and the dummy pattern 21, a corresponding photomask can easily be created.
The present invention may be embodied in various other forms without departing from the gist or essential characteristics thereof The embodiments disclosed in this application are to be considered in all respects as illustrative and not limiting. The scope of the invention is indicated by the appended claims rather than by the foregoing description, and all modifications or changes that come within the meaning and range of equivalency of the claims are intended to be embraced therein.
Number | Date | Country | Kind |
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2005-232053 | Aug 2005 | JP | national |