Patent Application
20220208661
Thermal pad can be used to dissipate thermal energy from the top side of a semiconductor package, such as a quad flat pack (QFP) or quad flat no-lead (QFN) package. However, QFN and QFP packages with top-side thermal pad have limited heat dissipation capability due to limited exposed pad area and thin lead frame as die attach pad. In particular, the heat dissipation capability of these devices are often insufficient for a high-voltage power device used in high power applications, such as DC to DC converters or other switching power supplies. Also, non-insulated thermal pad can violate voltage spacing requirements in some applications. An additional heat slug can be attached on an exposed thermal pad of a previously molded QFN or QFP package using solder, conductive silver epoxy/paste, or non-conductive epoxy. However, no insulation function is provided when solder or conductive silver epoxy or paste is used for slug attachment. Non-conductive epoxy typically has low thermal conductivity (e.g., 0.5-2 W per meter per degree K) that limits thermal performance, and long-term mechanical and electrical reliability of non-conductive epoxy is a concern. Another approach uses a metallized ceramic substrate as a chip carrier with a copper lead frame, leads and chips attached to the substrate, but this assembly process is complex and material cost is high.
In one aspect, a packaged electronic device includes a die attach pad, a semiconductor die, a conductive plate and a polymer layer. The die attach pad has a first side and an opposite second side, and the semiconductor die has a first side mounted to the second side of the die attach pad. The polymer layer has a first side on a first side of the conductive plate, and a second side on the first side of the die attach pad. A package structure encloses the semiconductor die and the die attach pad and exposes a portion of the second side of the conductive plate.
In another aspect, a packaged electronic device includes a die attach pad and a semiconductor die, the semiconductor die mounted to a side of the die attach pad. A conductive plate, and a polymer layer has a first side on a side of the conductive plate, is attached on a second side of the exposed die attach pad.
In a further aspect, a method of manufacturing a packaged electronic device includes attaching a first side of a polymer layer to a first side of a conductive plate, attaching a first side of a die attach pad to a second side of the polymer layer, attaching a first side of a semiconductor die to a second side of the die attach pad, coupling a conductive feature of the semiconductor die to a lead frame, and forming a package structure that encloses the semiconductor die and the die attach pad and exposes a portion of a second side of the conductive plate.
In the drawings, like reference numerals refer to like elements throughout, and the various features are not necessarily drawn to scale. Also, the term “couple” or “couples” includes indirect or direct electrical or mechanical connection or combinations thereof. For example, if a first device couples to or is coupled with a second device, that connection may be through a direct electrical connection, or through an indirect electrical connection via one or more intervening devices and connections. One or more operational characteristics of various circuits, systems and/or components are hereinafter described in the context of functions which in some cases result from configuration and/or interconnection of various structures when circuitry is powered and operating.
The packaged electronic device 100 also includes a conductive plate 110. In one example, the conductive plate 110 is or includes copper. In other examples, the conductive plate 110 is or includes aluminum or another electrically conductive material. The conductive plate 110 has a first side 111 and an opposite second side 112. In one example, the first side 111 and the second side 112 of the conductive plate 110 are spaced apart from one another by a plate thickness 113 of 0.25 mm or more and 3.0 mm or less. In one implementation, the plate thickness 113 is 0.50 mm or more and 1.0 mm or less.
The conductive plate 110 is electrically insulated from the die attach pad 101 by the polymer layer 114. The heat generated by semiconductor die 104 is dissipated from the second side 112 of the conductive plate 110 through the die attach pad 101 and the polymer layer 114 bonded between the conductive plate 110 and the die attach pad 101. The polymer layer 114 in one example is or includes a polymer-based epoxy with high thermal conductivity and high dielectric strength. The polymer layer 114 has an upper first side 115 and an opposite (e.g., lower) second side 116. The first side 115 of the polymer layer 114 is engaged on and bonded to the first side 111 of the conductive plate 110. The second side 116 of the polymer layer 114 is engaged on and bonded to the first side 102 of the die attach pad 101. The polymer layer 114 is an electrically insulative material. In one example, the polymer layer 114 has a dielectric strength of 10 kV/mm or more, such as 10 kV/mm to 50 kV/mm. In this or another example, the polymer layer 114 has a thermal conductivity of 5 W per meter per degree K or more, such as 5-20 W per meter per degree K. In these or another example, the first side 115 and the second side 116 of the polymer layer 114 are spaced apart from one another by a thickness 117 of 100 μm or more, such as 100-500 μm. In these or another example, the polymer layer 114 has a breakdown voltage of 1 kV or more, such as 1-5 kV.
The packaged electronic device 100 includes electrical connections between conductive features (e.g., bond pads, not shown) of the semiconductor die 102 and respective ones of the leads 109. In one example, the electrical connections include bond wires 118 as shown in
At 204 in
The method 200 continues at 206 and 208 with attaching the first side 102 of the die attach pad 101 to the second side 116 of the polymer layer 114. In one example, the first side 102 of the die attach pad 101 is attached to the second side 116 of the polymer layer 114 by placing the first side 102 of the die attach pad 101 on the second side 116 of the polymer layer 114 at 206.
The method 200 continues at 210 with die attachment processing.
The method 200 continues at 212 with coupling a conductive feature of the semiconductor die 104 to a lead 109.
The method 200 continues at 214 with forming the package structure 120 that encloses the semiconductor die 104, the bond wires 118 and the die attach pad 101 and exposes a portion of the top or second side 112 of the conductive plate 110, as well as portions of the leads 109.
The packaged electronic device 100 in this example provides a large and fully insulated top-side thermal pad for heat dissipation and easier thermal management during operation, with improved thermal performance compared with standard non-insulated QFN or QFP packages. The concepts of the disclosed examples can be used in other types and forms of packaged electronic devices. One example uses a 140 μm thick polymer layer 114, for example, a polymer-based, electrically isolated but thermally conductive material (e.g., thermal conductivity of 10 W per meter per degree K) to bond a thick copper plate 110 (e.g., 105 μm to 3 mm, such as 0.5 to 2 mm, for example 0.5 to 1 mm) and a standard copper lead frame for a QFN or QFP package. The exposed thermal pad area of this example increases more than 50% and the heat dissipation capability improves 40-60% depending on the copper plate thickness and thermal interface material used in a cooling system.
The disclosed examples can be used to provide a low cost and simple approach for mass production of a fully insulated packaged electronic devices, including QFN, QFP and other package types. The disclosed example maintains all advantages of the QFN or QFP packages, such as high pin density and small package parasitics, and provides an enhanced heat dissipation path from the semiconductor die 104 to the conductive plate 110 and any associated external heatsink or cold plate (not shown) attached to the conductive plate 110. In one example, the polymer layer 114 is a B-stage insulating film having a strong adhesion to thick copper plate 110 as well as to the die attach pad 101 of a standard copper lead frame by pressing at a controlled temperature. The polymer layer 114 facilitates electrical insulation with reliable bonding to the conductive plate 110 and die attach pad 101. The high thermal conductivity (e.g., 10 W per meter per degree K) of this material compared to that of other similar materials allows an effective heat transfer while providing an electrical insulation function. In another example, the polymer layer 114 is an epoxy material and has a thermal conductivity of 3 W per meter per degree K or more, such as 3-15 W per meter per degree K. In a further example, the polymer layer 114 is an epoxy material and has a thermal conductivity of 5 W per meter per degree K, such as 5-15 W per meter per degree K. In another example, the polymer layer 114 is an epoxy material and has a thermal conductivity of 12 W per meter per degree K or more, such as 12-15 W per meter per degree K. In these or other examples, the polymer layer 114 has a thickness of 120 to 200 μm or more, with a dielectric strength of 20-30 kV per mm. The described devices and methods, moreover, allow use of a thick conductive plate 110 to help distribute heat uniformly. The described solutions also have minimal change of assembly processing with addition of the polymer layer 114. Also, the described examples are of comparably lower cost than using a metallized ceramic substrate and an external machined copper plate for a similar package size, and the packaged electronic device 100 provides integrated isolation inside a power package for easy thermal management to meet safety standards. The described examples also maintain the original QFN or QFP pin configuration with enhanced thermal performance and isolation performance.
Modifications are possible in the described examples, and other implementations are possible, within the scope of the claims.
