This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2021-152202, filed on Sep. 17, 2021; the entire contents of which are incorporated herein by reference.
Embodiments disclosed herein relate generally to a resistance change device and a storage device.
A resistance change device having a resistance change layer as a nonvolatile memory layer is used for a storage device. A phase change memory (PCM) with a layer containing a phase change material such as, for example, GeSbTe as the resistance change layer is known as the resistance change device.
A resistance change device of an embodiment includes a first electrode, a second electrode, and a layer disposed between the first electrode and the second electrode and containing a resistance change material. In the resistance change device of the embodiment, the resistance change material contains: a first element including antimony and tellurium; a second element including at least one element selected from the group consisting of germanium and indium; a third element including at least one element selected from the group consisting of silicon, nitrogen, boron, carbon, aluminum, and titanium; and a fourth element including at least one element selected from the group consisting of scandium, yttrium, lanthanum, gadolinium, zirconium, and hafnium.
The resistance change device and a storage device of the embodiment will be described below with reference to the drawings. In each embodiment, substantially the same components are denoted by the same codes, and explanation thereof is sometimes partially omitted. The drawings are schematic, and a relationship between a thickness and a planar size, thickness proportions of the respective portions, and the like are sometimes different from actual ones. Unless otherwise specified, terms indicating directions such as up and down in the explanation refer to relative directions with a formation surface of a resistance change material layer of a first electrode described below as the top and may differ from an actual direction based on a gravitational acceleration direction.
The phase change material constituting the resistance change layer 4 contains the first element including antimony (Sb) and tellurium (Te), the second element including at least one element selected from the group consisting of germanium (Ge) and indium (In), the third element including at least one element selected from the group consisting of silicon (Si), nitrogen (N), boron (B), carbon (C), aluminum (Al), and titanium (Ti), and the fourth element including at least one element selected from the group consisting of scandium (Sc), yttrium (Y), lanthanum (La), gadolinium (Gd), zirconium (Zr), and hafnium (Hf).
The phase change material described above contains a base material that contains the first element and the second element. Concrete examples of the base material of the phase change material include Ge—Sb—Te, In—Sb—Te, and Ge—In—Sb—Te. The base material of the phase change material contains compounds such as, for example, Ge2Sb2Te5, Ge1Sb2Te4, In3Sb1Te2, In3Sb2Te1, Sb2Te3, GeTe, and In2Te3. In addition, the base material of the phase change material preferably contains at least one compound selected from Ge2Sb2Te5, Ge1Sb2Te4, and In3Sb1Te2. By containing such a compound, phase change properties between a crystal phase and an amorphous phase can be obtained reproducibly, and reset and set currents during the phase change can be reduced.
The phase change material has the phase change properties capable of reversibly changing between the amorphous phase and the crystal phase. The phase change material in the crystal phase has low resistance, while the phase change material in the amorphous phase has high resistance. As illustrated in
In order to decrease the reset current of the resistance change device 1, for example, it is effective to increase electric resistivity of the phase change material when it is in the crystalline state. By increasing the electric resistivity of the phase change material in the crystal phase, the Joule heat at low current increases, which allows the crystal phase to be phase-changed to the amorphous phase at the low current. In this regard, the electric resistivity of the crystal phase can be increased by reducing a crystal grain size. Furthermore, examples of methods to reduce the crystal grain size of the phase change material include (1) lowering a crystal growth rate and (2) promoting crystal nucleation. In the phase change material of the embodiment, elements that contribute to (1) lowering the crystal growth rate and (2) promoting the crystal nucleation, that is, the third and fourth elements, are added to the base material of the phase change material.
Further,
As mentioned above, the effect of heading toward the lower left of
An addition amount of the third element is preferably 0.1 atom % or more and 16 atom % or less. When the addition amount of the third element exceeds 16 atom %, the phase change properties of the phase change material may not be obtained. When the addition amount of the third element is less than 0.1 atom %, the addition effect of the third element cannot be sufficiently obtained. An addition amount of the fourth element is preferably 0.1 atom % or more and 4 atom % or less. When the addition amount of the fourth element exceeds 4 atom %, the phase change properties of the phase change material may not be obtained. When the addition amount of the fourth element is less than 0.1 atom %, the addition effect of the fourth element cannot be sufficiently obtained.
When the third and fourth elements are added alone, the addition amount of each element cannot be sufficiently increased, so the effect of reducing the crystal grain size of the phase change material cannot be sufficiently increased. For example, when the addition amount of the third element such as N is increased too much, the phase change material such as Ge—Sb—Te cannot be phase-changed. On the other hand, since the fourth element such as Sc has low electronegativity and high positive charge, the addition amount of the fourth element cannot be increased too much because of its strong Coulomb repulsion. In this regard, the addition of the third and fourth elements together can effectively obtain the effect of reducing the crystal grain size of the phase change material while maintaining a moderate addition amount of each element due to the addition effect of each of the third and fourth elements.
The above-mentioned phase change material of the embodiment preferably has a composition represented by:
general expression: (T1-aMa)100-x-yAxDy (1)
where T is antimony and tellurium, M is at least one element selected from the group consisting of germanium and indium, A is at least one element selected from the group consisting of silicon, nitrogen, boron, carbon, aluminum, and titanium, D is at least one element selected from the group consisting of scandium, yttrium, lanthanum, gadolinium, zirconium, and hafnium, a is a number representing an atomic ratio satisfying 0<a<1, and x and y are numbers representing atom % satisfying 0.1≤x≤16, 0.1≤y≤4, respectively.
The phase change material of the embodiment further preferably has a composition represented by:
general expression: ((Sb1-a1Tea1)1-a2Ma2)100-x-yAxDy (2)
where M is at least one element selected from the group consisting of germanium and indium, A is at least one element selected from the group consisting of silicon, nitrogen, boron, carbon, aluminum, and titanium, D is at least one element selected from the group consisting of scandium, yttrium, lanthanum, gadolinium, zirconium, and hafnium, a1 and a2 are numbers representing atomic ratios satisfying 0<a1<1 and 0<a2<1, and x and y are numbers representing atom % satisfying 0.1≤x≤16, and 0.1≤y≤4, respectively.
Concrete examples of the phase change material of the embodiment include materials where at least one of the third elements selected from the group consisting of Si, N, B, C, Al, and Ti and at least one of the fourth elements selected from the group consisting of Sc, Y, La, Gd, Zr, and Hf are contained into one compound selected from Ge2Sb2Te5, Ge1Sb2Te4, and In3Sb1Te2. As the third element, Ti is more preferable. As the fourth element, La, which does not promote crystal growth as much as the other elements, is more preferable.
Concrete examples of the phase change material whose base material is Ge2Sb2Te5 include: Ge2Sb2Te5+Si, Sc; Ge2Sb2Te5+Si, Y; Ge2Sb2Te5+Si, La; Ge2Sb2Te5+Si, Gd; Ge2Sb2Te5+Si, Zr; Ge2Sb2Te5+Si, Hf; Ge2Sb2Te5+C, Sc; Ge2Sb2Te5+C, Y; Ge2Sb2Te5+C, La; Ge2Sb2Te5+C, Gd; Ge2Sb2Te5+C, Zr; Ge2Sb2Te5+C, Hf; Ge2Sb2Te5+B, Sc; Ge2Sb2Te5+B, Y; Ge2Sb2Te5+B, La; Ge2Sb2Te5+B, Gd; Ge2Sb2Te5+B, Zr; Ge2Sb2Te5+B, Hf; Ge2Sb2Te5+Al, Sc; Ge2Sb2Te5+Al, Y; Ge2Sb2Te5+Al, La; Ge2Sb2Te5+Al, Gd; Ge2Sb2Te5+Al, Zr; Ge2Sb2Te5+Al, Hf; Ge2Sb2Te5+Ti, Sc; Ge2Sb2Te5+Ti, Y; Ge2Sb2Te5+Ti, La; Ge2Sb2Te5+Ti, Gd; Ge2Sb2Te5+Ti, Zr; Ge2Sb2Te5+Ti, Hf; Ge2Sb2Te5+N, Sc; Ge2Sb2Te5+N, Y; Ge2Sb2Te5+N, La; Ge2Sb2Te5+N, Gd; Ge2Sb2Te5+N, Zr; Ge2Sb2Te5+N, Hf, and the like. Among the above, Ge2Sb2Te5+Ti, La is particularly preferable.
Concrete examples of the phase change material whose base material is Ge1Sb2Te4 include: Ge1Sb2Te4+Si, Sc; Ge1Sb2Te4+Si, Y; Ge1Sb2Te4+Si, La; Ge1Sb2Te4+Si, Gd; Ge1Sb2Te4+Si, Zr; Ge1Sb2Te4+Si, Hf; Ge1Sb2Te4+C, Sc; Ge1Sb2Te4+C, Y; Ge1Sb2Te4+C, La; Ge1Sb2Te4+C, Gd; Ge1Sb2Te4+C, Zr; Ge1Sb2Te4+C, Hf; Ge1Sb2Te4+B, Sc; Ge1Sb2Te4+B, Y; Ge1Sb2Te4+B, La; Ge1Sb2Te4+B, Gd; Ge1Sb2Te4+B, Zr; Ge1Sb2Te4+B, Hf; Ge1Sb2Te4+Al, Sc; Ge1Sb2Te4+Al, Y; Ge1Sb2Te4+Al, La; Ge1Sb2Te4+Al, Gd; Ge1Sb2Te4+Al, Zr; Ge1Sb2Te4+Al, Hf; Ge1Sb2Te4+Ti, Sc; Ge1Sb2Te4+Ti, Y; Ge1Sb2Te4+Ti, La; Ge1Sb2Te4+Ti, Gd; Ge1Sb2Te4+Ti, Zr; Ge1Sb2Te4+Ti, Hf; Ge1Sb2Te4+N, Sc; Ge1Sb2Te4+N, Y; Ge1Sb2Te4+N, La; Ge1Sb2Te4+N, Gd; Ge1Sb2Te4+N, Zr; Ge1Sb2Te4+N, Hf, and the like. Among the above, Ge1Sb2Te4+Ti, La is particularly preferable.
Concrete examples of the phase change material whose base material is In3Sb1Te2 include: In3Sb1Te2+Si, Sc; In3Sb1Te2+Si, Y;In3Sb1Te2+Si, La; In3Sb1Te2+Si, Gd; In3Sb1Te2+Si, Zr; In3Sb1Te2+Si, Hf; In3Sb1Te2+C, Sc; In3Sb1Te2+C, Y; In3Sb1Te2+C, La; In3Sb1Te2+C, Gd; In3Sb1Te2+C, Zr; In3Sb1Te2+C, Hf; In3Sb1Te2+B, Sc; In3Sb1Te2+B, Y; In3Sb1Te2+B, La; In3Sb1Te2+B, Gd; In3Sb1Te2+B, Zr; In3Sb1Te2+B, Hf; In3Sb1Te2+Al, Sc; In3Sb1Te2+Al, Y; In3Sb1Te2+Al, La; In3Sb1Te2+Al, Gd; In3Sb1Te2+Al, Zr; In3Sb1Te2+Al, Hf; In3Sb1Te2+Ti, Sc; In3Sb1Te2+Ti, Y; In3Sb1Te2+Ti, La; In3Sb1Te2+Ti, Gd; In3Sb1Te2+Ti, Zr; In3Sb1Te2+Ti, Hf; In3Sb1Te2+N, Sc; In3Sb1Te2+N, Y; In3Sb1Te2+N, La; In3Sb1Te2+N, Gd; In3Sb1Te2+N, Zr; In3Sb1Te2+N, Hf, and the like. Among the above, In3Sb1Te2+Ti, La is particularly preferable.
As illustrated in
The switch layer 11 has electric properties that rapidly transfer from an off-state with a high resistance value to an on-state with a low resistance value when a voltage of a threshold value (Vth) or more is applied. In other words, when the voltage applied to the switch layer 11 is lower than the threshold value (Vth), the switch layer 11 functions as an insulator and blocks the current flowing through the resistance change layer 4, making the resistance change layer 4 non-selective. When the voltage applied to the switch layer 11 exceeds the threshold value (Vth), the resistance value of the switch layer 11 rapidly decreases and the switch layer 11 functions as a conductor, allowing the current to flow through the switch layer 11 to the resistance change layer 4, making the resistance change layer 4 selective. A structure of the memory cell 10 is not limited to the constitution illustrated in
A material that constitutes the switch layer 11 includes, for example, a material containing at least one chalcogen element selected from the group consisting of tellurium (Te), selenium (Se), and sulfur (S). Such a switch material may contain chalcogenide, which is a compound containing the chalcogen element. Materials containing the chalcogen elements may contain at least one element selected from the group consisting of aluminum (Al), gallium (Ga), indium (In), silicon (Si), germanium (Ge), tin (Sn), arsenic (As), phosphorus (P), antimony (Sb), and bismuth (Bi). Furthermore, the materials containing the chalcogen elements may contain at least one element selected from the group consisting of nitrogen (N), oxygen (0), carbon (C), and boron (B). Examples of such a switch material include GeSbTe, GeTe, SbTe, SiTe, AlTeN, GeAsSe, and the like. However, the switch material is not limited to the materials containing the chalcogen elements, but may also be a material that does not contain the chalcogen elements.
In the memory cell 10 with the switch layer 11, the switch layer 11 functions as a heat source when a predetermined voltage is applied to the switch layer 11 to be heated. The heat of the switch layer 11 is applied to the resistance change layer 4 through the second electrode 3 or the first electrode 2, and the phase change material contained in the resistance change layer 4 is heated and melted. In this process, the phase change material of the embodiment is reset at a low current, and the reset current can be reduced. Therefore, it is possible to improve the characteristics of the resistance change device 1 and the memory cell 10.
Next, a storage device of the embodiment will be described with reference to
The row driver 111 controls a plurality of rows of the memory cell array 110. The row driver 111 receives a row address signal from the control circuit 116 based on a decoding result of an address signal ADR input from the outside. The row driver 111 sets a word line WL of the row selected by the row address signal to a selected state. The row driver 111 has circuits such as, for example, a multiplexer (word line selection circuit) and a word line driver.
The column driver 112 controls a plurality of columns of the memory cell array 110. The column driver 112 receives a column address signal from the control circuit 116 based on a decoding result of the address signal ADR. The column driver 112 sets a bit line BL of the column selected by the column address signal to a selected state. The column driver 112 has circuits such as, for example, a multiplexer (bit line selection circuit) and a bit line driver.
The write circuit 113 controls various aspects of data writing operations. The write circuit 113 receives a data signal DT input from the outside. The write circuit 113 supplies write pulses formed by a current and/or voltage to the memory cell array 110 during write operations. This allows data to be written to memory cells MC. The write circuit 113 is electrically connected to the memory cell array 110 through the row driver 111. The write circuit 113 has circuits such as, for example, a voltage source and/or a current source, a pulse generation circuit, and a latch circuit.
The read circuit 114 controls various aspects of data read operations. The read circuit 114 supplies read pulses (for example, read current) to the memory cell array 110 during read operations. The read circuit 114 senses a potential or current value of the bit line BL. Data in the memory cell MC can be read out based on this sense result. The read circuit 114 transfers read out data signal to the outside. The read circuit 114 is connected to the memory cell array 110 through the column driver 112. The read circuit 114 has circuits such as, for example, a voltage source and/or a current source, a pulse generation circuit, a latch circuit, and a sense amplifier circuit.
The write circuit 113 and the read circuit 114 are not limited to circuits that are independent of each other. For example, the write circuit 113 and the read circuit 114 may have common components that are mutually available and may be disposed in the storage device 100 as one integrated circuit.
The voltage generation circuit 115 generates voltages for various operations of the memory cell array 110 using a power supply voltage supplied from the outside. The voltage generation circuit 115 supplies the generated various voltages to the row driver 111, column driver 112, write circuit 113, and read circuit 114.
The control circuit 116 has, for example, a command register and an address register. The control circuit 116 controls the row driver 111, column driver 112, write circuit 113, read circuit 114, and voltage generation circuit 115 based on, for example, a command signal CMD, the address signal ADR, and a control signal CNT input from the outside to perform operations such as the read operation, the write operation, and an erase operation.
The command signal CMD is a signal indicating an operation to be performed by the storage device 100. For example, the address signal ADR is a signal indicating coordinates of one or more memory cells MC to be operated in the memory cell array 110 (hereinafter, referred to as selected cells). The address signal ADR includes the row address signal and the column address signal of the memory cell MC. The control signal CNT is, for example, a signal for controlling an operation timing between the storage device 100 and external devices and an internal operation timing of the storage device 100.
While certain embodiments of the present invention have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. The embodiments described herein may be embodied in a variety of other forms, furthermore, various omissions, substitutions, changes, and so on may be made therein without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions.
Number | Date | Country | Kind |
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2021-152202 | Sep 2021 | JP | national |