This U.S. non-provisional patent application claims priority under 35 U.S.C. § 119 to Korean Patent Application No. 10-2015-0156920, filed on Nov. 9, 2015, in the Korean Intellectual Property Office, the disclosure of which is hereby incorporated by reference in its entirety.
Example embodiments of the inventive concepts relate to equipment of manufacturing a semiconductor device and, more particularly, to reticles and/or an exposure apparatuses including the same.
Highly-integrated semiconductor devices have been developed with the development of information technology. The integration density of semiconductor devices may be greatly affected by a wavelength of a light source of a photolithography process that is employed in a manufacturing process of the semiconductor devices. The light source may be an I-line source, a G-line source, an excimer laser light source (e.g., KrF or ArF), or an extreme ultraviolet (EUV) light source. A wavelength of the EUV light source may be much smaller than that of the excimer laser light source.
Some example embodiments of the inventive concepts may provide reticles capable of minimizing or mitigating particle contamination and/or exposure apparatuses including the same.
According to an example embodiment, a reticle includes a mask including a mask substrate and mask patterns, the mask patterns on the mask substrate, and an edge cover coupled to an edge of the mask substrate, the edge cover including a floating cover part, the floating cover part spaced apart from the mask patterns, the floating cover part extending from a sidewall of the mask substrate over the mask patterns.
According to an example embodiment, an exposure apparatus includes a source part configured to generate a laser beam, a stage configured to receive a substrate to be exposed to the laser beam, and a reticle between the stage and the light source part, the reticle configured to project the laser beam. The reticle may include a mask having a mask substrate and mask patterns, the mask patterns on the mask substrate, and an edge cover coupled to an edge of the mask substrate, the edge cover having a floating cover part, the floating cover part spaced apart from the mask, the floating cover part extending from a sidewall of the mask substrate over the mask patterns.
According to an example embodiment, an exposure apparatus includes a pumping light source configured to generate pumping light, an illumination part configured to generate EUV plasma using the pumping light, and a projection part configured to project the EUV plasma onto a substrate. The protection part may include a stage configured to receive a substrate, and a reticle configured to transfer an image to the substrate by means of the FIN plasma. The reticle may include a mask including a mask substrate and mask patterns on the mask substrate, and an edge cover coupled to an edge of the mask substrate. The edge cover may include a floating cover part spaced apart from the mask. The floating cover part may extend from a sidewall of the mask substrate over the mask patterns.
According to an example embodiment, an exposure apparatus includes a mask including a mask substrate and mask patterns on the mask substrate, and a cover part at a side of the mask, the cover part covering a side of the mask and an adjoining edge portion of a top surface of the mask, the cover part spaced apart from the mask such that a first air hole is defined between the cover part and the mask.
In some example embodiments, the apparatus may further include an electrostatic chuck configured to receive the mask thereon. The electrostatic chuck may include a plate including an second air hole, the second air hole penetrating the plate from a side surface of the plate to a portion of a top surface of the plate, a chuck electrode in the plate, and buds protruding from the plate, the portion of a top surface of the plate being a portion outside the burls.
The inventive concepts will become more apparent in view of the attached drawings and accompanying detailed description.
The inventive concepts will now be described more fully hereinafter with reference to the accompanying drawings, in which some example embodiments of the inventive concepts are shown. The inventive concepts and methods of achieving them be apparent from the following example embodiments that will be described in more detail with reference to the accompanying drawings. Example embodiments of the inventive concept may, however, be embodied in different forms and should not be constructed as limited to the example embodiments set forth herein. Rather, these example embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the inventive concepts to those skilled in the art.
The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting of example embodiments. As used herein, the singular terms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be understood that when an element is referred to as being “on,” “connected to,” or “coupled to” another element, it may be “directly on,” “directly connected to,” or “directly coupled to” the other element or intervening elements may be present.
As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items. Expressions such as “at least one of,” when preceding a list of elements, modify the entire list of elements and do not modify the individual elements of the list. Thus, for example, both “at least one of A, B, or C” and “A, B, and/or C” means either A, B, C or any combination thereof.
It will be further understood that the terms “comprises”, “comprising,”, “includes” and/or “including”, when used herein, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It will be understood that, although the terms first, second, third etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of example embodiments.
Spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as “below” or “beneath” other elements or features would then be oriented “above” the other elements or features. Thus, the example term “below” can encompass both an orientation of above and below. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
Various example embodiments of the present inventive concepts explained and illustrated herein include their complementary counterparts. The same reference numerals or the same reference designators denote the same elements throughout the specification.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which example embodiments belong. It will be further understood that terms, such as those defined in commonly-used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
A semiconductor device may be manufactured by a plurality of unit processes. The unit processes may include a photolithography process, a thin layer forming process, an etching process, an ion implantation process, and/or a cleaning process. The photolithography process of the unit processes ia process of forming a mask layer on a substrate. The substrate may be a wafer. The mask layer may be a photoresist pattern. The photolithography process may include a photoresist coating process, a bake process, an exposure process, a post-exposure bake process, and a development process.
The photoresist coating process is a process of coating a substrate with a photoresist. The bake process and the post-exposure bake process are processes of hardening the photoresist with which the substrate is coated. The exposure process is a process of transferring mask patterns of a reticle to the photoresist using light. The reticle may be protected from contamination (e.g., particles) by air during the exposure process. The development process is a process of developing the exposed photoresist to form a photoresist pattern corresponding to the mask pattern.
The pumping light source 210 may generate pumping light 212. The pumping light source 210 may provide the pumping light 212 to the illumination part 220. For example, the pumping light 212 may include a laser beam. The pumping light 212 may have, for example, a single wavelength of about 400 nm to about 800 nm.
The illumination part 220 may generate EUV plasma 204. The EUV plasma 204 may be generated from a EUV source 202. The EUV plasma 204 may be defined as EUV light or a EUV laser beam. The EUV plasma 204 may be provided to a substrate W by way of the projection part 230. In some example embodiments, the illumination part 220 may include a source housing 222, a collector mirror 224, a facet field mirror 226, and a facet pupil mirror 228. The source housing 222 may surround the collector mirror 224, the facet field mirror 226, and the facet pupil mirror 228. The source 202 may fill the source housing 222. The pumping light 212 may be transmitted through the source housing 222 and the collector mirror 224. The EUV source 202 may be excited by the pumping light 212. The EUV source 202 may generate the EUV plasma 204. In some example embodiments, the EUV source 202 may include a tin (Sn) or xenon (Xe) gas in a plasma state, titanium (Ti) vapor, or lithium (Li) vapor. The EUV source 202 including tin (Sn) may generate the EUV plasma 204 having a wavelength of about 13.5 nm. The collector mirror 224 may reflect the EUV plasma 204 to the facet field mirror 226. The EUV plasma 204 may be focused on the facet field mirror 226. The facet field mirror 226 may reflect the EUV plasma 204 to the facet pupil mirror 228. The facet field mirror 226 may include, for example, a flat mirror. The EUV plasma 204 may travel in parallel between the facet field mirror 226 and the facet pupil mirror 228. The facet pupil mirror 228 may include, for example, a concave mirror. The facet pupil mirror 228 may focus the EUV plasma 204 on the projection part 230. The EUV plasma 204 may be transmitted through the source housing 222.
The projection part 230 may project the EUV plasma 204 on a substrate W. In some example embodiments, the projection part 230 may include a chamber 232, a condensing mirror 234, a reticle 240, an electrostatic chuck 270, a stage 280, and the air supply part 290. The chamber 232 may be coupled to the source housing 222. In some example embodiments, the chamber 232 may be separated from the source housing 222. The chamber 232 may surround the condensing mirror 234, the reticle 240, the electrostatic chuck 270, and the stage 280. The chamber 232 may protect the condensing mirror 234, the reticle 240, the electrostatic chuck 270, and the stage 280 from particle contamination. The condensing mirror 234 may be disposed in a lower region of an inner space of the chamber 232. The condensing mirror 234 may reflect the EUV plasma 204 to the reticle 240. The reticle 240 may be disposed in an upper region of the inner space of the chamber 232. The reticle 240 may include image patterns 257 of
The air supply part 290 may be connected to the projection part 230. For example, the air supply part 290 may be connected to the electrostatic chuck 270 disposed in the chamber 232. The air supply part 290 may supply air 10 to the reticle 240 through the electrostatic chuck 270. The air 10 may mitigate or prevent particle contamination of the reticle 240.
Referring to
The mask unit 250 may be disposed on a central portion of the electrostatic chuck 270. For example, the mask unit 250 may have the square shape of which each side has a length of for example, about 152.4 mm. In some example embodiments, the mask unit 250 may include a mask substrate 252, a metal layer 254, a reflection layer 256, and mask patterns 258. The mask substrate 252 may include low thermal expansion material (LTEM). The metal layer 254 may be disposed under of the mask substrate 252. For example, the metal layer 254 may be disposed on a first surface of the mask substrate which is adjacent to the electrostatic chuck 270. When a positive voltage is applied to a chuck electrode 274, the metal layer 254 may be charged with negative charges. Alternatively, when a negative voltage is applied to the chuck electrode 274, the metal layer 254 may be charged with positive charges. The reflection layer 256 may be disposed on the mask substrate 252. For example, the reflection layer 256 may be disposed on a second surface of the mask substrate 252, which is opposite to the first surface. The reflection layer 256 may reflect the EUV plasma 204. In some example embodiments, the reflection layer 256 may include molybdenum layers and silicon layers. The molybdenum layers and the silicon layers may be alternately stacked. Each of the molybdenum layers and the silicon layers may have a thickness equal to a half of the wavelength of the EUV plasma 204. For example, each of the molybdenum layers and the silicon layers may have a thickness of about 7 nm. The mask patterns 258 may be disposed on the reflection layer 256. The mask patterns 258 may absorb the EUV plasma 204. In some example embodiments, the mask patterns 258 may include the image patterns 257 and black patterns 259. The image patterns 257 may be disposed on a central portion of the mask substrate 252. The image patterns 257 may be patterns to be transferred to a substrate W. The black patterns 259 may be disposed on an edge portion of the mask substrate 252.
In some example embodiments, the mask substrate 252 may include an image region 251 and a black region 253. The image region 251 may be disposed at a central portion of the mask unit 250. The image region 251 may be a region through which the EUV plasma 204 is projected. The image patterns 257 may be disposed on the image region 251. For example, the image region 251 may have a square shape of which each side has a length of, for example, about 101.6 mm.
The black region 253 may be disposed around the image region 251. The black region 253 may be a region absorbing the EUV plasma 204. The black patterns 259 may be disposed on the black region 253. The black region 253 may have a square ring shape having a width of, for example, about 25.4 mm.
The edge cover units 260 may be respectively disposed on both sides of the mask unit 250 opposite to each other. The edge cover units 260 may be disposed on the black region 253. Each of the edge cover units 260 may include fixing cover parts 262 and a floating cover part 264. The fixing cover parts 262 may be disposed on both corners of the mask unit 250. The floating cover part 264 may be connected between the fixing cover parts 262. The floating cover parts 264 of the edge cover units 260 may have first air holes 255, respectively. The floating cover parts 264 and the first air holes 255 may be aligned with the image region 251. Lengths of the floating cover parts 264 may be equal to those of the first air holes 255. For example, the lengths of the floating cover parts 264 may be equal to the length of one side of the image region 251. For example, each of the floating cover parts 264 may have the length of, for example, 152.4 mm.
The electrostatic chuck 270 may have second air holes 278. The first air holes 255 may be aligned on the second air holes 278, respectively. The second air hole 278 may be smaller than the first air hole 255. In some example embodiments, a size of the second air hole 278 may be equal to that of the first air hole 255.
Referring to
When a constant voltage is applied to the chuck electrode 274, the mask substrate 252 may be held or fixed on the burls 276. The second air hole 278 may be spaced apart from the first air hole 255 by a height of the burls 276. When the air 10 is provided into the second air holes 278, the air 10 may be transmitted into the first air holes 255. In some example embodiments, the air 10 between the first and second air holes 255 and 278 may be partially provided into between the plate 272 and the mask unit 250. As stated above, the mask unit 250 may reflect the EUV plasma 204. The mask unit 250 may be heated while reflecting the EUV plasma 204 because the mask unit 250 absorbs about 20% of the EUV plasma 204. The air 10 provided between the plate 272 and the mask unit 250 may cool the mask unit 250.
In some example embodiments, the mask unit 250 may include the mask substrate 252, the metal layer 254, the reflection layer 256, and the mask patterns 258. The mask substrate 252 may include the low thermal expansion material (LTEM). The metal layer 254 may be disposed under the mask substrate 252. When a positive voltage is applied to the chuck electrode 274, the metal layer 254 may be charged with negative charges. Alternatively, when a negative voltage is applied to the chuck electrode 274, the metal layer 254 may be charged with positive charges. The reflection layer 256 may be disposed on the mask substrate 252. The reflection layer 256 may reflect the EUV plasma 204. In some example embodiments, the reflection layer 256 may include molybdenum layers and silicon layers. The molybdenum layers and the silicon layers may be alternately stacked. Each of the molybdenum layers and the silicon layers may have the thickness equal to the half of the wavelength of the EUV plasma 204. For example, each of the molybdenum layers and the silicon layers may have a thickness of about 7 nm. The mask patterns 258 may be disposed on the reflection layer 256. The mask patterns 258 may absorb the EUV plasma 204. In some example embodiments, the mask patterns 258 may include the image patterns 257 and the black patterns 259. The image patterns 257 may be disposed on the central portion of the mask substrate 252. The image patterns 257 may be disposed on the image region 251. The image patterns 257 may be patterns to be transferred to a substrate W. The black patterns 259 may be disposed on the edge portion of the mask substrate 252. The black patterns 259 may be disposed on the black region 253.
The fixing cover parts 262 may be attached to or fixed on the sidewalls of the mask substrate 252. The fixing cover parts 262 may be attached to or fixed on the black patterns 259. In some example embodiments, the fixing cover parts 262 may be attached to or fixed on the top surface of the mask substrate 252.
The floating cover parts 264 may be disposed on the black patterns 259. The first air holes 255 may be formed between the mask unit 250 and the floating cover parts 264. The first air holes 255 may be disposed to be opposite to each other. The air 10 may be provided toward a center of the image region 251 through the first air holes 255. The air 10 may be provided onto the image patterns 257 and the reflection layer 256. Thus, it is possible to mitigate or prevent particle contamination of the image patterns 257 and/or the reflection layer 256.
The floating cover parts 264 may provide the air 10 onto the black patterns 259. In example embodiments, each of the floating cover parts 264 may include first and second floating cover sub parts 263 and 265. The first floating cover sub parts 263 may be disposed on the sidewalls of the mask substrate 252. The second floating cover sub parts 265 may be connected to top ends of the first floating cover sub parts 263, respectively. The second floating cover sub parts 265 may be disposed on the black patterns 259. The second floating cover sub parts 265 may extend from the sidewalls of the mask substrate 252 over the top surface of the mask substrate 252 to cover a black region 253 (but not cover the image region 251) of the mask substrate 252.
The electrostatic chuck 270 may be the same as described with reference to
The columns 266 may be disposed between the mask unit 252 and the floating cover part 264. The columns 266 may be disposed in the first air holes 255. The columns 266 may attach or fix the floating cover part 264 to the mask substrate 252. In some example embodiments, the columns 266 may include first set of columns 267 and second set of columns 269. The first set of columns 267 may be disposed between the first floating cover sub part 263 and the sidewall of the mask substrate 252. The second set of columns 269 may be disposed between the second floating cover sub part 265 and the top surface of the mask substrate 252.
The mask unit 250 of the reticle 240 and the electrostatic chuck 270 may be the same as described with reference to
Referring to
The mask unit 250 and the electrostatic chuck 270 may be the same as described with reference to
As described above, the reticle according to some example embodiments of the inventive concepts may include an edge cover unit which is coupled to an edge of the mask substrate to provide an air hole. Air may be provided on the mask patterns of the mask substrate through the air hole. The air may prevent particle contamination on the mask substrate and the mask patterns.
While the inventive concepts have been described with reference to example embodiments, it will be apparent to those skilled in the art that various changes and modifications may be made without departing from the spirits and scopes of the inventive concepts. Therefore, it should be understood that the above example embodiments are not limiting, but illustrative. Thus, the scopes of the inventive concepts are to be determined by the broadest permissible interpretation of the following claims and their equivalents, and shall not be restricted or limited by the foregoing description.
Number | Date | Country | Kind |
---|---|---|---|
10-2015-0156920 | Nov 2015 | KR | national |
Number | Name | Date | Kind |
---|---|---|---|
6499935 | Hirakawa | Dec 2002 | B1 |
6753941 | Visser | Jun 2004 | B2 |
6803161 | Shirasaki | Oct 2004 | B2 |
6862817 | Lenox | Mar 2005 | B1 |
7030959 | Sogard | Apr 2006 | B2 |
7655363 | Dai | Feb 2010 | B2 |
7723704 | Wood, II et al. | May 2010 | B2 |
7767985 | Okoroanyanwu et al. | Aug 2010 | B2 |
8535545 | Kim | Sep 2013 | B2 |
9140975 | Sun et al. | Sep 2015 | B2 |
9244368 | Delgado et al. | Jan 2016 | B2 |
20020089656 | Guo | Jul 2002 | A1 |
20030016338 | Yasuda | Jan 2003 | A1 |
20030071979 | Visser | Apr 2003 | A1 |
20030179354 | Araki | Sep 2003 | A1 |
20030207182 | Shirasaki | Nov 2003 | A1 |
20030227605 | del Puerto | Dec 2003 | A1 |
20040004704 | Wiseman | Jan 2004 | A1 |
20040100624 | Hagiwara | May 2004 | A1 |
20050117142 | Heerens | Jun 2005 | A1 |
20050121144 | Edo | Jun 2005 | A1 |
20060017895 | Sogard | Jan 2006 | A1 |
20070024831 | Hibbs | Feb 2007 | A1 |
20070254217 | Dai | Nov 2007 | A1 |
20080024751 | Hirayanagi | Jan 2008 | A1 |
20080113491 | Wood et al. | May 2008 | A1 |
20080152873 | Okoroanyanwu et al. | Jun 2008 | A1 |
20080184584 | Sogard | Aug 2008 | A1 |
20100159399 | Vermeulen | Jun 2010 | A1 |
20110032496 | Shibazaki | Feb 2011 | A1 |
20110065278 | Kim | Mar 2011 | A1 |
20120086925 | Kraus et al. | Apr 2012 | A1 |
20130003036 | Akiyama et al. | Jan 2013 | A1 |
20140085618 | Delgado et al. | Mar 2014 | A1 |
20140158157 | Kobayashi | Jun 2014 | A1 |
20150049323 | Bal et al. | Feb 2015 | A1 |
20150131071 | Kim | May 2015 | A1 |
20150168824 | Sun et al. | Jun 2015 | A1 |
20170115580 | Zhu | Apr 2017 | A1 |
Number | Date | Country |
---|---|---|
5190034 | Apr 2013 | JP |
5533227 | Jun 2014 | JP |
5742370 | Jul 2015 | JP |
10-2011-0068355 | Jun 2011 | KR |
10-1405066 | Jun 2014 | KR |
Number | Date | Country | |
---|---|---|---|
20170131638 A1 | May 2017 | US |