Claims
- 1. A method for forming a capacitor on a structure comprising the steps of:
- depositing a layer of polysilicon over said structure;
- depositing a layer of photoresist comprising a material compatible with silylation over said layer of polysilicon;
- without exposing said layer of photoresist to a reticle, exposing said layer of photoresist to a silicon-containing compound to silylate said layer of photoresist; and
- dry etching said layer of photoresist after said silylating step such that a layer of photoresist remnants remains on said layer of polysilicon.
- etching said layer of polysilicon using said layer of photoresist remnants as a masking layer to form peaks in said polysilicon layer;
- removing said photoresist remnants layer;
- patterning and etching said layer of polysilicon to create a storage node having said peaks;
- forming a capacitor dielectric layer over said storage node; and
- forming a top conductive node over said capacitor dielectric.
- 2. The method of claim 1, wherein said exposing step occurs at a temperature in the range of 160.degree.-200.degree. C.
- 3. The method of claim 1, wherein said exposing step occurs for a duration in the range of 0.1-5 minutes.
- 4. The method of claim 1, wherein said dry etching step comprises an oxygen plasma etch.
- 5. The method of claim 1, wherein said silicon-containing compound comprises hexamethyldisilane.
- 6. The method of claim 1, wherein said peaks have a height on the order of 100 nm.
- 7. The method of claim 1 wherein said layer of photoresist comprises a photosensitive resin containing a polymer.
- 8. A method for forming a capacitor on a structure comprising the steps of:
- depositing a layer of polysilicon over said structure;
- depositing a layer of photoresist over said layer of polysilicon;
- without exposing said layer of photoresist to light through a reticle, treating said layer of photoresist with a silicon-containing compound;
- dry etching said layer of photoresist such that a layer of remnants remains on said layer of polysilicon;
- etching said layer of polysilicon using said layer of remnants as a masking layer to form peaks in said polysilicon layer;
- removing said remnants layer;
- patterning and etching said layer of polysilicon to create a storage node having said peaks;
- forming a capacitor dielectric layer over said storage node; and
- forming a top conductive node over said capacitor dielectric.
- 9. The method of claim 8, wherein said treating step occurs at a temperature in the range of 160.degree.-200.degree. C.
- 10. The method of claim 8, wherein said treating step occurs for a duration in the range of 0.1-5 minutes.
- 11. The method of claim 8, wherein said dry etching step comprises an oxygen plasma etch.
- 12. The method of claim 8 wherein said silicon-containing compound comprises hexamethyldisilane.
- 13. The method of claim 8, wherein said peaks have a depth on the order of 100 nm.
- 14. The method of claim 8, wherein said layer of photoresist comprises a photosensitive resin containing a polymer.
Parent Case Info
This application claims priority under 35 USC & 119 (e) (1) of provisional application Ser. No. 60,003,862, filed Sep. 18, 1995.
US Referenced Citations (2)