Patent Application
20080002370
Embodiments are illustrated by way of example and not by way of limitation in the figures of the accompanying drawings in which like references indicate similar elements. It should be noted that references to “an” or “one” embodiment in this disclosure are not necessarily to the same embodiment, and such references mean at least one.
PCB 100 may be installed in desktop/laptop computers, servers, cellular phones, personal digital assistants, local area network interfaces, network bridges or routers, or any other suitable wired or wireless systems.
Memory module 140 described herein refers to a memory board that includes a plurality of packaged memory chips 150. Each memory chip 150 may be a dynamic random access memory (DRAM), synchronous DRAM (SDRAM), static RAM (SRAM), extended data output (EDO) DRAM, or any other volatile or nonvolatile memory chips suitable for use as the system memory of computing system 180. In one embodiment, memory module 140 may be a dual in-line memory module (DIMM), a single in-line memory module (SIMM), or any other suitable memory module that contains a plurality of memory chips 150 described above. A DIMM typically has a 64-bit data path and includes two independent sets of electrical contacts on the front and back sides of the module. Thus, data transfer speed of a DIMM may be doubled compared to that of a SIMM.
In one embodiment, computing system 180 may also include an input/output (I/O) board 170 that includes an I/O controller 130 providing I/O slots 190 for connecting to a plurality of I/O devices. I/O controller 130 provides an interface for processing core 110 and other components of computing system 180 to access to I/O devices (not shown). The I/O devices may include Industry Standard Architecture (ISA) devices, Peripheral Component Interconnect (PCI) devices, PCI Express devices, Universal Serial Bus (USB) devices, Small Computer System Interface (SCSI) devices, or other standard or proprietary I/O devices suitable for personal or server applications.
The vertical configuration allows a user to easily adjust the number of memory modules on PCB/computer system 100 according to his/her needs. A single memory socket on PCB 100 is sufficient to assemble multiple memory modules on board. Additional memory sockets on PCB 100 may be provided to allow multiple memory stacks on the PCB but is not generally required. Compared to a conventional design where four memory sockets are required to mount four memory modules, the configuration of stack 200 may save up to 75% memory socket space. Moreover, the stacked configuration has a lower profile compared to the conventional design that has the same number of memory modules. Thus, the stacked configuration may be implemented in a system that has height and space constraints.
Additionally, the stacked configuration allows board designers or end users to select memory modules based on the current memory price when the memory is installed into the system. For example, a system design may call for one gigabytes (G) of system memory. To achieve the required memory capacity, a designer may choose four 256-megabyte (M) memory modules, two 512M memory modules, or one 1G memory module. No matter which memory modules are eventually installed in the system, one memory socket on PCB 100 is sufficient to accommodate any combination of the memory modules. Thus, a memory design change will produce substantially zero impact on the PCB design.
Socket 32 may include slot 33 to receive the connector of yet another memory module that overlies memory module 30. Inside slot 33, there may be a plurality of conductors (not shown) forming electrical contacts with the connector of the overlying memory module. The conductors of socket 32 are electrically connected to conducting lines 38 of connector 31 of the same memory module 30. Thus, memory module 30 may forward electrical signals between any memory module in the stack and the components on the PCB. The electrical signals may include address, data, control, clock, and any other suitable signals. The memory is not permanently mounted on the socket and able to be removed from the socket.
In the foregoing specification, specific embodiments have been described. It will, however, be evident that various modifications and changes can be made thereto without departing from the broader spirit and scope of the appended claims. The specification and drawings are, accordingly, to be regarded in an illustrative rather than a restrictive sense.
