Patent Application
20110215462
This patent application claims a priority on convention based on Japanese Patent Application No. 2010-051068 filed on Mar. 8, 2010. The disclosure thereof is incorporated herein by reference.
The present invention relates to a semiconductor device and a method of manufacturing the same.
As one type of semiconductor device, a BGA (Ball Grid Array) type of semiconductor device is known. This type of semiconductor device is provided with an interconnection substrate, a semiconductor chip, wires, sealing resin, a heat radiator (also, to be referred to as a “heat spreader”) and a group of ball-shaped electrodes.
A method of manufacturing a MAP (Mold Array Package) type of semiconductor device is known. In this type, a semiconductor chip is mounted on a front surface of an interconnection substrate. Wire bonding is performed on the front surface of the interconnection substrate so that the interconnection substrate and the semiconductor chip are electrically connected by wires. A heat radiator is arranged above the semiconductor chip to face the front surface of the interconnection substrate. Sealing resin is injected between the interconnection substrate and the heat radiator. When the sealing resin is hardened, a resin sealing structure is formed in which the semiconductor chip and the wires are sealed with the sealing resin between the interconnection substrate and the heat radiator. The group of ball-shaped electrodes is formed on a back surface of the interconnection substrate.
Thereafter, the resin sealing structure is cut out by a disc-shaped blade from a side of the back surface of the interconnection substrate. By cutting out the resin sealing structure in a matrix shape, a plurality of semiconductor devices are obtained.
Patent Literature 1 (JP H11-214596A) is exemplified as a technique disclosing a technique relating to the MAP type of semiconductor device. Further, in Patent Literature 2 (JP 2006-294832A), there is disclosed a technique relating to a method of forming a heat radiator. In Patent Literature 3 (JP 2003-249512A), it is described that the resin sealing structure as a whole is cut using a disc-shaped blade. Also, in Patent Literature 4 (JP 2000-183218A), Patent Literature 5 (JP 2003-37236A) and Patent Literature 6 (JP H04-307961A), there is disclosed a technique of cutting.
However, when the resin sealing structure is cut out at once by a blade from a side of the interconnection substrate, burr is formed at a cut edge section because the heat radiator (of copper, for example) is soft and malleable. Since the burr is conductive, a short circuit may be possibly formed between the electrodes or between the interconnections of the implementation board, if the semiconductor device is mounted on an implementation board with the burr or a flake of a peeled burr adhered to the semiconductor device. Therefore, it is necessary to suppress the protrusion of burr.
In an aspect of the present invention, a method of manufacturing semiconductor devices is provided, in which a resin sealing structure includes an interconnection substrate board, semiconductor chips mounted on the interconnection substrate board, a heat radiation plate arranged above semiconductor chips, and sealing resin provided between the heat radiation plate and the interconnection substrate board. The method is achieved by cutting the heat radiation plate by a plate cutting blade in a first direction along a first heat radiation plate cutting line; by cutting the heat radiation plate by the plate cutting blade in a second direction orthogonal to the first direction along a second heat radiation plate cutting line orthogonal to the first heat radiation plate cutting line, after cutting in the first direction by the plate cutting blade; and by cutting the interconnection substrate board and the sealing resin along first and second interconnection substrate board cutting lines by a substrate board cutting blade in the first direction and the second direction, respectively, to divide the resin sealing structure into the semiconductor devices, each of which comprises an interconnection substrate, the semiconductor chip mounted on the interconnection substrate, the sealing resin provided to cover the semiconductor chip and the interconnection substrate, and a heat radiator. The second heat radiation plate cutting line and the second interconnection substrate board cutting line correspond to each other in position in a third direction orthogonal to the first direction and the second direction. The first heat radiation plate cutting line is displaced from the first interconnection substrate board cutting line by a preset displacement amount in a direction opposite to the second direction.
In another aspect of the present invention, a semiconductor device includes a semiconductor chip mounted on a front surface of an interconnection substrate; a heat radiator arranged above the semiconductor chip; and sealing resin provided between the heat radiator and the interconnection substrate. A center of the heat radiator is displaced from a center of the interconnection substrate by a preset displacement amount in a predetermined direction.
According to the present invention, when the heat radiator is cut, it is possible to prevent burr of the heat radiator from protruding rather than the position of the interconnection substrate while suppressing the burr of the heat radiator extending in a direction from the heat radiator toward the interconnection substrate and the burr of the heat radiator extending in a direction from the interconnection substrate toward the heat radiator.
The above and other objects, advantages and features of the present invention will be more apparent from the following description of certain embodiments taken in conjunction with the accompanying drawings, in which:
Hereinafter, a semiconductor device according to the present invention will be described below in detail with reference to the attached drawings.
The semiconductor chip 2 is mounted on a front surface of the interconnection substrate 1. The bonding wires 3 electrically connect the interconnection substrate 1 and the semiconductor chip 2. The heat radiator 5 is placed above the semiconductor chip 2. The sealing resin 4 is provided between the interconnection substrate 1 and the heat radiator 5 to seal the semiconductor chip 2 and the bonding wires 3 therewith. A group of the ball-shaped electrodes 8 are formed on a back surface of the interconnection substrate 1. A center of the heat radiator 5 (i.e., a center of an effective region 5b to be described later) is displaced from a center of the interconnection substrate 1 (i.e., a center of an effective region 1b to be described later) by a preset displacement amount SL in a first direction X. It is noted that burr formed at a time of cutting the heat radiation plate 5′ is shown as a triangle at a left edge of the heat radiator 5 in
As the interconnection substrate 1, a glass epoxy board and the like is used, and it is formed by laminating insulating layers of glass fibers impregnated with resin and copper interconnection layers, in this embodiment. The thickness of the interconnection substrate 1 is 0.3 to 0.6 mm in this embodiment.
The sealing resin 4 functions to protect the semiconductor chip 2 and bond the heat radiator 5. The thickness of the sealing resin 4 is 0.3 to 1.2 mm in this embodiment.
The heat radiator 5 is also referred to as “a heat spreader” that may be also denoted as H/Sp. The heat radiator 5 is provided to dissipate heat generated by the semiconductor chip 2. As the heat radiator 5, a metal plate is preferably used from the viewpoint of thermal conductivity. More specifically, the material of the heat radiator 5 is such as copper, aluminum, iron and the like. The thickness of the heat radiator 5 is 0.1 to 0.5 mm in this embodiment. Moreover, a surface of the heat radiator may have a film. For example, a surface coating may be applied and a surface treatment such as an anodized aluminum treatment may be applied.
Initially, an interconnection substrate board 1′ is prepared as shown in
As shown in
As shown in
As shown in
Next, as shown in
A pattern is marked with a laser on the surface of the effective region 5b of the heat radiation plate 5′.
As shown in
Next, as shown in
In the H/Sp cutting process (Step S5), the first blade 6 is required to cut away the malleable heat radiation plate 5′ Therefore, in order to prevent the second blade 9 from clogging, the second blade 9 has a cutting edge provided with grinding grain such as diamond grains (not shown) which are coarser (have larger diameters) than those of the first blade 6. Or, a blade may have a cutting edge provided with grinding grains adhered by thermosetting resin. The shape of the cutting edge of the second blade 9 may be round (not shown). Alternatively, the shape of the cutting edge of the second blade 9 may be sharpened and its tip may be V-character shaped (not shown).
Also, in the H/Sp cutting process (Step S5), a cutting depth D (mm) when the resin sealing structure is cut from a side of the heat radiation plate 5′ is preferably not so deep as to reach the interconnection substrate board 1′. For example, the cutting depth is preferably equal to or smaller than “the thickness (mm) of the heat radiation plate 5′+0.2 (mm)” (not shown). As discussed above, it is preferable to use the blade with the grinding grains arranged densely, as the second blade 9. If the sealing resin 4 is cut away by the second blade 9, the second blade 9 may be clogged in some cases. If the depth D is set to be equal to or smaller than “the thickness (mm) of the heat radiation plate 5′+0.2 (mm)”, the sealing resin 4 to be cut by the second blade 9 can be sufficiently reduced and the second blade 9 can be prevented from clogging.
As shown in
Here, it is preferable that the ball mounting process (Step S6) is performed after the H/Sp cutting process (Step S5), in order to prevent the ball-shaped electrodes 8 from being crushed due to force applied to the resin sealing structure by the second blade 9.
As shown in
Next, in order to divide the resin sealing structure in the first direction X, the interconnection substrate board 1′ and the sealing resin 4 are cut by the first blade 6 along the interconnection substrate board cutting line 1c in the first direction X. Here, the cutting direction may be either the first direction X or the direction opposite thereto. It may be also possible to cut along the interconnection substrate board cutting line 1c in the second direction Y after cutting along the interconnection substrate board cutting line 1c in the first direction X. As a result of this process, the resin sealing structure is divided into individual semiconductor devices. Here, the interconnection substrate board 1′ and the sealing resin 4 are cut by the first blade 6 in a state that the center of the thickness of the first blade 6 is coincident with the center of the region 1a extending in the first direction X.
In the interconnection substrate cutting process (Step S7), the first blade 6 is required to cut away the interconnection substrate board 1′ and the sealing resin 4. If a blade of the same type as the second blade 6 is used as the first blade 6, a cut section of the sealing resin 4 becomes coarse because the grinding grains are coarse. Therefore, as the first blade 6, it is preferable to use a blade provided with grinding grains such as diamond grains which are finer (smaller sized) than those of the second blade 9.
Moreover, it is preferable that the thicknesses (widths) of the first blade 6 and the second blade 9 are different from each other. Specifically, it is preferable that the thickness of the blade to be used in the subsequent process is thinner than that of the blade to be used in the preceding process. That is, in the present invention, it is preferable that the thickness of the first blade 6 is thinner than that of the second blade 9. Supposing that the thickness of the second blade 9 is A (not shown), a trench having the width of nearly A is formed in the H/Sp cutting process (Step S5). Further, it is assumed that the thickness of the first blade 6 is B (not shown). When B is smaller than A, the resin sealing structure can be cut without any burr, even if the first blade 6 is displaced more or less in the interconnection substrate cutting process (Step S7). This is because the cutting potion of the interconnection substrate board 1′ is positioned on an inner side than the cutting portion of the heat radiation plate 5′.
When the interconnection substrate cutting process (Step S7) is performed so that the resin sealing structure is cut, a plurality of semiconductor devices are obtained from the resin sealing structure to each have the interconnection substrate 1, the semiconductor chip 2, the bonding wires 3, the sealing resin 4, the heat radiator 5 and the group of ball-shaped electrodes 8, as shown in
The laser marking process (Step S4) is not limited to the order as described above, and may not be performed prior to the H/Sp cutting process (Step S5) but may be performed thereafter. For example, it may be performed after the interconnection substrate cutting process (Step S7).
Reasons of performing the H/Sp cutting process (Step S5) and the interconnection substrate cutting process (Step S7) will be described below.
First of all, it is assumed that the resin sealing structure as a whole is cut at once from a side of the interconnection substrate board 1′. In this case, stress directing from the side of the interconnection substrate board 1′ toward the side of the heat radiation plate 5′ would act on the heat radiation plate 5′ due to frictional force between the blade and the heat radiation plate 5′ of the resin sealing structure. Since there is no member for preventing deformation of the heat radiation plate 5′ on the side opposite to the sealing resin 4, it would be easy to form burr of the heat radiation plate 5′ in a direction from the side of the interconnection substrate board 1′ toward the side opposite to the heat radiation plate 5′.
On the other hand, in the present invention, the heat radiation plate 5′ is cut along the heat radiation plate cutting lines 5c in the first direction X and second direction Y in the H/Sp cutting process (Step S5). In this process, the sealing resin 4 is provided on the side applied with tensile force, of the heat radiation plate 5′ Thus, the deformation of the heat radiation plate 5′ is suppressed by the sealing resin 4. Moreover, since the heat radiation plate 5′ is cut along the heat radiation plate cutting line 5c in the first direction X and second direction Y in the H/Sp cutting process (Step S5), in the interconnection substrate cutting process, there is no need to cut the heat radiation plate 5′ at all or need to cut only a part of the heat radiation plate 5′ (Step S7). Therefore, the amount of cutting the heat radiation plate 5′ can be reduced in a direction opposite to a direction of the heat radiation plate 5′. As a result, it is possible to prevent burr from being formed at the edge portion of the heat radiation plate 5′ in the direction from the interconnection substrate board 1′ toward the heat radiation plate 5′
On the contrary, it is assumed that the resin sealing structure as a whole is cut at once from a side of the heat radiation plate 5′. In this case, the blade is pressed into a depth direction to reach the surface of the interconnection substrate board 1′ after the cutting edge thereof contacts the heat radiation plate 5′. For this period, stress acts on the heat radiation plate 5′ in a direction from the heat radiation plate 5′ to the interconnection substrate board 1′ due to tensile by frictional force between the blade and the heat radiation plate 5′. Since the blade is pressed deeply, the force applied to the heat radiation plate 5′ increases. Therefore, although the sealing resin 4 is provided on the rear side of the heat radiation plate 5′, the heat radiation plate 5′ is deformed and burr may be possibly formed at an edge portion of the heat radiator so as to direct from the heat radiation plate 5′ toward the interconnection substrate board 1′.
On the other hand, in the present invention, since the interconnection substrate board 1′ and the sealing resin 4 are cut in the interconnection substrate cutting process (Step S7), the heat radiation plate 5′ and a remaining part of the sealing resin 4 are merely required to be cut in the H/Sp cutting process (Step S5). Therefore, the force applied to the heat radiation plate 5′ can be reduced. Consequently, it is possible to suppress the forming of burr at the edge portion of the heat radiator.
As described above, according to the semiconductor device according to the embodiment of the present invention, by performing the H/Sp cutting process (Step S5) and the interconnection substrate cutting process (Step S7), it is possible to suppress the formation of burr directed in the third direction Z and the burr directed in a direction opposite to the third direction Z. Usually, if the burr is formed, the burr should be removed from the viewpoint of safety of a product. However, in the present invention, since the formation of the burr directed in the third direction Z or in the direction opposite to the third direction Z can be suppressed, a burr removing process is not needed. Thus, although the cutting process by a blade is required two times, the number of processes is not increased since the burr removing process is not needed.
The displacement of the center of the region 5a extending in the second direction y from the center of the region 1a extending in the second direction Y will be described below.
Initially, a comparison example with the embodiment of the present invention will be described in which the center of the region 5a extending in the second direction Y is coincident with the center of the region 1a extending in the second direction Y as shown in
In this case, the processes from the chip mounting process (Step S1) to the laser marking process (Step S4) are performed and then the H/Sp cutting process (Step S5) is performed as shown in
Here, in the H/Sp cutting process (Step S5), the heat radiation plate 5′ is cut by the second blade 9 along the heat radiation plate cutting line 5c in the second direction Y in the first heat radiator cutting process. Subsequently, in the second heat radiator cutting process, the heat radiation plate 5′ is cut along the heat radiation plate cutting line 5c in the first direction X. At this time, stress acts on the heat radiation plate 5′ in a cutting direction due to frictional force between the second blade 6 and the heat radiation plate 5′. In the second heat radiator cutting process, since there is no member for preventing deformation of the heat radiation plate 5′ in a portion cut along the heat radiation plate cutting line 5c extending in the second direction Y when the heat radiation plate 5′ is cut in the first direction X, burr is easily formed toward the cutting direction of the heat radiation plate 5′. This burr would possibly protrude from an edge of the semiconductor device as shown in
Here, assuming that the thickness of the second blade 9 is A0 and the thickness of the first blade 6 is B0, a distance C0 between the cutting line of the interconnection substrate board 1′ and the cutting line of the heat radiation plate 5′ is C0 (A0−B0)/2. Therefore, if the distance C0 is longer than the length BU of the burr, it seems that the burr does not protrude from the edge of the interconnection substrate 1. However, in a case of the heat radiation plate 5′ being copper (Cu), this method is difficult in practical use. In such a case, the length BU of burr is about 0.18 mm. Assuming that a permissible value of protrusion of the burr from the edge of the interconnection substrate 1 is 0.04 mm, the length C0 is about 0.14 mm in order that the burr does not protrude from the edge of the interconnection substrate 1. Therefore, the thickness A0 of the second blade 9 should be larger than the thickness B0 of the first blade 6 by 0.28 mm. However, if the thickness A0 of the second blade 9 is extremely large, a large load is applied to the resin sealing structure and the blade in the H/Sp cutting process (Step S5). In such a case, a problem arises that a peeling is caused between the heat radiation plate 5′ and the sealing resin 4, the life of the blade is reduced or a wear-out of a side is caused, and therefore it is not preferable.
Whereas, in the present invention, the center of the region 5a extending in the second direction Y is displaced by the preset displacement amount SL in the first direction X from the center of the region 1a extending in the second direction Y. In this case, the processes from the chip mounting process (Step S1) to the interconnection substrate cutting process (Step S7) are performed, and when the resin sealing structure is cut in a matrix shape, a plurality of semiconductor devices are obtained from the resin sealing structure. In each of the plurality of semiconductor devices, the center of the effective region 5b of the heat radiator 5 is displaced from the center of the effective region 1b by the preset displacement amount SL in the direction opposite to the final cutting direction, i.e., in the first direction X.
Also, in the present invention, although the burr is formed on the heat radiator 5 in the direction opposite to the first direction X, as shown in
The preset displacement amount SL is determined based on the length SU of burr, the thickness A of the second blade 9 and the thickness 13 of the first blade 6. It is assumed here that the permissible length of protrusion of the burr from the edge of the interconnection substrate 1 is BUok (mm), in order to suppress the protrusion of burr, the preset displacement amount SL is expressed by the following equation:
SL=BU−Buok−(A−B)/2
Here, a derivation of this equation will be described with reference to
By the way, as in the interconnection substrate cutting process (Step S7), it is desirable from the viewpoint of the burr that the region 1a for the interconnection substrate board cutting line is located inside the region 5a for the heat radiation plate cutting line 5c. That is, it is desirable that d is equal to or larger than 0 in
2(BU−BUok)≧A−B
By this equation and the above equation, (A−B) should satisfy the following relational equation:
2(BU−BUok)≧A−B≧BU−BUok
In
SL=BU−BUok−(A−B)/2=0.15−0.11=0.04 Thus, the preset displacement amount SL becomes 0.04 mm. Therefore, in the present invention, as shown in
As described above, in the semiconductor device by the embodiment of the present invention, the thickness of the first blade 6 is thinner than the thickness of the second blade 9, and the center of the region 5a for the heat radiation plate cutting line 5c extending in the second direction Y is displaced by the preset displacement amount SL in the first direction X from the center of the region 1a for the interconnection substrate board cutting line 1c extending in the second direction Y, whereby exposure of the burr in the final cutting direction can be suppressed. Thus, in the present invention, similarly to the first effect, a burr removing process is not needed. Therefore, although setting of the preset displacement amount SL is needed, the number of processes does not increase since the burry removing process is not needed.
In the present invention, although the H/Sp cutting process (Step S5) is performed in advance and the interconnection substrate cutting process (Step S7) is performed thereafter, the order of the processes is not limited to this. Since it is sufficient as long as a plurality of semiconductor devices can be obtained from the resin sealing structure, the interconnection substrate cutting process (Step S7) may be performed in advance and the H/Sp cutting process (Step S5) may be performed thereafter. In this case, it is preferable that the second blade 9 does not reach the heat radiation plate 5′ in the interconnection substrate cutting process (Step S7), and a half-cut process may be performed similarly to the H/Sp cutting process (Step S5). That is, a rate of the cutting may be appropriately determined as long as the plurality of semiconductor devices can be obtained from the resin sealing structure.
Moreover, in the present invention, the semiconductor device of a BGA type has been described as an example in which the semiconductor chip 2 and the interconnection substrate board 1′ are connected through the bonding wires 3. However, the present invention is not limited to this type. For example, a stacked MCP (Multi Chip Package) type of the semiconductor device may be adopted in which the plurality of semiconductor chips 2 are laminated on the interconnection substrate board 1′, or a planar MCP type of the semiconductor device may be adopted in which the plurality of semiconductor chips 2 are placed on the interconnection substrate board 1′. In the semiconductor device of the stacked MCP type/planar MCP type, the plurality of semiconductor chips 2 are provided in the semiconductor device, and each of the plurality of semiconductor chips 2 is connected to the interconnection substrate 1 through the bonding wires 3.
Moreover, in the present invention, a FCBGA (Flip-chip Ball Grid Array) type of the semiconductor device or COC (Chip on Chip)/Wire Mixed type of the semiconductor device may be adopted. In the FCBGA type of the semiconductor device, the semiconductor chip 2 is arranged in such a manner that the electrode formation surface thereof faces the interconnection substrate 1. In the COC (Chip on Chip)/Wire Mixed type of the semiconductor device, the plurality of semiconductor chips 2 are provided inside thereof. The plurality of semiconductor chips 2 includes a first semiconductor chip that is connected to the interconnection substrate 1 through the bonding wires 3 and a second semiconductor chip that is formed on the first semiconductor chip. The second semiconductor chip is arranged in such a manner that the electrode formation surface thereof faces the first semiconductor chip. In the case of the FCBGA type or COC (Chip on Chip)/Wire Mixed type of the semiconductor device, the heat radiation plate 5′ may be either contacted or not contacted with a back surface of the semiconductor chip 2. However, the heat radiation plate 5′ is preferably contacted with the back surface of the semiconductor chip 2 from the viewpoint of a heat discharge property.
Moreover, in the present invention, as an application thereof, when the laser marking process (Step S4) is performed prior to the H/Sp cutting process (Step S5), a laser prescribing process may be added in the laser marking process (Step S4) so that a part or an entire of the heat radiation plate cutting lines 5c in the first direction X and the second direction Y of the heat radiation plate 5′ is cut away by a laser. Since the laser is used in the laser prescribing process, although the time for performing the same is not shortened, the formation of burr in the final cutting direction can be suppressed.
Moreover, in the present invention, as an application thereof, when the laser marking process (Step S4) is performed after the H/Sp cutting process (Step S5), a laser burr removing process may be added in the laser marking process (Step S4) so that a part or an entire of the heat radiation plate cutting lines 5c in the first direction X and the second direction Y of the heat radiation plate 5′ is cut away by a laser. Since a laser is used in the laser burr removing process, although the time of performing the same is not shortened, the formation of burr in the final cutting direction can be suppressed.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2010-051068 | Mar 2010 | JP | national |
