Embodiment 1 of the invention will now be described with reference to the accompanying drawings.
The solder layer 2 is preferably made of a material easily fused between metals, such as lead (Pb), tin (Sn), indium (In) or gold (Au). In this embodiment, a solder material utilizing eutectic of Sn and Au is used. As the P electrode 3 of this embodiment, a multilayered film of palladium (Pd), platinum (Pt) and gold (Au) is used. In this case, reflectance of light of a wavelength of 450 nm entering the interface between GaN and Pd from a side of the GaN is 46%, which is higher than reflectance of the light (vertical incident) on the interface between GaN and Si, that is, 10%.
In the semiconductor multilayer 101, a p-type contact layer 4 made of GaN doped with magnesium (Mg) (i.e., Mg-doped GaN) and having a thickness of 0.1 μm, an overflow suppressing layer (not shown) made of Mg-doped AlGaN and having a thickness of 20 nm, a light emitting layer 5 having a MQW structure including five pairs each of a well layer of undoped InGaN with a thickness of 3 nm and a barrier layer of Si-doped GaN with a thickness of 5 nm, and an n-type cladding layer 6 made of Si-doped GaN and having a thickness of 0.2 μm are stacked in this order above the P electrode 3.
The semiconductor superlattice layer 7 includes a multilayered film including twenty pairs each of a thin film of Si-doped AlN with a thickness of 5 nm and a thin film of Si-doped GaN with a thickness of 25 run; a thin film of undoped Al0.3Ga0.7N with a thickness of 30 nm (not shown); and a thin film of undoped AlN with a thickness of 40 nm (not shown). The semiconductor superlattice layer 7 works as a buffer layer in forming the semiconductor multilayer 101 as described below.
In the semiconductor superlattice layer 7, a two-dimensional periodic structure 102 in the periodic concave-convex shapes is formed. The concave-convex shapes are formed because each thin film included in the semiconductor superlattice layer 7 itself has bent portions. In other words, each thin film included in the semiconductor superlattice layer 7 is continuously formed without breaking at each irregularity. A method for forming such a two-dimensional periodic structure 102 will be described later.
The surface of the semiconductor superlattice layer 7 works as a light emitting face, and the two-dimensional periodic structure 102 functions as a photonic crystal, that is, a two-dimensional periodic diffraction grating. In order to realize low contact resistance, an N electrode 8 is formed in a region where the undoped Al0.3Ga0.7N layer and the undoped AlN layer are removed so as to expose the multilayered film. In order to reduce the contact resistance, the N electrode 8 is preferably made of a metal with a low work function, such as titanium (Ti) or aluminum (Al). In this embodiment, the N electrode 8 is made of a multilayered film of Ti, Pt and Au.
Next, as shown in
Subsequently, a light emitting layer 5, an overflow suppressing layer and a p-type contact layer 4 are successively formed on the buffer layer as a semiconductor multilayer 101. For growing these crystals, MOCVD (metal-organic chemical vapor deposition), MBE (molecular beam epitaxy) or the like can be employed, and the MOCVD is employed in this embodiment. The conditions for growing the crystal for the light emitting layer 5 are set so that the center wavelength of PL (photoluminescence) spectra emitted from the light emitting layer 5 can be 450 nm.
Furthermore, as shown in
According to the structure of the semiconductor device shown in
It is understood from
In the case where the light emitting layer 5 is formed on a flat crystal growing substrate under the same conditions as in this embodiment, the threading dislocation density in the light emitting layer 5 is 2×1010/cm2. On the other hand, in the case where the light emitting layer 5 is formed on a crystal growing substrate having the two-dimensional periodic structure 103, the threading dislocation density in the light emitting layer 5 is 6×109/cm2, which is lower by 30% than that obtained in the light emitting layer formed on the flat substrate. The threading dislocation density can be further reduced by optimizing the diameter of each recess included in the two-dimensional periodic structure, the structure such as the inclined angle of the sidewall of or the depth of the recess and the crystal growth conditions.
As is understood from
It is understood from the aforementioned images that the luminous distribution in the light emitting layer 5 can be changed into a periodic distribution through the bending and the density reduction of threading dislocations described above. Furthermore, a ring-shaped bright portion obtained on the two-dimensional periodic structure means that the luminous intensity is higher than in a bright portion obtained on the flat region.
The CL integrated intensity exemplified in
When the two-dimensional periodic structure 102 thus formed in the surface portion of the semiconductor device functions as a photonic crystal having a diffraction effect, the efficiency for extracting light from the active layer can be expected to improve. In order to efficiently cause diffraction, the period of the two-dimensional periodic structure 102 is preferably not less than one time and not more than twenty times of the emission wavelength of the semiconductor multilayer. Incidentally, in the case where the emission wavelength in vacuum is 450 nm and a semiconductor has a diffractive index of 3, the emission wavelength obtained in the semiconductor is 150 nm.
In the case where the period of the two-dimensional periodic structure 102 is shorter than this range, the change of the propagating angle through the diffraction is so large that the radiation angle obtained after the diffraction is larger than the critical refraction angle. Therefore, light confined within a semiconductor device cannot be taken out due to the total reflection. Accordingly, the efficiency for extracting light cannot be improved. Alternatively, in the case where the period of the two-dimensional periodic structure 102 is longer than this range, the change of the propagating angle is small and the diffraction efficiency is also lowered. Accordingly, the light extraction efficiency cannot be improved.
On the other hand, a difference in the I-V characteristic caused by using the two-dimensional periodic structure is small. In other words, the electric characteristic is not lowered even when a semiconductor multilayer is grown on the two-dimensional periodic structure.
As described so far, an LED with high internal quantum efficiency and high light extraction efficiency can be inexpensively provided according to this embodiment. Furthermore, although description of this embodiment has been made on a nitride-based compound semiconductor that is a chemically stable material and is difficult to subject to microprocessing because a two-dimensional periodic structure obtained from the material has a small period in accordance with the emission wavelength, the present invention is applicable to a semiconductor device for emitting infrared or red light using AlGaAs or AlGaInP as a semiconductor.
Embodiment 2 of the invention will now be described with reference to the accompanying drawing.
The crystal growing substrate 9 has a one-dimensional periodic structure in the form of periodically formed recesses. As the one-dimensional periodic structure, recesses with a depth of 5 μm may be formed, for example. In the semiconductor device of this embodiment, there is no need to form a photonic crystal by a semiconductor superlattice layer 7. When the width at the inclined part (a step portion 41) of each recess is set equal to or larger than a part serving as a waveguide (with a width of approximately 2 μm), such as a ridge strip or the like of the semiconductor laser diode, namely, equal to or larger than 2 μm, the threading dislocation density is lowered in the active layer of the waveguide. Accordingly, the crystal growing substrate 9 device may not have the periodical structure of the recesses.
The semiconductor superlattice layer 7 includes twenty pairs each of a thin film of Si-doped AlN with a thickness of 5 nm and a thin film of Si-doped GaN with a thickness of 25 nm stacked on the crystal growing substrate 9. Each thin film included in the semiconductor superlattice layer 7 is formed along the recesses of the crystal growing substrate 9. Thus, the semiconductor superlattice layer 7 is provided with periodic concave-convex shapes resulting from transfer of the two-dimensional periodic structure of the crystal growing substrate 9.
The semiconductor multilayer 101 includes an n-type contact layer 21 made of GaN and having a thickness of 5 μm, an n-type cladding layer 22 made of Al0.05Ga0.95N and having a thickness of 1 μm, a light emitting layer 23 with a thickness of 29 nm, a guide layer 24 made of undoped GaN and having a thickness of 0.1 μm, a p-type electron overflow suppressing layer 25 made of Al0.2Ga0.8N and having a thickness of 10 nm, a p-type cladding layer 26 with a thickness of 0.1 μm, and a p-type contact layer 27 made of GaN and having a thickness of 50 nm. The light emitting layer 23 is a multiple quantum well layer including three pairs each of a well layer 23A of undoped In0.15Ga0.85N with a thickness of 3 nm and a barrier layer 23B of undoped In0.02Ga0.98N with a thickness of 5 nm. In these layers, an n-type layer is doped with Si and a p-type layer is doped with Mg.
A part of the p-type cladding layer 26 and a part of the p-type contact layer 27 are removed by etching so as to form a ridge stripe 26A. A P electrode 31 made of a multilayered film of Pd and Pt is formed on the ridge stripe 26A. An N electrode 32 made of a multilayered film of Ti and Al is formed on a surface of the crystal growing substrate 9 opposite to the semiconductor superlattice layer 7 (i.e., the back surface).
In the semiconductor laser diode of this embodiment, the semiconductor multilayer 101 including the light emitting layer 23 is formed on the semiconductor superlattice layer 7 having the periodic concave-convex shapes. Therefore, in a region of the semiconductor multilayer 101 formed on or above a step portion 41 of the concave-convex shapes as shown in
Embodiment 3 of the invention will now be described with reference to the accompanying drawing.
The crystal growing substrate 9 has a one-dimensional periodic structure in the form of periodically formed recesses. As the one-dimensional periodic structure, recesses with a depth of 200 nm may be formed, for example. In the semiconductor device of this embodiment, there is no need to form a photonic crystal by a semiconductor superlattice layer 7. When the width at the inclined part (a step portion 41) of each recess is set equal to or larger than the gate length (approximately 0.1 to 1 μm) in the field effect transistor, namely, equal to or larger than 0.2 μm, the threading dislocation density is lowered at the gate thereof. Accordingly, the crystal growing substrate 9 may not have the periodical structure of the recesses.
The semiconductor superlattice layer 7 includes twenty pairs each of a thin film of undoped AlN with a thickness of 5 nm and a thin film of undoped GaN with a thickness of 25 nm stacked on the crystal growing substrate 9. Each thin film included in the semiconductor superlattice layer 7 is formed along the recesses of the crystal growing substrate 9. Thus, the semiconductor superlattice layer 7 is provided with periodic concave-convex shapes resulting from transfer of the two-dimensional periodic structure of the crystal growing substrate 9.
The semiconductor multilayer 101 includes a buffer layer 51 made of undoped GaN and having a thickness of 5 μm and a cap layer 52 made of Si-doped Al0.1Ga0.9N and having a thickness of 0.2 μm.
A drain electrode 33 and a source electrode 34 both made of a multilayered film of Ti and Al are formed on the cap layer 52 to be spaced from each other. A gate electrode 35 made of a multilayered film of Pd and Au is formed between the drain electrode 33 and the source electrode 34.
In the field effect transistor of this embodiment, the semiconductor multilayer 101 is formed on the semiconductor superlattice layer 7 having the periodic concave-convex shapes. Therefore, in a region of the semiconductor multilayer 101 formed on or above a step portion 41 of the concave-convex shapes as shown in
Furthermore, the drain electrode 33, the source electrode 34 and the gate electrode 35 are formed above the step portions 41 having a low threading dislocation density. Therefore, the contact resistance between the drain electrode 33/the source electrode 34 and the channel can be lowered. Furthermore, the channel can be efficiently controlled by the gate electrode 35.
Although a hetero-junction field effect transistor is exemplified in this embodiment, similar effects can be attained in a field effect transistor of any type by lowering the threading dislocation density in a region where a channel is formed. Also, similar effects can be attained not only in a field effect transistor but also in a Schottky diode and a bipolar transistor.
In each of the embodiments described above, the two-dimensional periodic structure provided in the crystal growing substrate and the two-dimensional periodic structure transferred in the semiconductor superlattice layer have the hexagonal symmetrical arrangement. However, recesses or projections are two-dimensionally periodically arranged in the two-dimensional periodic structure, and similar effects can be attained in the case where recesses or projections are periodically arranged in the form of, for example, a square to be tetragonally asymmetric. Furthermore, the depth of a recess or the height of a projection is approximately 50 nm through 200 nm. Moreover, the plane shape of a recess or a projection is not limited to a circular shape but may be a polygonal shape. Also, the cross-sectional shape of a projection is not limited to a column-shape but may be a trapezoidal shape.
Although the crystal growing substrate is made of Si in each embodiment, any substrate can be used as far as a semiconductor superlattice layer and a semiconductor multilayer can be formed thereon, and the substrate can be appropriately selected in accordance with the materials of the semiconductor superlattice layer and the semiconductor multilayer. For example, the substrate may be made of gallium arsenide or indium phosphorus instead of Si. Also, the holding substrate may be any substrate and may be made of gallium arsenide or indium phosphorus instead of Si.
As described so far, the semiconductor device of the present invention is useful as an inexpensive semiconductor device with good characteristics.
The description of the embodiments of the present invention is given above for the understanding of the present invention. It will be understood that the invention is not limited to the particular embodiments described herein, but is capable of various modifications, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, it is intended that the following claims cover all such modifications and changes as fall within the true spirit and scope of the invention.
Number | Date | Country | Kind |
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2006-230405 | Aug 2006 | JP | national |