Semiconductor device and method for fabricating the same

Abstract

After a capacitor forming portion is formed on a semiconductor substrate by patterning an insulating film and a silicon film, a sidewall insulating film is formed on each of the side surfaces of the capacitor forming portion. Then, the insulating film is selectively removed such that the silicon film is exposed in a depressed portion surrounded by the sidewall insulating film. Subsequently, a first metal film is deposited and then a thermal process is performed to change the silicon film into a first metal film. Thereafter, an insulating film and a second metal film are buried in the depressed portion. The insulating film composes the capacitor insulating film of a capacitor element. The first metal silicide film and the second metal film compose the lower and upper electrodes of the capacitor element, respectively.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1A to 3C are step cross-sectional views schematically showing a method for fabricating a semiconductor device according to a first embodiment of the present invention;

FIGS. 4A to 5D are step cross-sectional views showing a first example of a method for fabricating a capacitor element according to a second embodiment of the present invention;

FIGS. 6A to 7D are step cross-sectional views showing a second example of the method for fabricating the capacitor element according to the second embodiment;

FIG. 8 is a cross-sectional view showing a variation of the capacitor element according to the second embodiment;

FIG. 9 is a cross-sectional view showing another variation of the capacitor element according to the second embodiment; and

FIGS. 10A to 11D are step cross-sectional views showing a method for fabricating a conventional capacitor element.

Claims

1. A semiconductor device comprising a capacitor element, wherein the capacitor element comprises:a capacitor element portion having a lower electrode made of a metal silicide film formed on an isolation region provided in a semiconductor substrate, a capacitor insulating film made of a first insulating film formed on the lower electrode, and an upper electrode made of a metal film formed on the capacitor insulating film;a first sidewall insulating film formed on each of side surfaces of the capacitor element portion; anda second insulating film formed on the semiconductor substrate in lateral relation to the first sidewall insulating film andthe capacitor element portion has an upper surface planarized to be flush with an upper surface of the second insulating film.

2. The semiconductor device of claim 1, wherein the meal silicide film is made of NiSi or Ni2Si and the metal film is made of a nickel film.

3. The semiconductor device of claim 1, further comprising a first MIS transistor, wherein the first MIS transistor comprises:a first gate portion having a first gate insulating film formed on the semiconductor substrate, a first gate made of a first metal silicide film formed on the first gate insulating film, the first insulating film formed on the first gate electrode, and the metal film formed on the first insulating film;a second sidewall insulating film formed on each of side surfaces of the first gate portion; andthe second insulating film formed on the semiconductor substrate in lateral relation to the second sidewall insulating film andthe first gate portion has an upper surface planarized to be flush with the upper surface of the second insulating film.

4. The semiconductor device of claim 3, wherein the first metal silicide film has the same composition ratio as the metal silicide film.

5. The semiconductor device of claim 3, wherein the first MIS transistor is an N-type MIS transistor.

6. The semiconductor device of claim 1, further comprising a second MIS transistor, wherein the second MIS transistor comprises:a second gate portion having a second gate insulating film formed on the semiconductor substrate and a second gate electrode made of a second metal silicide film formed on the second gate insulating film;a third sidewall insulating film formed on each of side surfaces of the second gate portion; andthe second insulating film formed on the semiconductor substrate in lateral relation to the third sidewall insulating film andthe second gate portion has an upper surface planarized to be flush with the upper surface of the second insulating film.

7. The semiconductor device of claim 1, wherein the second metal silicide film is metal-richer than the metal silicide film.

8. The semiconductor device of claim 6, wherein the second metal silicide film is made of Ni3Si.

9. The semiconductor device of claim 6, wherein the second MIS transistor is a P-type MIS transistor.

10. A method for fabricating a semiconductor device comprising a capacitor element having a capacitor element portion, wherein the capacitor element portion has a lower electrode made of a metal silicide film, a capacitor insulating film made of a first insulating film, and an upper electrode made of a metal film, the method comprising the steps of:(a) forming an isolation region in a semiconductor substrate;(b) forming a capacitor forming portion having a first silicon film and a first protective film on the isolation region;(c) forming a first sidewall insulating film on each of side surfaces of the capacitor forming portion;(d) after the step (c), forming a second insulating film on the semiconductor substrate and then planarizing the second insulating film to expose an upper surface of the first protective film;(e) after the step (d), selectively removing the first protective film from the capacitor forming portion;(f) after the step (e), forming the metal silicide film by silicidizing the entire first silicon film;(g) forming the first insulating film covering an upper surface of the metal silicide film;(h) forming the metal film on the first insulating film; and(i) after the step (h), planarizing an upper surface of the metal film of the capacitor element portion such that the upper surface of the metal film is flush with an upper surface of the second insulating film.

11. The method of claim 10, wherein the meal silicide film is made of NiSi or Ni2Si and the metal film is made of a nickel film.

12. The method of claim 10, wherein the semiconductor device further comprises a first MIS transistor having a first gate portion,the first gate portion has a first gate insulating film, a gate electrode made of a first metal silicide film, the first insulating film, and the metal film,the step (b) includes forming a first gate forming portion having the first gate insulating film, a second silicon film, and a second protective film on a portion of the semiconductor substrate surrounded by the isolation region,the step (c) includes forming a second sidewall insulating film on each of side surfaces of the first gate forming portion,the step (d) includes planarizing the second insulating film to expose an upper surface of the second protective film,the step (e) includes selectively removing the second protective film from the first gate forming portion,the step (f) includes silicidizing the entire second silicon film to form the first metal silicide film,the step (g) includes forming the first insulating film covering an upper surface of the first metal silicide film, andthe step (i) includes planarizing an upper surface of the metal film of the first gate portion such that the upper surface of the metal film is flush with the upper surface of the second insulating film.

13. The method of claim 10, wherein the semiconductor device further comprises a second MIS transistor having a second gate portion,the second gate portion has a second gate insulating film and a gate electrode made of a second metal silicide film,the step (b) includes forming a second gate forming portion having the second gate insulating film, a third silicon film, and a third protective film on a portion of the semiconductor substrate surrounded by the isolation region,the step (c) includes forming a third sidewall insulating film on each of side surfaces of the second gate forming portion,the step (d) includes planarizing the second insulating film to expose an upper surface of the third protective film,the step (e) includes selectively removing the third protective film from the second gate forming portion,the step (f) includes silicidizing the entire third silicon film to form the second metal silicide film, andthe step (i) includes planarizing an upper surface of the second metal silicide film of the second gate portion such that the upper surface of the second metal silicide film is flush with the upper surface of the second insulating film.