This application claims the benefit of priority based upon Japanese Patent Application No. 2012-218247 filed on Sep. 28, 2012, the entire contents of which are herein incorporated by reference.
A certain aspect of the embodiments discussed herein relates to a semiconductor device and a method for manufacturing a semiconductor device.
GaN, AlN, or InN that is a nitride semiconductor, a material composed of a mixed crystal thereof, or the like has a higher saturated electron velocity or a wider band gap and is being studied for a higher withstand voltage or higher output electronic device. For a higher withstand voltage or higher output electronic device, a technique for a field-effect transistor (FET), in particular, a high electron mobility transistor (HEMT) is developed.
For an HEMT using a nitride semiconductor, a structure is provided in such a manner that an electron running layer is formed of GaN and an electron supplying layer is formed of AlGaN. In the HEMT with such a structure, a higher concentration of 2-dimensional electron gas (2DEG) is produced by a distortion caused by a difference between lattice constants of GaN and AlGaN, namely, a piezoelectric polarization, so that it is possible to obtain a semiconductor device with a higher efficiency and a higher output.
Meanwhile, a higher concentration of 2DEG is produced in the HEMT with a structure provided in such a manner that an electron running layer is formed of GaN and an electron supplying layer is formed of AlGaN, so as to have a problem that it is difficult to attain normally-off-state. Accordingly, in order to solve such a problem, a method is disclosed for forming a p-GaN layer between a gate electrode and an electron supplying layer to suppress production of a 2DEG just under the gate electrode and thereby provide a normally-off-state (for example, Japanese Patent Application Publication No. 2007-19309).
Meanwhile, a p-GaN layer formed between an electron supplying layer and a gate electrode is generally formed by forming a p-GaN layer on an entire surface of the electron supplying layer and subsequently removing the p-GaN layer in an area except an area where the gate electrode is to be formed, by dry etching. However, an in-plane distribution of etching is produced in dry etching, and hence, when a p-GaN layer is removed entirely, a part of an electron supplying layer may also be removed. Thus, when a part of an electron supplying layer is removed to provide a thinner electron supplying layer, a density of a 2DEG may be lowered so that an on-resistance may be higher. Additionally, such dry etching is conducted by, for example, reactive ion etching (RIE) using a gas that includes a chlorine component or the like.
Hence, a normally-off type semiconductor device with a lower on-resistance and a method for manufacturing such a semiconductor device are desired.
According to an aspect of the embodiments, a semiconductor device includes a first semiconductor layer formed on a substrate, a second semiconductor layer formed on the first semiconductor layer, a third semiconductor layer and a fourth semiconductor layer formed on the second semiconductor layer, a gate electrode formed on the third semiconductor layer, and a source electrode and a drain electrode contacting and formed on the fourth semiconductor layer, wherein the third semiconductor layer is formed of a semiconductor material for attaining p-type on an area just under the gate electrode, and a concentration of silicon in the fourth semiconductor layer is higher than that in the second semiconductor layer.
The object and advantages of the invention will be realized and attained by means of the elements and combinations particularly pointed out in the claims. It is to be understood that both the forgoing general description and the following detailed description are exemplary and explanatory and are not restrictive of the invention.
Embodiments for implementing the invention will be described below. Additionally, an identical numeral reference will be provided to an identical member or the like and descriptions thereof will be omitted.
(Semiconductor Device)
A semiconductor device in a first embodiment will be described. A semiconductor device in the present embodiment is an HEMT with a structure illustrated in
Specifically, a nucleating layer 12, a buffer layer 13, an electron running layer 21, and an electron supplying layer 22 are formed on a substrate 11 composed of a semiconductor or the like. Thereby, 2DEG 21a is generated in the electron running layer 21 near an interface between the electron running layer 21 and the electron supplying layer 22. Furthermore, a p-GaN layer 23 is formed in an area where a gate electrode 31 is to be formed, on the electron supplying layer 22 and a regrowth electron supplying layer 24 is formed in an area except an area where the gate electrode 31 is to be formed. Furthermore, a source electrode 32 and a drain electrode 33 are formed on the regrowth electron supplying layer 24, and the gate electrode 31 is formed on the p-GaN layer 23. Additionally, the electron running layer 21, the electron supplying layer 22, the p-GaN layer 23, and the regrowth electron supplying layer 24 may be described as a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, and a fourth semiconductor layer, respectively, in the present embodiment.
While a silicon substrate is used for the substrate 11 and the electron running layer 21 is formed of a GaN layer, the electron supplying layer 22 is formed of an AlGaN layer and the regrowth electron supplying layer 24 is formed of an AlGaN layer. Additionally, in the present embodiment, the regrowth electron supplying layer 24 is doped with silicon more than that of the electron supplying layer 22, as will be described below.
Because a semiconductor device in the present embodiment is such that the electron supplying layer 22 is formed thinly and further the p-GaN layer 23 is formed in an area where the gate electrode 31 is to be formed, it is possible to eliminate 2DEG 21a just under the gate electrode 31. Thereby, it is possible to provide a normally-off-state. Furthermore, the regrowth electron supplying layer 24 is formed on the electron supplying layer 22 in an area except an area where the gate electrode 31 is to be formed, so that the electron supplying layer is substantially thickly formed. Hence, it is possible to increase a density of 2DEG 21a in an area except just under the gate electrode 31, and thereby, it is possible to decrease an on-resistance.
(Method for Manufacturing a Semiconductor Device)
Next, a method for manufacturing a semiconductor device in the present embodiment will be described.
First, a nucleating agent 12, a buffer layer 13, an electron running layer 21, an electron supplying layer 22, and a p-GaN film 23t are sequentially laminated and formed on a substrate 11, due to epitaxial growth in accordance with an Metal-organic Vapor Phase Epitaxy (MOVPE) as illustrated in
Specifically, the nucleating layer 12 is formed by supplying trimethylaluminum (TMA) that is an organometallic material including Al and ammonia (NH3) as raw material gasses and growing AlN to have a thickness of 200 nm on conditions that are a substrate temperature of 1000° C. and a growth pressure of 20 kPa.
The buffer layer 13 is formed by supplying trimethylgallium (TMG) that is an organometallic material including Ga, TMA, and NH3, as raw material gasses and growing AlGaN to have a thickness of about 500 nm on conditions that are a substrate temperature of 1000° C. and a growth pressure of 40 kPa. Additionally, the buffer layer 13 in the present embodiment is formed of three layers with different composition ratios, wherein an Al0.8Ga0.2N layer, an Al0.5Ga0.5N layer, and an Al0.2Ga0.8N layer are formed in order from a side of the formed nucleating layer 12. It is possible to form the buffer layer 13 formed of such layers with different composition ratios by changing a ratio of amounts of supply of TMG and TMA.
The electron running layer 21 is formed by supplying TMG and NH3 as raw material gasses and growing GaN to have a thickness of about 1000 nm on conditions that are a substrate temperature of 1000° C. and a growth pressure of 60 kPa.
The electron supplying layer 22 is formed by supplying TMG, TMA, and NH3 as raw material gasses and growing Al0.2Ga0.8N to have a thickness of about 10 nm on conditions that are a substrate temperature of 1000° C. and a growth pressure of 40 kPa.
The p-GaN film 23t is formed by supplying TMG and NH3 as raw material gasses and growing GaN to have a thickness of about 50 nm on conditions that are a substrate temperature of 1000° C. and a growth pressure of 60 kPa. Additionally, as the p-GaN film 23t is formed, cyclopentadienylmagnesium (CP2Mg) is supplied together with the raw material gasses so as to be doped with Mg that is an impurity element for attaining p-type. Herein, a concentration of doping Mg is about 4×1019 cm−3.
Then, the p-GaN layer 23 is formed in an area just under the gate electrode 31 as illustrated in
Then, the regrowth electron supplying layer 24 is formed on the electron supplying layer 22, by an MOVPE, as illustrated in
Furthermore, the regrowth electron supplying layer 24 in the present embodiment is formed at a temperature lower than a temperature for forming the electron supplying layer 22. This is because if a temperature at which the regrowth electron supplying layer 24 is formed is high, a defect is caused in the p-GaN layer 23 and thereby a normally-off state is not provided. Thus, it is preferable for the regrowth electron supplying layer 24 to be formed at a temperature at which damage is not provided to the p-GaN layer 23, that is, a temperature greater than or equal to 900° C. and less than 1000° C. Additionally, when an AlGaN layer is formed at a low temperature, a concentration of C included in the AlGaN layer is high, but it is possible to prevent an influence of a high concentration of C, because the regrowth electron supplying layer 24 in the present embodiment is doped with Si. That is, C functions as an acceptor in an AlGaN layer, but it is possible to cancel a function of C as an acceptor by being doped with Si that functions as a donor. Hence, formation is conducted in such a manner that a concentration of Si in the regrowth electron supplying layer 24 in the present embodiment is higher than a concentration of Si in the electron supplying layer 22.
Then, the gate electrode 31 is formed on the p-GaN layer 23, and a source electrode 32 and a drain electrode 33 are formed on the regrowth electron supplying layer 24, as illustrated in
(Characteristics of a Semiconductor Device)
As a semiconductor device was fabricated by a method for manufacturing a semiconductor device in the present embodiment as described above, it was confirmed that a good normally-off characteristic was exhibited. Furthermore, after the p-GaN film 23t as illustrated in
Next, a case where an AlGaB layer corresponding to a regrowth electron supplying layer is formed at a substrate temperature of 1000° C. without being doped with Si and a case where an AlGaN layer corresponding to a regrowth electron supplying layer is formed at a substrate temperature of 920° C., differently from the present embodiment, will be described for comparison.
First, the case where an AlGaB layer corresponding to a regrowth electron supplying layer is formed at a substrate temperature of 1000° C. without being doped with Si will be described. A layer corresponding to a regrowth electron supplying layer to be formed in this case is formed by supplying TMG, TMA, and NH3 as raw material gasses and growing an AlGaN layer to have a thickness of about 10 nm on conditions that are a substrate temperature of 1000° C. and a growth pressure of 40 kPa. A semiconductor device in which this layer corresponding to a regrowth electron supplying layer was formed did not exhibit a normally-off characteristic. It is considered that this is because a temperature was high for forming an AlGaN layer as a layer corresponding to a regrowth electron supplying layer, so that the p-GaN layer 23 was damaged and it was not possible to suppress generation of 2DEG just under a gate electrode. Furthermore, this layer corresponding to a regrowth electron supplying layer was used to fabricate a sample illustrated in
Next, the case where an AlGaN layer corresponding to a regrowth electron supplying layer is formed at a substrate temperature of 920° C. without being doped with Si will be described. A layer corresponding to a regrowth electron supplying layer to be formed in this case is formed by supplying TMG, TMA, and NH3 as raw material gasses and growing an AlGaN layer to have a thickness of about 10 nm on conditions that are a substrate temperature of 920° C. and a growth pressure of 40 kPa. It was confirmed that a semiconductor device in which this layer corresponding to a regrowth electron supplying layer was formed exhibited a good normally-off characteristic. It is considered that this is because a temperature was low for forming an AlGaN layer as a layer corresponding to a regrowth electron supplying layer, so that the p-GaN layer 23 was not damaged and elimination of 2DEG just under a gate electrode was maintained. Furthermore, this AlGaN layer was used to fabricate a sample similar to that illustrated in
Thus, it is possible for a semiconductor device in the present embodiment to attain a normally-off state and provide a low on-resistance.
Next, a second embodiment will be described. The present embodiment is for a semiconductor device with a regrowth electron supplying layer being formed of an InAlN. Specifically, a regrowth electron supplying layer 124 is formed of an InAlN on an electron supplying layer 22 as illustrated in
In a method for manufacturing a semiconductor device in the present embodiment, a substrate temperature for forming the regrowth electron supplying layer 124 is 700° C. and formation thereof is conducted by MOVPE while trimethylindium (TMI), TMA, and NH3 are raw material gasses. Thus, the regrowth electron supplying layer 124 is formed of an In0.17Al0.38N layer with a thickness of about 10 nm. Additionally, when the regrowth electron supplying layer 124 is formed, silane (SiH4) is supplied together with the raw material gasses to be doped with Si. Herein, a concentration of doping Si is greater than or equal to 2×1017 cm−3 and less than or equal to 1×1019 cm−3. Additionally, a content(s) other than as described above is/are similar to that/those in the first embodiment.
Next, a third embodiment will be described. The present embodiment is for a semiconductor device, a power supply device, and a high-frequency amplifier.
A semiconductor device in the present embodiment is such that a semiconductor device in the first or second embodiment is discretely packaged, wherein a thus discretely packaged semiconductor device will be described based on
First, a semiconductor device manufactured in the first or second embodiment is cut by dicing or the like to form a semiconductor chip 410 that is an HEMT of a GaN-type semiconductor material. This semiconductor chip 410 is fixed on a lead frame 420 by a die-attaching agent 430 such as a solder.
Then, a gate electrode 441 is connected to a gate lead 421 by a bonding wire 431, while a source electrode 442 is connected to a source lead 422 by a bonding wire 432 and a drain electrode 443 is connected to a drain lead 423 by a bonding wire 433. Additionally, the bonding wires 431, 432, and 433 are formed of a metal material such as Al. Furthermore, the gate electrode 441 in the present embodiment is a gate electrode pad that is connected to the gate electrode 31 in the first or second embodiment. Similarly, the source electrode 442 is a source electrode pad that is connected to the source electrode 32 and the drain electrode 443 is a drain electrode pad that is connected to the drain electrode 33.
Then, plastic sealing with a molded resin 440 is conducted by a transfer molding method. Thus, it is possible to fabricate a discretely packaged semiconductor device that is an HEMT using a GaN-type semiconductor material.
Furthermore, a power supply device and a high-frequency amplifier in the present embodiment are a power supply device and a high-frequency amplifier using the semiconductor device in the first or second embodiment, respectively.
A power supply device in the present embodiment will be described based on
Next, a high-frequency amplifier in the present embodiment will be described based on
According to a semiconductor device and a method for manufacturing a semiconductor device as disclosed in the above-mentioned embodiments, it is possible to obtain a normally-off type semiconductor device with a low on-resistance.
All examples and conditional language provided herein are intended for the pedagogical purposes of aiding the reader in understanding the invention and the concepts contributed by the inventor to further the art, and are not to be construed as limitations to such specially recited examples and conditions, nor does the organization of such examples in the specification relate to a showing of the superiority and inferiority of the invention. Although one or more embodiments of the present invention have been described in detail, it should be understood that the various changes, substitutions, and alterations could be made hereto without departing from the spirit and scope of the invention.
Number | Date | Country | Kind |
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2012-218247 | Sep 2012 | JP | national |