SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

Abstract

The invention provides a semiconductor device capable of protecting a low-concentration implantation region from contamination, and a method for manufacturing the same. A photoresist is formed on a TEOS film which is formed all over a substrate, and removed by photo engraving so as to be partially left. This photo resist is of a positive or negative type opposite to a type of a photoresist used for formation of a p-offset region and a diffusion region. Then, the TEOS film is etched back except for a portion just under the photoresist. Thereby, a contamination protective film is formed just under the photoresist, and a side wall is formed on a side face of a gate electrode.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a sectional view showing a method for manufacturing a semiconductor device according to Embodiment 1;

FIG. 2 is a sectional view showing the method for manufacturing the semiconductor device according to Embodiment 1;

FIG. 3 is a sectional view showing the method for manufacturing the semiconductor device according to Embodiment 1;

FIG. 4 is a sectional view showing the method for manufacturing the semiconductor device according to Embodiment 1;

FIG. 5 is a sectional view showing the method for manufacturing the semiconductor device according to Embodiment 1;

FIG. 6 is a sectional view showing the method for manufacturing the semiconductor device according to Embodiment 1;

FIG. 7 is a sectional view showing the method for manufacturing the semiconductor device according to Embodiment 1;

FIG. 8 is a sectional view showing the method for manufacturing the semiconductor device according to Embodiment 1;

FIG. 9 is a sectional view showing the method for manufacturing the semiconductor device according to Embodiment 1;

FIG. 10 is a sectional view showing the method for manufacturing the semiconductor device according to Embodiment 1;

FIG. 11 is a sectional view showing the method for manufacturing the semiconductor device according to Embodiment 1;

FIG. 12 is a sectional view showing the method for manufacturing the semiconductor device according to Embodiment 1;

FIG. 13 is a sectional view showing a method for manufacturing a semiconductor device according to Embodiment 2;

FIG. 14 is a sectional view showing the method for manufacturing the semiconductor device according to Embodiment 2;

FIG. 15 is a sectional view showing the method for manufacturing the semiconductor device according to Embodiment 2;

FIG. 16 is a sectional view showing the method for manufacturing the semiconductor device according to Embodiment 2;

FIG. 17 is a sectional view showing the method for manufacturing the semiconductor device according to Embodiment 2;

FIG. 18 is a sectional view showing the method for manufacturing the semiconductor device according to Embodiment 2;

FIG. 19 is a sectional view showing the method for manufacturing the semiconductor device according to Embodiment 2;

FIG. 20 is a sectional view showing the method for manufacturing the semiconductor device according to Embodiment 2;

FIG. 21 is a sectional view showing the method for manufacturing the semiconductor device according to Embodiment 2;

FIG. 22 is a sectional view showing the method for manufacturing the semiconductor device according to Embodiment 2;

FIG. 23 is a sectional view showing the method for manufacturing the semiconductor device according to Embodiment 2;

FIG. 24 is a sectional view showing the method for manufacturing the semiconductor device according to Embodiment 2; and

FIG. 25 is a sectional view showing the method for manufacturing the semiconductor device according to Embodiment 2.

Claims

1. A method for manufacturing a semiconductor device, comprising: a first region formation step of selectively implanting impurities at a low concentration of not more than 1×1017 cm−3 into a semiconductor substrate to form a first region;a contamination protective film formation step of forming a contamination protective film on said first region; anda second region formation step of selectively implanting impurities at a high concentration of not less than 1×1018 cm−3 into said semiconductor substrate to form a second region at least either prior to or after said first region formation step and said contamination protective film formation step.

2. The method for manufacturing the semiconductor device according to claim 1, wherein in said first region formation step, a first photoresist is formed by use of a prescribed mask, andin said contamination protective film formation step, a second photoresist of a positive or negative type opposite to a type of said first photoresist is formed by use of said prescribed mask.

3. The method for manufacturing the semiconductor device according to claim 1, further comprising a step of selectively implanting a silicide material into said substrate by use of said contamination protective film as a silicide protective film.

4. The method for manufacturing the semiconductor device according to claim 2, further comprising a step of selectively implanting a silicide material into said substrate by use of said contamination protective film as a silicide protective film.

5. The method for manufacturing the semiconductor device according to claim 1, wherein in said second region formation step, phosphorous is implanted as said impurities.

6. The method for manufacturing the semiconductor device according to claim 2, wherein in said second region formation step, phosphorous is implanted as said impurities.

7. The method for manufacturing the semiconductor device according to claim 3, wherein in said second region formation step, phosphorous is implanted as said impurities.

8. The method for manufacturing the semiconductor device according to claim 4, wherein in said second region formation step, phosphorous is implanted as said impurities.

9. The method for manufacturing the semiconductor device according to claim 5, wherein said first region includes at least either an offset region of a high-voltage field effect transistor or a diffused resistor region.

10. The method for manufacturing the semiconductor device according to claim 6, wherein said first region includes at least either an offset region of a high-voltage field effect transistor or a diffused resistor region.

11. The method for manufacturing the semiconductor device according to claim 7, wherein said first region includes at least either an offset region of a high-voltage field effect transistor or a diffused resistor region.

12. The method for manufacturing the semiconductor device according to claim 8, wherein said first region includes at least either an offset region of a high-voltage field effect transistor or a diffused resistor region.

13. A semiconductor device comprising: a first region selectively formed on a semiconductor substrate and containing impurities at a low concentration of not more than 1×1017 cm−3; anda source-drain region selectively formed on said semiconductor substrate, containing impurities at a high concentration of not less than 1×1018 cm−3, and located with a surface thereof below a surface of said first region.

14. The semiconductor device according to claim 13, wherein a surface of a region just under a gate electrode disposed in proximity to said source-drain region has the same height as the surface of said first region.

15. The semiconductor device according to claim 13, wherein said first region includes at least either an offset region of a high-voltage field effect transistor or a diffused resistor region.

16. The semiconductor device according to claim 14, wherein said first region includes at least either an offset region of a high-voltage field effect transistor or a diffused resistor region.