The present invention relates in general to semiconductor devices and, more particularly, to a semiconductor device and method of forming a multi-layer shielding structure over the semiconductor device.
Semiconductor devices are commonly found in modern electronic products. Semiconductor devices perform a wide range of functions, such as signal processing, high-speed calculations, transmitting and receiving electromagnetic signals, controlling electronic devices, photo-electric, and creating visual images for television displays. Semiconductor devices are found in the fields of communications, power conversion, networks, computers, entertainment, and consumer products. Semiconductor devices are also found in military applications, aviation, automotive, industrial controllers, and office equipment.
Semiconductor devices, particularly in high frequency applications, such as radio frequency (RF) wireless communications, often contain one or more integrated passive devices (IPDs) to perform necessary electrical functions. The IPDs are susceptible to electromagnetic interference (EMI), radio frequency interference (RFI), harmonic distortion, or other inter-device interference, such as capacitive, inductive, or conductive coupling, also known as cross-talk, which can interfere with their operation. The high-speed switching of a digital circuit also generates interference.
Multiple semiconductor die and IPDs can be integrated into a system-in-package (SIP) module or other electronic device assembly for higher density in a small space and extended electrical functionality. Within the SIP module, semiconductor die and IPDs are mounted to a substrate for structural support and electrical interconnect. An encapsulant is deposited over the semiconductor die, IPDs, and substrate. A shielding layer is often formed over the encapsulant to isolate or block sensitive circuits from EMI, RFI, harmonic distortion, or other inter-device interference.
The electronic devices and modules can generate or be susceptible to high frequency and low frequency interference. High frequency interference is generally above 1.0 gigahertz (GHz), and low frequency interference is below 1.0 GHz. Low frequency interference can be generated by a magnetic field emitted from various sources, such as Qi-WPC compatible devices, near field communication (NFC) devices, radio frequency identification (RFID) devices, power matters alliance (PMA) compatible devices, alliance for wireless power (A4WP) compatible devices, wireless charging technology (WCT) devices, switching power supplies, inductor modules, and magnetic random access memory (RAM), as well as electromagnetic noise interference radiated by SiP or high density circuits operating at a high frequency. A high frequency shield can be made with conductive material coating, such as silver (Ag) or copper (Cu). However, most shielding materials are ineffective for low frequency interference, particularly from low frequency magnetic fields.
The present invention is described in one or more embodiments in the following description with reference to the figures, in which like numerals represent the same or similar elements. While the invention is described in terms of the best mode for achieving the invention's objectives, it will be appreciated by those skilled in the art that it is intended to cover alternatives, modifications, and equivalents as may be included within the spirit and scope of the invention as defined by the appended claims and their equivalents as supported by the following disclosure and drawings. The term “semiconductor die” as used herein refers to both the singular and plural form of the words, and accordingly, can refer to both a single semiconductor device and multiple semiconductor devices.
Semiconductor devices are generally manufactured using two complex manufacturing processes: front-end manufacturing and back-end manufacturing. Front-end manufacturing involves the formation of a plurality of die on the surface of a semiconductor wafer. Each die on the wafer contains active and passive electrical components, which are electrically connected to form functional electrical circuits. Active electrical components, such as transistors and diodes, have the ability to control the flow of electrical current. Passive electrical components, such as capacitors, inductors, and resistors, create a relationship between voltage and current necessary to perform electrical circuit functions.
Back-end manufacturing refers to cutting or singulating the finished wafer into the individual semiconductor die and packaging the semiconductor die for structural support, electrical interconnect, and environmental isolation. To singulate the semiconductor die, the wafer is scored and broken along non-functional regions of the wafer called saw streets or scribes. The wafer is singulated using a laser cutting tool or saw blade. After singulation, the individual semiconductor die are mounted to a package substrate that includes pins or contact pads for interconnection with other system components. Contact pads formed over the semiconductor die are then connected to contact pads within the package. The electrical connections can be made with conductive layers, bumps, stud bumps, conductive paste, or wirebonds. An encapsulant or other molding material is deposited over the package to provide physical support and electrical isolation. The finished package is then inserted into an electrical system and the functionality of the semiconductor device is made available to the other system components.
An electrically conductive layer 112 is formed over active surface 110 using PVD, CVD, electrolytic plating, electroless plating process, or other suitable metal deposition process. Conductive layer 112 can be one or more layers of aluminum (Al), Cu, tin (Sn), nickel (Ni), gold (Au), Ag, or other suitable electrically conductive material. Conductive layer 112 operates as contact pads electrically connected to the circuits on active surface 110.
An electrically conductive bump material is deposited over conductive layer 112 using an evaporation, electrolytic plating, electroless plating, ball drop, or screen printing process. The bump material can be Al, Sn, Ni, Au, Ag, Pb, Bi, Cu, solder, and combinations thereof, with an optional flux solution. For example, the bump material can be eutectic Sn/Pb, high-lead solder, or lead-free solder. The bump material is bonded to conductive layer 112 using a suitable attachment or bonding process. In one embodiment, the bump material is reflowed by heating the material above its melting point to form balls or bumps 114. In one embodiment, bump 114 is formed over an under bump metallization (UBM) having a wetting layer, barrier layer, and adhesive layer. Bump 114 can also be compression bonded or thermocompression bonded to conductive layer 112. Bump 114 represents one type of interconnect structure that can be formed over conductive layer 112. The interconnect structure can also use bond wires, conductive paste, stud bump, micro bump, or other electrical interconnect.
In
In
A conductive post or pillar 134 is formed on interconnect substrate 120 and electrically connected to conductive layer 122. Conductive post 134 can be used for vertical electrical interconnect. Alternatively, a plurality of conductive posts 134, or a conductive wall 134, provides electromagnetic shielding between electrical components 130a-103b and electrical components 130c-130e.
In
In
Electrical components 130a-130e in SIP module 148 may contain IPDs that are susceptible to or generate EMI, RFI, harmonic distortion, and inter-device interference (collectively referred to as “interference”). For example, the IPDs contained within electrical components 130a-130e provide the electrical characteristics needed for high-frequency applications, such as resonators, high-pass filters, low-pass filters, band-pass filters, symmetric Hi-Q resonant transformers, and tuning capacitors. In another embodiment, electrical components 130a-130e contains digital circuits switching at a high frequency, which could interfere with the operation of IPDs in SIP module 148. Electrical components 130a-130e may generate low frequency interference from low frequency magnetic fields.
In
The soft FM layer is made with material having a high magnetic permeability. The soft FM layer can be iron (Fe), Ni, nickel iron (NiFe) alloy, iron silicon (FeSi) alloy, silicon steel (Fe and carbon), nickel iron molybdenum (NiFeMo) alloy, nickel iron molybdenum copper (NiFeMoCu) alloy, iron silicon aluminum (FeSiAl) alloy, nickel zinc (NiZn), manganese zinc (MnZn), other ferrites, amorphous magnetic alloy, amorphous metal alloy, and nanocrystalline alloy. The soft FM layer can also be Fe or cobalt (Co) in combination with at least one of Ni, Cu, Mo, Mn, Si, Zn, Al, Cr, boron (B), niobium (Nb), phosphorus (P), zirconium (Zr), and combination thereof. In one embodiment, soft FM material is 72-82 wt. % Ni and 12-20 wt. % Fe. The soft FM layer can be a single, homogeneous, uniform composition of metal or materials, as described above. The high σ metal can be Ag, Cu, Au, and Al.
Another type of layer can be a laminated spacer structure, i.e., multiple layers with one or more materials, including Ta, Mo, Ti, Cr, Cu, Al, Au, Ag, SiO2, Al2O3, Si3N4, AlN, and oxide-based semiconductors or insulators. The spacer can be laminated before or after soft FM layer lamination. The laminated spacer prevents out-of-plane magnetization caused by perpendicular anisotropy, suppressing eddy current effect. The laminated spacer can be formed by sputtering, spray, or wet plating to a thickness of 1.0 nanometers (nm) to 1.0 micrometers (μm).
The soft FM layer or high-σ metal can be deposited or coated using PVD, spray, and wet plating. The thickness of each layer ranges from 1.0 nm-1.0 μm. Any number of layers of material can be used for electromagnetic shield 150. The soft FM layer can be deposited in a uniform aligning magnetic field applied parallel to the film plane or under RF or direct current (DC) bias applied to a substrate to induce a uniaxial magnetic anisotropy and reduce residual stresses. A variety of combinations of these layers and materials is within the spirit and scope of the invention.
SIP module or semiconductor component assembly 148 contains electrical components 130a-130e covered by encapsulant 138 and multi-layer electromagnetic shielding structure 150. SIP module or semiconductor component assembly 148 can be used for mobile communications, automotive, consumer electronics, wifi, bluetooth, touch screen controller, speaker amplifier, power control, flash memory, sensors, microelectromechanical systems (MEMS), Qi-WPC compatible devices, NFC devices, RFID devices, PMA compatible devices, A4WP compatible devices, WCT devices, switching power supplies, inductor modules, and magnetic RAM, as well as electromagnetic noise interference radiated by SIP or high density circuits operating at a high frequency. Each of these devices and applications can generate or be susceptible to high frequency and low frequency interference. High frequency interference is generally above 1.0 GHz, and low frequency interference is below 1.0 GHz. Multi-layer electromagnetic shielding structure 150 is effective for isolating or blocking low frequency interference from low frequency magnetic fields, as well as high frequency interference. In particular, the various multi-layer combinations of protective layer, soft FM layer, and high-σ metal, as described above, protect sensitive devices from low frequency interference, caused by low frequency magnetic fields, by redirecting the magnetic field through the shielding materials and away from the protected device. The various multi-layer combinations of protective layer, soft FM layer, and high-σ metal also protect sensitive devices from high frequency interference.
Electronic device 300 can be a stand-alone system that uses the semiconductor packages to perform one or more electrical functions. Alternatively, electronic device 300 can be a subcomponent of a larger system. For example, electronic device 300 can be part of a tablet, cellular phone, digital camera, communication system, or other electronic device. Alternatively, electronic device 300 can be a graphics card, network interface card, or other signal processing card that can be inserted into a computer. The semiconductor package can include microprocessors, memories, ASIC, logic circuits, analog circuits, RF circuits, discrete devices, or other semiconductor die or electrical components. Miniaturization and weight reduction are essential for the products to be accepted by the market. The distance between semiconductor devices may be decreased to achieve higher density.
In
In some embodiments, a semiconductor device has two packaging levels. First level packaging is a technique for mechanically and electrically attaching the semiconductor die to an intermediate substrate. Second level packaging involves mechanically and electrically attaching the intermediate substrate to the PCB. In other embodiments, a semiconductor device may only have the first level packaging where the die is mechanically and electrically mounted directly to the PCB. For the purpose of illustration, several types of first level packaging, including bond wire package 306 and flipchip 308, are shown on PCB 302. Additionally, several types of second level packaging, including ball grid array (BGA) 310, bump chip carrier (BCC) 312, land grid array (LGA) 316, multi-chip module (MCM) or SIP module 318, quad flat non-leaded package (QFN) 320, quad flat package 322, embedded wafer level ball grid array (eWLB) 324, and wafer level chip scale package (WLCSP) 326 are shown mounted on PCB 302. In one embodiment, eWLB 324 is a fan-out wafer level package (Fo-WLP) and WLCSP 326 is a fan-in wafer level package (Fi-WLP). Depending upon the system requirements, any combination of semiconductor packages, configured with any combination of first and second level packaging styles, as well as other electronic components, can be connected to PCB 302. In some embodiments, electronic device 300 includes a single attached semiconductor package, while other embodiments call for multiple interconnected packages. By combining one or more semiconductor packages over a single substrate, manufacturers can incorporate pre-made components into electronic devices and systems. Because the semiconductor packages include sophisticated functionality, electronic devices can be manufactured using less expensive components and a streamlined manufacturing process. The resulting devices are less likely to fail and less expensive to manufacture resulting in a lower cost for consumers.
While one or more embodiments of the present invention have been illustrated in detail, the skilled artisan will appreciate that modifications and adaptations to those embodiments may be made without departing from the scope of the present invention as set forth in the following claims.