This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2022-201592, filed on Dec. 16, 2022, the entire contents of which are incorporated herein by reference.
Embodiments described herein relate to a semiconductor device and a method of manufacturing the same.
To form a high-quality SiO2 film (silicon oxide film), it is needed to form the SiO2 film at high temperature. However, it is difficult to form the SiO2 film at high temperature in some cases.
Embodiments will now be explained with reference to the accompanying drawings. Identical components in
In one embodiment, a method of manufacturing a semiconductor device includes supplying first silane-based gas to a surface of a first film, the first silane-based gas being aminosilane-based gas. The method further includes supplying second silane-based gas to the surface of the first film, the second silane-based gas having a thermal decomposition temperature lower than a thermal decomposition temperature of the first silane-based gas. The method further includes supplying an oxidant to the surface of the first film to form a second film on the surface of the first film, the second film including silicon and oxygen.
The semiconductor device of the present embodiment includes a core insulator 1, a channel semiconductor layer 2, a tunnel insulator 3, a charge storing layer 4, a block insulator 5, and an electrode layer 6. The block insulator 5 includes an insulator 5a and an insulator 5b. The electrode layer 6 includes a barrier metal layer 6a and an electrode material layer 6b.
In
The core insulator 1, the channel semiconductor layer 2, the tunnel insulator 3, the charge storing layer 4, and the insulator 5a are formed in the memory hole MH and constitute a memory cell of the three-dimensional semiconductor memory. The insulator 5a is formed on side faces of the electrode layers and the insulators in the memory hole MH, and the charge storing layer 4 is formed on a side face of the insulator 5a. The charge storing layer 4 can store signal charges of the three-dimensional semiconductor memory. The tunnel insulator 3 is formed on a side face of the charge storing layer 4, and the channel semiconductor layer 2 is formed on a side face of the tunnel insulator 3. The channel semiconductor layer 2 functions as a channel of the three-dimensional semiconductor memory. The core insulator 1 is formed on a side face of the channel semiconductor layer 2.
The insulator 5a is, for example, a SiO2 film (silicon oxide film). The charge storing layer 4 is, for example, a SiN film (silicon nitride film). The tunnel insulator 3 is, for example, a SiO2 film. The channel semiconductor layer 2 is, for example, a polysilicon layer. The core insulator 1 is, for example, a SiO2 film.
The memory hole MH has a column shape extending in the Z direction and has a circular shape in a plan view. Accordingly, the core insulator 1, the channel semiconductor layer 2, the tunnel insulator 3, the charge storing layer 4, and the insulator 5a in the memory hole MH form a columnar portion having a column shape extending in the Z direction. The columnar portion is an example of a first columnar portion.
The insulator 5b, the barrier metal layer 6a, and the electrode material layer 6b are formed between two insulators of the above-described plurality of insulators and sequentially formed on a lower face of the upper insulator, an upper face of the lower insulator, and the side face of the insulator 5a. The insulator 5b is, for example, an Al2O3 film (aluminum oxide film). The barrier metal layer 6a is, for example, a TiN film (titanium nitride film). The electrode material layer 6b is, for example, a W (tungsten) layer.
First, a substrate 11 is prepared, and a stacked film 12 is formed on the substrate 11 (
Subsequently, a plurality of memory holes MH, a plurality of contact holes CH, and a plurality of holes HR are formed in the stacked film 12 by photolithography and reactive ion etching (RIE) (
Each memory hole MH is formed to penetrate through the stacked film 12 in a region R1 on the substrate 11. Each contact hole CH is formed to reach an upper face of the corresponding sacrificial layers 13 in a region R2 on the substrate 11. Each hole HR is formed to penetrate through the stacked film 12 in the region R2 on the substrate 11. The region R1 is used to dispose memory cells of the three-dimensional semiconductor memory, and the region R2 is used to dispose contact plugs for word lines and selection lines.
Subsequently, the insulator 5a, the charge storing layer 4, the tunnel insulator 3, the channel semiconductor layer 2, and the core insulator 1 are sequentially formed on a side face of the stacked film 12 in each memory hole MH (
Subsequently, an insulator 15 is formed in each hole HR, and a sacrificial layer 16 is formed in each contact hole CH (
The insulator 15 is, for example, a SiO2 film. The sacrificial layer 16 is, for example, a SiO2 film. The insulator 15 and the sacrificial layer 16 are formed by, for example, embedding the same SiO2 film in the hole HR and the contact hole CH.
Subsequently, a plurality of slits (not illustrated) are formed in the stacked film 12, and the sacrificial layers 13 are removed from the slits by using liquid chemical such as phosphoric acid aqueous solution (
Subsequently, the insulator 5b, the barrier metal layer 6a, and the electrode material layer 6b are sequentially formed on surfaces of the insulators 5a and 14 in each concave portion C (
Subsequently, the sacrificial layers 16 are removed from the contact holes CH (
Subsequently, an insulator 17 is formed on side and bottom faces of each contact hole CH, the insulators 17 and 5b are removed from the bottom face of each contact hole CH, and a contact plug 18 is formed in each contact hole CH with the insulator 17 interposed therebetween (
In this manner, the semiconductor device of the present embodiment is manufactured (
Processes illustrated in
First, a plurality of slits ST are formed in the stacked film 12 by photolithography and RIE (
Subsequently, the sacrificial layers 13 are removed from the slit ST by using liquid chemical, and a plurality of concave portions C are formed in the stacked film 12 (
Subsequently, an insulator 21 and an interconnect layer 22 are sequentially formed in each slit ST (
Examples of the SiO2 film 32 include the core insulator 1, the tunnel insulator 3, the insulator 5a, the insulators 14, the insulator 15, the sacrificial layer 16, the insulator 17, and the insulator 21. For example, in a case where the SiO2 film 32 is the insulator 15, the underlaying film 31 is the sacrificial layers 13, the insulators 14, and the like (refer to
The SiO2 film 32 of the present embodiment is formed by supplying aminosilane-based gas, other silane-based gas, and an oxidant to the surface of the underlaying film 31 as described later. Accordingly, the high-quality SiO2 film 32 can be formed at low temperature. For example, the SiO2 film 32 with a high density and a low contraction degree can be formed at low temperature. The aminosilane-based gas and the other silane-based gas are examples of the first silane-based gas and the second silane-based gas, respectively.
Such a SiO2 film 32 is desirably used at, for example, a portion where high rigidity is required. For example, each above-described columnar portion having an elongated shape is desirably formed by using the SiO2 film 32. This is true for each above-described plate portion as well. Accordingly, at least one of the core insulator 1, the tunnel insulator 3, the insulator 5a, the insulator 15, the insulator 17, and the insulator 21 is desirably the SiO2 film 32.
However, in a case where a columnar portion includes the channel semiconductor layer 2, the rigidity of the columnar portion can be increased by using the channel semiconductor layer 2. Similarly, in a case where a columnar portion includes the contact plug 18, the rigidity of the columnar portion can be increased by using the contact plug 18. However, a columnar portion including the insulator 15 includes no other film than the insulator 15 in
Since the SiO2 film 32 of the present embodiment is formed by using the aminosilane-based gas, the other silane-based gas, and the oxidant, the SiO2 film 32 is formed to include nitrogen as impurity. The SiO2 film 32 is formed to include nitrogen, for example, at a nitrogen concentration lower than 1.0×1020 atoms/cm3. The nitrogen concentration in the SiO2 film 32 is, for example, equal to or higher than 1.0×1018 atoms/cm3 and lower than 1.0×1020 atoms/cm3.
To adjust the shape of each memory hole MH, the SiO2 film 32 may be formed in the memory hole MH before formation of the insulator 5a. The SiO2 film 32 in this case may be a portion of the insulator 5a.
The first embodiment is compared to a comparative example with reference to
First, the substrate 11 (refer to
Subsequently, an oxidant is supplied into the chamber (step S3). As a result, the oxidant is supplied to the surface of the underlaying film 31. The oxidant oxidizes the silicon adsorbed onto the surface of the underlaying film 31, and as a result, oxygen atoms in molecules included in the oxidant bond with silicon atoms adsorbed onto the surface of the underlaying film 31. In
Thereafter, the processing including steps S1, S2, S3, and S4 is repeated a plurality of cycles in the order of S1, S2, S3, and S4 as illustrated in
In the present comparative example, to increase the density of the SiO2 film 32 and lower the contraction degree of the SiO2 film 32, a large number of Si—Si bonds need to be formed in the SiO2 film 32 at steps S1 to S4. To form a large number of Si—Si bonds in the SiO2 film 32, the SiO2 film 32 need to be formed at high temperature, and the SiO2 film 32 is desirably formed, for example, at a temperature higher than the thermal decomposition temperature (self-decomposition temperature) of aminosilane. However, formation of the SiO2 film 32 at high temperature has constraints in terms of temperature and time from a viewpoint of thermal budget in some cases. Furthermore, film thickness uniformity and coverage of the SiO2 film 32 potentially degrade in a case where the SiO2 film 32 is formed at high temperature.
First, the substrate 11 (refer to
The aminosilane-based gas used at step S1 includes, for example, BDEAS (bis(diethylamino) silane), TrisDMAS (Tris(dimethylamino) silane), DIPAS (di(isopropylamino) silane), or BTBAS (Bis(tert-butylamino) silane). The aminosilane-based gas listed above is an example and may be other aminosilane-based gas. The aminosilane-based gas used at step S1 is an example of the first silane-based gas.
Subsequently, silane-based gas is supplied into the chamber (step S11). As a result, the silane-based gas is supplied to the surface of the underlaying film 31. The silane-based gas is different from the aminosilane-based gas used at step S1 and has a thermal decomposition temperature lower than the thermal decomposition temperature of the aminosilane-based gas. The silane-based gas used at step S11 is, for example, silane-based gas (non-aminosilane-based gas) that is not aminosilane-based gas, and/or inorganic silane-based gas including no carbon. At step S11, a silicon atom in a silane molecule bonds with a silicon atom adsorbed onto the surface of the underlaying film 31, and as a result, a silicon atom separated from the silane molecule is adsorbed onto the surface of the underlaying film 31. In
The silane-based gas used at step S11 includes, for example, SiH4 (monosilane), Si2H6 (disilane), DCS (dichlorosilane), TCS (trichlorosilane), or HCD (hexachlorodisilane). The silane-based gas listed above is an example and may be other silane-based gas. The silane-based gas used at step S11 is an example of the second silane-based gas.
Subsequently, an oxidant is supplied into the chamber (step S3). As a result, the oxidant is supplied to the surface of the underlaying film 31. The oxidant oxidizes silicon adsorbed onto the surface of the underlaying film 31, and as a result, an oxygen atom in a molecule included in the oxidant bonds with a silicon atom adsorbed onto the surface of the underlaying film 31. In
The oxidant used at step S3 includes, for example, O3 gas, H2O gas, or O2 gas (O represents oxygen and H represents hydrogen). The oxidant used at step S3 may be other gas including oxygen.
Thereafter, the processing including steps S1, S2, S11, S12, S3, and S4 is repeated a plurality of cycles in the order of S1, S2, S11, S12, S3, and S4 as illustrated in
Further details of the method of manufacturing the semiconductor device of the present embodiment will be described below with reference to
Before step S1 is started, OH groups are present on the surface of the underlaying film 31. Typically, aminosilane-based gas is likely to react with OH groups. For this reason, at step S1, aminosilane-based gas is supplied to the surface of the underlaying film 31 so that silicon can be easily adsorbed onto the surface of the underlaying film 31. Before step S11 is started, the surface of the underlaying film 31 is hydrophobized by silicon atoms attributable to step S1. In this case, even non-aminosilane-based gas is likely to react with silicon on the surface of the underlaying film 31. For this reason, at step S11, non-aminosilane-based gas is supplied to the surface of the underlaying film 31 so that Si—Si bonds can be formed on the surface of the underlaying film 31, and accordingly, silicon can be adsorbed onto the surface of the underlaying film 31.
According to the present embodiment, since a larger number of Si—Si bonds are formed at step S11, it is possible to increase the density of the SiO2 film 32 and lower the contraction degree of the SiO2 film 32 even when the SiO2 film 32 is formed at low temperature. Moreover, according to the present embodiment, since the silane-based gas supplied at step S11 is inexpensive as compared to the aminosilane-based gas used at step S1, it is possible to reduce the total cost of gas used to form the SiO2 film 32. Since non-aminosilane-based gas is typically inexpensive as compared to aminosilane-based gas, non-aminosilane-based gas is desirably used at step S11 from this viewpoint. In a case where carbon atoms potentially adversely affect the SiO2 film 32, inorganic silane-based gas is desirably used at step S11.
The above-described Si—Si bonds are likely to be formed when the processing at step S11 is performed at a temperature higher than the thermal decomposition temperature of the silane-based gas used at step S11. For this reason, the thermal decomposition temperature of the silane-based gas used at step S11 is desirably low to form the SiO2 film 32 at low temperature. Accordingly, in the present embodiment, the thermal decomposition temperature of the silane-based gas used at step S11 is lower than the thermal decomposition temperature of the aminosilane-based gas used at step S1. As a result, in formation of Si—Si bonds by using the silane-based gas at step S11, a large number of Si—Si bonds can be easily formed at low temperature as compared to formation of Si—Si bonds by using the aminosilane-based gas. In the present embodiment, the processing at steps S1, S11, and S3 is performed at, for example, 300 to 600° C.
As described above, the SiO2 film 32 of the present embodiment is formed by using aminosilane-based gas, other silane-based gas, an oxidant. As a result, according to the present embodiment, the high-quality SiO2 film 32 can be formed at low temperature. For example, according to the present embodiment, the SiO2 film 32 with a high density and a low contraction degree can be formed at low temperature.
While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel devices and methods described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the devices and methods described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions.
Number | Date | Country | Kind |
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2022-201592 | Dec 2022 | JP | national |