Patent Application
20070200149
This invention concerns semiconductor devices, especially devices comprising gate electrode stacks, and a method of production.
Semiconductor devices with integrated transistor structures are provided with gate electrodes and conductor tracks for an electric connection of the gate electrode. The gate electrode and conductor track are preferably structured as a gate stack, which usually comprises several electrically conductive layers. The gate electrode is arranged above the channel region of the transistor and separated from the semiconductor material by a thin gate dielectric. The gate electrode can be formed of a polysilicon layer, which is electrically conductively doped. Since the track resistance of the polysilicon is too large, the polysilicon layer is doubled with a metal or metal silicide layer. The metal provides a better electric conductivity.
The gate electrode stack is structured by means of a hardmask. A photolithography technique using a structured resist layer is applied to structure a layer of a suitable material, for instance nitride, to form the hardmask. The resist is removed after the hardmask has been structured. The hardmask is cleaned with a cleaning agent. In some cases, it cannot be avoided that the hardmask is superficially damaged by the cleaning agent, which solves small particles out of the hardmask without completely removing them. Although the material of the hardmask is not actually attacked and dissolved, the application of the cleaning agent may nevertheless lead to tiny deposits of the hardmask material on other surfaces of the device, where they form micromasks that affect further processing steps unfavorably. If an even stronger cleaning agent, which dissolves the particles that have come out of the hardmask, especially nitride particles, is applied, such a cleaning agent may also attack the metal layer, which is laid bare in the openings of the hardmask.
In one aspect, this invention provides a way to avoid undesired deposits that are produced when a hardmask is treated with a cleaning agent.
In a further aspect, this invention provides a device structure that includes a metal being structured by a hardmask and that allows for a cleaning of the hardmask with a cleaning agent that attacks the metal.
In still a further aspect, this invention provides the device structure as a gate electrode stack.
In another aspect, this invention provides a method for producing a stack of layers including a metal, which is structured by means of a hardmask, by which the hardmask is cleaned without producing undesired deposits.
In a further aspect, this invention provides a method for producing a gate electrode stack with a metal layer that is structured by a hardmask, by which the hardmask can be cleaned with a cleaning agent that attacks the metal.
In a first embodiment, a semiconductor device includes a structured layer sequence with lateral boundaries including at least a metal layer and a cover layer above the metal layer. The material of the cover layer is different from the metal. In preferred embodiments, a top layer formed of a material that is suitable for hardmasks is arranged on the cover layer. The layer sequence can be provided for a gate electrode stack and comprise further layers. The typical embodiment of this device comprises a transistor structure, a gate dielectric, a gate layer, preferably of doped polysilicon, a metal layer, a cover layer, and a hardmask layer forming the top layer. The metal layer can be tungsten, for example, the cover layer can be polysilicon, and the top layer can be nitride. There are preferably thin liners on the upper and lower boundary surfaces of the metal layer.
The production method comprises a cleaning step that makes use of a cleaning agent that also removes deposits of the material of the top layer, which can especially be nitride. The cleaning agent can especially be an aqueous solution of H2O2 and NH3. This cleaning agent is appropriate to remove the rest of the photoresist and small particles of nitride. It attacks the metal but does not attack the metal layer, because the metal layer is protected by the cover layer. This method enables the application of cleaning agents that are especially suitable to clean hardmasks, especially nitride hardmasks, but would attack the metal layer of the gate electrode stack.
These and other features and advantages of the invention will become apparent from the following brief description of the drawings, detailed description and appended claims and drawings.
For a more complete understanding of the present invention, and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:
The following list of reference symbols can be used in conjunction with the figures:
The making and using of the presently preferred embodiments are discussed in detail below. It should be appreciated, however, that the present invention provides many applicable inventive concepts that can be embodied in a wide variety of specific contexts. The specific embodiments discussed are merely illustrative of specific ways to make and use the invention, and do not limit the scope of the invention.
A further liner 6, not present in usual gate stacks, is applied on the upper boundary surface of the metal layer 5. The liner 6 separates the metal from the material of a cover layer 7, which is preferably polysilicon. The cover layer 7 can be electrically conductive or not. The top layer 8, which can be silicon nitride, is provided for a hardmask and can be structured by a photolithography step using a resist mask.
After the hardmask has been structured from the top layer 8, the resist mask is preferably removed. This can be done by means of a plasma, by which the resist is transformed into ashes. The ashes are removed by a subsequent cleaning step using a wet chemical solution. This is usually done with a cleaning agent comprising H2SO4, O3 and H2O2. This solution also solves small particles out of the top layer 8, but does not totally dissolve them. The particles settle on various locations on the substrate and form tiny masks, which affect the further process steps.
The structure shown in
The upper liner 6 is optional, but is preferred if the cover layer 7 is polysilicon. In this case, the liner 6 inhibits a silicidation of the metal layer in further processing steps at elevated temperature. If the metal layer 5 is tungsten, the liner can comprise WN and Ti, as one example.
Although the present invention and its advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims. Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, methods and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the disclosure of the present invention, processes, machines, manufacture, compositions of matter, methods, or steps, presently existing or later to be developed, that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized according to the present invention. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, methods, or steps.
