Semiconductor device fabrication method and polishing apparatus

Abstract

A method for fabricating a semiconductor device includes forming a barrier metal film on a substrate with an opening defined therein, forming a copper-containing film on said barrier metal film after having formed said barrier metal film on a surface of said substrate and an inner wall of said opening, and polishing said copper-containing film and said barrier metal film while applying a voltage to said substrate in a state that said copper-containing film and said barrier metal film are exposed.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a flow chart which represents main parts of a fabrication method of a semiconductor device in an embodiment 1.

FIGS. 2A to 2C are process cross-sectional diagrams representing processes to be implemented in a way corresponding to the flow chart of FIG. 1.

FIGS. 3A to 3C are process cross-section diagrams representing processes to be implemented in a way corresponding to the flow chart of FIG. 1.

FIGS. 4A to 4C are process cross-section diagrams representing processes to be implemented in a way corresponding to the flow chart of FIG. 1.

FIG. 5 is a conceptual diagram showing a cross-sectional structure of CMP apparatus.

FIG. 6 is a diagram showing polarization curves of Cu, Ta and others.

FIG. 7 is a diagram showing polarization curves of Cu and Ta or else in the case of using another slurry.

FIG. 8 is a diagram showing Cu's potential-pH diagram.

FIG. 9 is a conceptual diagram for explanation of the appearance of a case where Cu damascene wiring lines are formed without electric potential control.

FIG. 10 is a conceptual diagram for explanation of the appearance of a case where Cu damascene wires are formed by CMP processing while at the same time performing potential control in the embodiment 1.

FIG. 11 is a diagram showing a surface SEM photograph in case Cu damascene wires are formed with the lack of the potential control.

FIG. 12 is a diagram showing a surface SEM photograph in case Cu damascene wires are formed by CMP processing while performing the potential control in the embodiment 1.

Claims

1. A method for fabricating a semiconductor device, comprising: forming a barrier metal film on a substrate with an opening defined therein;forming a copper-containing film on said barrier metal film after having formed said barrier metal film on a surface of said substrate and an inner wall of said opening; andpolishing said copper-containing film and said barrier metal film while applying a voltage to said substrate in a state that said copper-containing film and said barrier metal film are exposed.

2. The method according to claim 1, wherein said voltage is applied in a way such that a potential of a hybrid system of said copper-containing film and said barrier metal film becomes 0.6 to 1.0 volt versus Ag/AgCl.

3. The method according to claim 1, wherein either one of tantalum (Ta)-containing material and titanium (Ti)-containing material is used as a material of said barrier metal film.

4. The method according to claim 1, further comprising: prior to applying the voltage to said substrate, polishing said copper-containing film as formed on said barrier metal film until said barrier metal film is exposed.

5. The method according to claim 4, further comprising: after having polished said copper-containing film until said barrier metal film is exposed, measuring a potential of a hybrid system of said copper-containing film and said barrier metal film.

6. The method according to claim 5, wherein based on a result of the measurement of the potential of said hybrid system, said voltage is applied to the substrate to thereby control the potential of said hybrid system.

7. The method according to claim 6, wherein said copper-containing film and said barrier metal film thus exposed are polished together in a state that the potential of said hybrid system is controlled.

8. The method according to claim 1, wherein said voltage is applied from a side face of said substrate.

9. The method according to claim 1, wherein said voltage is applied from a back surface of said substrate.

10. The method according to claim 1, wherein a polishing pad having electrical conductivity is used to apply the voltage to said substrate through said polishing pad.

11. The method according to claim 1, wherein a slurry is used for said polishing, and wherein said method further comprises: measuring in advance a natural potential of a material piece of said barrier metal film in said slurry; andbased on the measured natural potential of said material piece, setting said voltage to be applied when polishing said copper-containing film and said barrier metal film exposed.

12. The method according to claim 11, further comprising: in case said natural potential is less than 0.6 V vs. Ag/AgCl, operating an application voltage in such a way that said natural potential becomes 0.6 to 1.0 V vs. Ag/AgCl; andapplying a voltage similar to said application voltage being operated when polishing said copper-containing film and said barrier metal film thus exposed.

13. A method for fabricating a semiconductor device comprising: measuring a potential of a hybrid system of a copper-containing film and a barrier metal film when a slurry is supplied to a substrate with said copper-containing film and said barrier metal film being exposed at a surface of said substrate; andbased on a result of said measuring, using said slurry to polish said copper-containing film and said barrier metal film while applying a voltage to said substrate.

14. The method according to claim 13, wherein said voltage is applied so that a potential of said hybrid system becomes 0.6 to 1.0 V vs. Ag/AgCl.

15. The method according to claim 13, wherein any one of tantalum (Ta)-containing material and titanium (Ti)-containing material is used as a material of said barrier metal film.

16. A polishing apparatus comprising: a polishing unit operative to polish a substrate surface by use of a chemical liquid; anda potential measurement unit configured to measure a potential of said substrate surface with said chemical liquid being as an electrolytic material.

17. The apparatus according to claim 16, wherein said potential measurement unit has a working electrode, a reference electrode and an counter electrode.

18. The apparatus according to claim 17, wherein said potential is measured by causing said working electrode to be in contact with said substrate.

19. The apparatus according to claim 18, wherein said potential is measured by letting said reference electrode and said counter electrode be put in said chemical liquid.

20. The apparatus according to claim 19, further comprising: a reservoir which stores therein said chemical liquid as used for the polishing and which permits said reference electrode and said counter electrode to be put together in said chemical liquid being stored.