The present disclosure generally relates to the field of electronics. More particularly, an embodiment of the invention relates to reduction of roughness on the surface of a semiconductor device.
The magnitude of sidewall roughness in semiconductor devices has not been scaling downward as quickly as feature dimensions have. As a result, the magnitude of this roughness is becoming a bigger component of the critical dimension, leading to variability in transistor off-state leakages and in line and contact resistances.
Some current implementations may use photoresist and lithography optimization to reduce roughness. But, such approaches can become more difficult as devices become smaller.
The detailed description is provided with reference to the accompanying figures. In the figures, the left-most digit(s) of a reference number identifies the figure in which the reference number first appears. The use of the same reference numbers in different figures indicates similar or identical items.
a and 1b illustrate side views of relative roughness of semiconductor surfaces after an erosion process and after adding energy to the surface, respectively, in accordance with some embodiments.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of various embodiments. However, various embodiments of the invention may be practiced without the specific details. In other instances, well-known methods, procedures, components, and circuits have not been described in detail so as not to obscure the particular embodiments of the invention. Further, various aspects of embodiments of the invention may be performed using various means, such as integrated semiconductor circuits (“hardware”), computer-readable instructions organized into one or more programs (“software”), or some combination of hardware and software.
Some of the embodiments discussed herein may enable reduction of surface roughness on semiconductor devices, such as roughness on sidewalls of lines, trenches, vias, etc. In an embodiment, a low-mass, super-thermal atomic bombardment may be utilized for edge roughness reduction. In one embodiment, the roughness achieved by photoresist optimization may be further reduced by techniques discussed herein. Some of the embodiments may be applied subsequent to an etch process. For example, in one embodiment, roughness of roughened surfaces may be reduced by using a molecular particle source applied after resist development or final etch. Moreover, the molecular particle source may be applied intermittently, e.g., in a pulsing scheme, during the etch process.
a and 1b illustrate side views of relative roughness of semiconductor surfaces after an erosion process (e.g., etch or photoresist develop which may roughen a surface) and after adding energy to the surface, respectively, in accordance with some embodiments. As shown in
In an embodiment, a moderate energy (e.g., less than or equal to about 1000 eV), low mass (e.g., less than about 12 amu) ionic/atomic/molecular flux onto a roughened surface (e.g., surface 104) may smooth that surface considerably (e.g., resulting in surface 106). In one embodiment, the energy may be sufficient to increase surface viscosity (e.g., about 1-1000 eV) with mass low enough not to transfer momentum and induce sputtering reaction. Hydrogen and Helium may be the utilized species from atomic mass standpoint in some embodiments. Due to lack of chemical reactivity, Helium may be used in more implementations. Neon is also possible in some implementations. The high energy atomic particles may be generated through a variety of techniques such as plasma, ion beam, or energetic neutral beam.
In some embodiments, localized energy may be introduced onto surface of patterned structures fabricated during semiconductor manufacturing. The localized energy added to the surface may increase surface diffusion and lower surface viscosity such that a more thermodynamically stable surface results (such as the smooth surface 106 of
In an embodiment, the momentum transfer from the impacting particles to the atomic particles in the material may be sufficiently low so that ejection of atoms from the surface does not occur, a phenomenon known as “sputtering.” Sputtering might induce surface roughening effect, over and above the surface smoothing effects of increased surface diffusion. This may be best achieved with very low mass particles, such as Hydrogen or Helium. Material may also be removed by chemical etching (which is to be avoided in an embodiment), so Helium may be used over Hydrogen due to Helium being inert. The grazing incidence may provide localization of bombarding energy at the surface, see, e.g.,
In some embodiments, the introduction of energetic He ions accelerated by 100 W of RF bias may smoothen the photoresist and SiO2 layers. In an embodiment, He ion treatment may be performed after structure is etched. In another embodiment, the smoothing process may be performed applied intermittently, e.g., in a pulsing scheme, during the etch process as structure is being etched.
Furthermore, in some embodiments, the beam source 503 may be one or more of a plasma beam source, an ion beam source, or an energetic neutral beam source for generating atomic particles with one or more of the following characteristics: (a) accelerating source to generate particles of sufficient energy (1-1000 eV); (b) sufficiently low mass ions (e.g., less than about 12 amu) to reduce or eliminate sputter erosion; (c) chemically un-reactive species, e.g., to reduce material removal; (d) with energy and mass below sputtering threshold of material; (e) with energy and mass sufficient to drive surface diffusion or enhance surface viscosity; (f) no or limited chemical or physical etching of material; (g) species at near grazing incidence of surface, e.g., to focus energy at the surface; and/or (h) species perpendicular to a wave vector associated with the surface roughness.
Reference in the specification to “one embodiment” or “an embodiment” means that a particular feature, structure, and/or characteristic described in connection with the embodiment may be included in at least an implementation. The appearances of the phrase “in one embodiment” in various places in the specification may or may not be all referring to the same embodiment.
Also, in the description and claims, the terms “coupled” and “connected,” along with their derivatives, may be used. In some embodiments of the invention, “connected” may be used to indicate that two or more elements are in direct physical or electrical contact with each other. “Coupled” may mean that two or more elements are in direct physical or electrical contact. However, “coupled” may also mean that two or more elements may not be in direct contact with each other, but may still cooperate or interact with each other. Additionally, for the purposes of this disclosure, reference to “logic” shall mean either hardware, software, or some combination thereof.
Thus, although embodiments of the invention have been described in language specific to structural features and/or methodological acts, it is to be understood that claimed subject matter may not be limited to the specific features or acts described. Rather, the specific features and acts are disclosed as sample forms of implementing the claimed subject matter.