Patent Application
20220223511
The present disclosure relates to a semiconductor device.
It has been proposed to provide a protection mechanism for protecting a semiconductor chip, or the like, by melting and being cut when an overcurrent flows, for example, at a semiconductor device to be used for controlling a large current (see, for example, JP 2007-123644 A).
In related art, a material of the protection mechanism is nickel or aluminum, which is different from a material of a circuit pattern of copper. Thus, there is a possibility that the different metals may deform differently in a temperature cycle upon driving of devices. This causes a problem of degradation of reliability due to deterioration of a solder joint portion of the protection mechanism and the circuit pattern.
The present disclosure has been made to solve the problem as described above, and an object of the present disclosure is to provide a semiconductor device which is capable of securing reliability.
A semiconductor device according to the present disclosure includes: an insulating substrate including a circuit pattern; a semiconductor chip mounted on the insulating substrate and connected to the circuit pattern; and an overcurrent interruption mechanism constituted with a same material as material of the circuit pattern, connected to the circuit pattern in series, wherein when an overcurrent flows, the overcurrent interruption mechanism melts and is cut.
In the present disclosure, the overcurrent interruption mechanism is constituted with the same material as the material of the circuit pattern. Thus, both components deform in a similar manner in a temperature cycle upon driving of devices, and joined portions of the overcurrent interruption mechanism and the circuit pattern do not deteriorate, so that reliability can be secured.
Other and further objects, features and advantages of the invention will appear more fully from the following description.
A semiconductor device according to the embodiments of the present disclosure will be described with reference to the drawings. The same components will be denoted by the same symbols, and the repeated description thereof may be omitted.
A semiconductor chip 10 is mounted on the insulating substrate 3. A lower electrode of the semiconductor chip 10 is connected to the circuit pattern 6 with solder 11. An upper electrode of the semiconductor chip 10 is connected to an electrode 12 of the case 2 through a wire 13.
One end of the circuit pattern 6 is connected to one end of the circuit pattern 7 with a wire 14. One end of an overcurrent interruption mechanism 15 is connected to the other end of the circuit pattern 7 with solder 16, and the other end of the overcurrent interruption mechanism 15 is connected to one end of the circuit pattern 8 with solder 17. By this means, the overcurrent interruption mechanism 15 is connected to the circuit patterns 6, 7 and 8 in series. The overcurrent interruption mechanism 15 is constituted with the same material as the material of the circuit patterns 6, 7 and 8.
The other end of the circuit pattern 8 is connected to an electrode 18 of the case 2 with a wire 19. A sealing material 20 fills inside of the case 2 and seals the insulating substrate 3, the semiconductor chip 10, and the like. An upper part of the case 2 is covered with a lid 21.
When an overcurrent flows, the constricted portion 24 of the overcurrent interruption mechanism 15 melts and is cut. This prevents the overcurrent from continuing to flow to the circuit patterns 6, 7 and 8 and can minimize influence of breakage of the semiconductor device on surroundings. For example, the overcurrent interruption mechanism 15 cuts off an overcurrent equal to or higher than 50 kA in an article whose rated current value which is a current value during normal operation is equivalent to 200 A.
Cross-sectional areas S of the first and second conductor portions 22 and 23 are larger than a cross-sectional area S′ of the constricted portion 24 (S >S′). Lengths L of the first and second conductor portions 22 and 23 are longer than a length L′ of the constricted portion 24 (L>L′). This can prevent increase of a temperature of the constricted portion 24 during normal operation such as upon motor driving. Further, the overcurrent interruption mechanism 15 can be incorporated without raising an electrode temperature. Further, by shortening the length L′ of the constricted portion 24, it is possible to prevent degradation of circuit inductance and prevent increase of the temperature of the constricted portion 24 during normal operation. Further, thicknesses of the first and second conductor portions 22 and 23 are preferably equal to or greater than 0.5 mm. This can achieve the overcurrent interruption mechanism 15 without impairing energization capability during normal operation.
As described above, in the present embodiment, the overcurrent interruption mechanism 15 is constituted with the same material as the material of the circuit patterns 6, 7 and 8. Thus, both components deform in a similar manner in a temperature cycle upon driving of devices, and joined portions of the overcurrent interruption mechanism 15 and the circuit patterns 7 and 8 do not deteriorate, so that reliability can be secured.
Further, the overcurrent interruption mechanism 15 is connected to the circuit patterns 7 and 8. Thus, heat by self-heating of the overcurrent interruption mechanism 15 is dissipated on the base plate 1 side through the circuit patterns 7 and 8. This can prevent increase of a temperature during normal operation.
However, if the constricted portion 24 is exposed to an outermost peripheral portion of the device, there is a concern that peripheral parts may be damaged upon current interruption. Thus, in the present embodiment, the constricted portion 24 exposed from the sealing material 20 is covered with the lid 21. This can safely cut off a current without damaging peripheral parts upon current interruption.
Note that the constricted portion 24 can be exposed from the sealing material 20 by covering the constricted portion 24 with a mask which can be released from a mold after a resin is cured instead of providing the chassis 27. Alternatively, a height of the sealing material 20 may be made equal to or lower than the constricted portion 24.
Use of a material which has an effect of suppressing discharge upon interruption as the insulating material 28 can improve an interruption effect. Further, use of a material having low viscosity and high fluidity as the insulating material 28 can improve ease of assembly of the semiconductor device. The insulating material 28 is, for example, silicon gel and may be a low-viscosity epoxy material.
The semiconductor chip 10 is not limited to a chip formed of silicon, but instead may be formed of a wide-bandgap semiconductor having a bandgap wider than that of silicon. The wide-bandgap semiconductor is, for example, a silicon carbide, a gallium-nitride-based material, or diamond. A semiconductor chip formed of such a wide-bandgap semiconductor has a high voltage resistance and a high allowable current density, and thus can be miniaturized. The use of such a miniaturized semiconductor chip enables the miniaturization and high integration of the semiconductor device in which the semiconductor chip is incorporated. Further, since the semiconductor chip has a high heat resistance, a radiation fin of a heatsink can be miniaturized and a water-cooled part can be air-cooled, which leads to further miniaturization of the semiconductor device. Further, since the semiconductor chip has a low power loss and a high efficiency, a highly efficient semiconductor device can be achieved.
Obviously many modifications and variations of the present disclosure are possible in the light of the above teachings. It is therefore to be understood that within the scope of the appended claims the invention may be practiced otherwise than as specifically described.
The entire disclosure of Japanese Patent Application No. 2021-003999, filed on Jan. 14, 2021 including specification, claims, drawings and summary, on which the convention priority of the present application is based, is incorporated herein by reference in its entirety.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2021-003999 | Jan 2021 | JP | national |
