Semiconductor device

Abstract

A semiconductor device, includes: a semiconductor layer, arranged, via an insulation layer, on a region of a part of a semiconductor substrate; a first circuit block formed on the semiconductor layer; and a second and a third circuit blocks formed on the semiconductor substrate, isolated from each other by the first circuit block.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

The invention will be described with reference to the accompanying drawings, wherein like numbers reference like elements.

FIG. 1 is a sectional drawing illustrating a configuration example of a semiconductor device according to a first embodiment.

FIGS. 2A to 2E are top view drawings illustrating configuration examples of a semiconductor device according to a second embodiment.

FIG. 3 is a sectional drawing illustrating a configuration example of a semiconductor device according to a third embodiment.

FIG. 4 is a sectional drawing illustrating a configuration example of a semiconductor device according to a forth embodiment.

FIG. 5 is a sectional drawing illustrating a configuration example of a semiconductor device according to a fifth embodiment.

FIG. 6 is a top view drawing illustrating a configuration example of a semiconductor device according to a sixth embodiment.

FIG. 7 is a top view drawing illustrating a configuration example of a semiconductor device according to a seventh embodiment.

FIG. 8 is a top view drawing illustrating a configuration example of a semiconductor device according to an eighth embodiment.

Claims

1. A semiconductor device, comprising: a semiconductor layer, arranged, via an insulation layer, on a region of a part of a semiconductor substrate;a first circuit block formed on the semiconductor layer; anda second and a third circuit blocks formed on the semiconductor substrate, isolated from each other by the first circuit block.

2. The semiconductor device according to claim 1, wherein the first circuit block is arranged between the second circuit block and the third circuit block.

3. The semiconductor device according to claim 2, wherein either the second circuit block or the third circuit block is arranged to contact at least one side of the first circuit block.

4. The semiconductor device according to claim 1, wherein the semiconductor substrate has the resistivity of more than 500 Ωcm.

5. The semiconductor device according to claim 1, wherein the first circuit block is a digital circuit, and the second circuit block and the third circuit block are analog circuits.

6. The semiconductor device according to claim 1, wherein the first circuit block is a low-voltage driver circuit, and the second circuit block and the third circuit block are high-voltage driver circuits.

7. A semiconductor device, comprising: a semiconductor layer, arranged, via an insulation layer, on a region of a part of a semiconductor substrate;a first circuit block formed on the semiconductor layer; anda plurality of circuit blocks arranged around the first circuit block which are formed on the semiconductor substrate, the plurality of circuit blocks selected from the group including: a DRAM;a sensor interface circuit;a nonvolatile memory;a power circuit;a high-voltage driver;a radio frequency circuit; andan oscillation circuit;a power circuita driver; anda digital-to-analog converter.

8. The semiconductor device according to claim 7, wherein at least one circuit block of the plurality of circuit blocks is provided with a silicon-on-insulator structure arranged on at least one side of the periphery of the one circuit block, while contacting another circuit block of the plurality of circuit blocks.

9. The semiconductor device according to claim 7, the first block being a microcontroller core.

10. The semiconductor device according to claim 7, the first block being an SRAM.

11. The semiconductor device according to claim 7, the first block being a real-time clock circuit and a circuit operative on stand-by.

12. A semiconductor device comprising: a silicon-on-insulator region in which a semiconductor layer is deposited on an insulation layer;a bulk region having only a substrate as an underlying layer; anda first dopant diffusion layer for potential fixing, deposited on the semiconductor substrate, between a circuit element formed in the silicon-on-insulator region and a circuit element formed in the bulk region;wherein the silicon-on-insulator region and the bulk region are on the same semiconductor substrate.

13. The semiconductor device according to claim 12, further comprising: the silicon-on-insulator region including a first silicon-on-insulator region and a second silicon-on-insulator region which is thicker than the first silicon-on-insulator region; anda second dopant diffusion layer for potential fixing, formed on the semiconductor layer, between a circuit element formed in the first silicon-on-insulator region and a circuit element formed in the second silicon-on-insulator region.

14. The semiconductor device according to claim 12, further comprising a third dopant diffusion layer for potential fixing, on the semiconductor substrate under the insulation layer in the silicon-on-insulator region.

15. The semiconductor device according to claim 14, wherein: the first dopant diffusion layer and the third dopant diffusion layer both have a first conductivity type; andthe first dopant diffusion layer has a higher dopant concentration of the first conductivity type than the third dopant diffusion layer.

16. The semiconductor device according to claim 14, wherein: the second dopant diffusion layer and the third dopant diffusion layer are both of the first conductivity type; andthe second dopant diffusion layer has a higher dopant concentration of the first conductivity type than the third dopant diffusion layer.

17. The semiconductor device according to claim 12, wherein the semiconductor substrate has the resistivity of more than 500 Ωcm.

18. A semiconductor device, comprising: a semiconductor layer, arranged, via an insulation layer, on a region of a part of a semiconductor substrate;a first circuit block formed on the semiconductor layer;a second circuit block formed on the semiconductor substrate in the perimeter of the prescribed regions; anda dopant diffusion layer for potential fixing, formed on the semiconductor substrate, between the first circuit block and the second circuit block.

19. The semiconductor device according to claim 18, the first circuit block including a first silicon-on-insulator region in which a first semiconductor layer is deposited on an insulation layer; andthe second circuit block including a second silicon-on-insulator region in which a first semiconductor layer is deposited on an insulation layer

20. The semiconductor device according to claim 18, the first circuit block being a microcontroller core, and the second circuit block which has a plurality of circuit, the second circuit block including: a memory circuit;a power circuit;an oscillation circuit; andan analog-to-digital converter

21. The semiconductor device according to claim 18, the first circuit block being a microcontroller core, and the second circuit block having a first peripheral circuit block which has a plurality of circuit and a second peripheral circuit block, the first peripheral circuit block including: a sensor interface circuit;a radio frequency circuit;a liquid crystal controller; anda power circuit;the second peripheral circuit block formed on the semiconductor substrate:a silicon-on-insulator structure arranged on at least one side of the periphery of the first peripheral circuit block, while being adjacent to the second peripheral circuit block.

22. The semiconductor device according to claim 18, the first circuit block being an SRAM, and the second circuit block which has a plurality of circuit, the second circuit block including: a power circuit;a driver;an input-output circuit; anda digital-to-analog converter.