Patent Application
20240429056
This application claims the benefit under 35 U.S.C. § 119 (a) of European Patent Application No. 23181138.1 filed Jun. 23, 2023, the contents of which are incorporated by reference herein in their entirety.
The present invention provides a manufacturing intermediate for a semiconductor die package and a method of manufacturing the same. The present invention further provides a semiconductor die package comprising the manufacturing intermediate and a method of manufacturing the same.
Semiconductors are devices that are used within electronic circuitry. An individual semiconductor device is known as a die. To enable semiconductor dies to integrate within electronic circuitry, semiconductors dies are typically provided in a housing, known as a die package. Such die packages typically encapsulate the semiconductor die within a block of insulating material, such as plastic.
Semiconductor dies manufactured are from a semiconductor wafer. The wafer is typically a circular disc that is around 200 mm in diameter (although larger and smaller wafers are possible). The semiconductor circuitry is fabricated onto the wafer using known processes. Once fabrication is complete, the wafer can be broken down into individual dies. Each die is typically of the order of around 6 mm by around 6 mm in size, although larger and smaller dies are of course possible.
In order to provide sufficient mechanical strength to the wafer during etching, the wafer is typically provided with a thickness of around 600 μm to around 750 μm. However, during use, the semiconductor dies will exhibit an internal electrical resistance that is proportional to its thickness. Typically, electrical resistance will increase by around 10% for each 25 μm of die thickness. Therefore, it is preferable for the die to be manufactured so that it is as thin as possible.
It is known to thin the dies by grinding the rear surface of the wafer before the wafer is divided into individual dies. Typically, the wafer is thinned to a thickness of less than around 100 μm, or potentially as low as around 50 μm or around 25 μm. However, when the wafer is thinned to this extent it loses mechanical strength. Internal material stresses and outside environmental factors may therefore cause the wafer to warp (i.e. bow upwards or downwards). In some circumstances, this can lead to crack formation and material failure rendering the wafer unusable.
In order to mitigate this, it is known to provide the wafer with a so-called “Taiko ring”. To form a Taiko ring, the radial dimension of the wafer is sized so that it is larger than the etching zone. Only the central portion of the wafer is thinned by grinding, leaving an annular ring of non-thinned material surrounding the thinned portion of the wafer. However, the central portion of the wafer remains extremely fragile. Therefore, whilst Taiko rings are able to substantially reduce wafer warpage and breakage, they do not eliminate such problems entirely.
Moreover, regardless of whether or not a Taiko ring is used, once the individual dies are cut from the wafer, each die is fragile and difficult to handle. In particular, the mechanical behaviour of an individual die is somewhat akin to a thin piece of paper, and is prone to warping, crinkling, folding, tearing etc.
It is an object of the present invention to provide a manufacturing intermediate for a semiconductor die package and a method of manufacturing the same that obviates or mitigates against the problem of warpage and breakage of semiconductor wafers and/or dies.
According to a first aspect of the invention, there is provided a method of manufacturing a manufacturing intermediate for a semiconductor package, the method comprising: providing a die; at least partially encapsulating the die within a moulding compound; and thinning the die.
Because the die is encapsulated within a moulding compound, this provides mechanical strength to the die during thinning. Accordingly, it is possible to thin the die without causing warpage or breakage, as the die remains supported by the moulding compound during the thinning process. Once the thinning process is complete, the die will remain exposed on at least one side, thereby enabling it to be electrically connected to further components of the semiconductor die package.
The step of “thinning” comprises substantially any suitable thinning process. In particular, this may comprise abrading the die. Suitable abrasion processes for this purpose include grinding and/or polishing.
The term “manufacturing intermediate for a semiconductor package” encompasses the assembly of a selection of sub-components of a semiconductor package, including at least a semiconductor die, into a sub-assembly. The sub-assembly may subsequently be assembled with other components to form a complete semiconductor package that can be handled by an operator and installed into an electronic circuit. In particular, the “manufacturing intermediate” may be a unitary structure formed by the encapsulation of the die and any other components within the moulding compound.
The die may define a first surface and a second surface and the method may further comprise: providing a base frame having a first surface and a second surface; attaching the first surface of the die to the first surface of the base frame; wherein the step of at least partially encapsulating the die within a moulding compound comprises at least partially encapsulating the base frame and the die within the moulding compound; and removing the base frame to expose the first surface of the die.
The provision of a base frame enables the die to be supported during the encapsulation process. Therefore, the die is easier to handle. In addition, the base frame may enable other components of the manufacturing intermediate to be mounted in any required positions or orientations before the encapsulation process.
As used throughout this disclosure, a step of “attaching” may comprise any suitable method of attachment. For example, this may comprise adhering, and in particular adhering by soldering.
By exposing the first surface of the die, this enables the die to be thinned. In practice, the steps of removing the base frame and thinning the die may be carried out during the same process. For example, a single abrasion process may be used that entirely abrades the base frame to expose the die and then continues to thin the die.
Removing the base frame may comprise any suitable removal process. For example, this may comprise abrading the base frame by grinding, polishing or the like. Alternatively, the base frame may be frangibly separated from the die, or may be chemically separated from the die.
The step of at least partially encapsulating the base frame and the die within the moulding compound may comprise leaving the second surface of the base frame exposed. Because the second surface of the base frame is exposed, this enables the base frame to be removed more easily. For example, it is possible to directly abrade the base frame using a grinding and/or polishing process.
The step of thinning the die may comprise thinning the die to at most around 100 μm, or preferably at most around 50 μm, or most more preferably at most around 25 μm, or most preferably at most around 15 μm. The thickness of the die is proportional to its internal electrical resistance. It has been found that thinning the die to at most around 100 μm, or preferably at most around 50 μm, or most more preferably at most around 25 μm, or most preferably at most around 15 μm minimises electrical resistance.
Prior to the step of thinning the die, the die may comprise a thickness of at least around 200 150 μm, or preferably at least around 500 μm, or most preferably at least around 600 to 700 μm.
Thinning the die may comprise abrading the die. That is to say, using an abrasion process to reduce the thickness of the die. The abrasion process may comprise any suitable abrasion process, such as for example grinding and/or polishing.
The method may further comprise: providing a clip having a first connection portion and a second connection portion; before the step of at least partially encapsulating the base frame and the die within a moulding compound: attaching the first connection portion of the clip to the second surface of the die; and attaching the second connection portion of the clip to the first surface of the base frame; and during the step of encapsulating the base frame and the die within a moulding compound: encapsulating the clip within the moulding compound. By encapsulating the clip within the moulding compound, the clip also adds mechanical strength to support the die during thinning. In such embodiments, the step of removing the base frame to expose the first surface of the die may further comprise exposing the second connection portion of the clip.
The method may further comprise: thinning the second connection portion of the clip. The second connection portion of the clip may be thinned by the same amount as the first connection portion.
The method may further comprise: providing a first plating to the first surface of the die; and providing a second plating to the second connection portion of the clip.
According to a second aspect of the invention, there is provided a method of manufacturing a semiconductor package comprising: providing a manufacturing intermediate according to the first aspect of the invention; providing a second base frame having a first portion and a second portion; attaching the first portion of the second base frame to the first plating; and attaching the second portion of the second base frame to the second plating. It will be appreciated that the method of manufacturing a semiconductor package according to the second aspect of the invention may comprise any of the steps of the method of manufacturing a manufacturing intermediate according to the first aspect of the invention.
The method may further comprise: at least partially encapsulating the manufacturing intermediate, first plating, second plating, and second base frame within a second moulding compound. The first moulding compound and the second moulding compound may be made from the same material.
According to a third aspect of the invention there is provided a manufacturing intermediate for a semiconductor package, comprising: a die having a first surface and a second surface; and a moulding encapsulating the die; wherein the first surface of the die is exposed.
Because the first surface of the die is exposed, this enables the die to be electrically connected to further components of the semiconductor package, such as for example a base frame defining one or more terminals of the semiconductor package. Additionally, because the die is encapsulated within the moulding, this provides strength to the die to enable it to be handled be an operator. The fact that the first surface of the die is exposed may also enable the dimensions of the die to be adjusted using a thinning process, and/or may be as a result of such a thinning process being carried out upon the die.
The die may comprise a thickness of at most around 100 μm, or preferably at most around 50 μm, or more preferably at most around 25 μm, or most preferably at most around 15 μm.
The manufacturing intermediate may further comprise: a clip having a first connection portion and a second connection portion; wherein: the clip is encapsulated within the moulding compound; the first connection portion is attached to the second surface of the die; and the second connection portion is exposed.
According to a fourth aspect of the invention, there is provided a semiconductor package comprising: the manufacturing intermediate of the second aspect of the invention; a first plating attached to the first surface of the die; a second plating attached to the second connection portion of the clip; a base frame comprising a first portion attached to the first plating and a second portion attached to the second plating; and a second moulding encapsulating the manufacturing intermediate, first plating, second plating, and base frame.
A detailed description of the invention is provided below with reference to the accompanying drawings, in which:
Although the clip 20 is shown as comprising only two connection portions, it will be appreciated that in alternative embodiments the clip 20 may comprise any number of connection portions. In particular, it will be appreciated that the second and subsequent connection portions of the clip 20 may each be configured for attachment to a separate connection terminal that enables the eventual semiconductor package to be integrated into electronic circuitry. For example, the various connection portions of the clip 20 may form part of a conducting path defining the drain, source and/or gate terminals of the semiconductor package. Although only a single clip 20 is described above as being connected between the die 12 and the base frame 2, it will be appreciated that in alternative embodiments multiple clips 20 may be connected between a single (i.e. individual) die 12 and the base frame 2.
The clip 20 may be a single clip or a matrix of clips. In this sense, a single clip is a grouping of mutually inter-operable connection portions, forming a set of connections portions (such as the first connection portion 22 and the second connection portion 24), collectively configured to conduct electrical current between one or more parts of the die 12 and one or more connection terminals of the eventual semiconductor die package. A matrix clip is a component defining multiple sets of connection portions (such as the first connection portion 22 and the second connection portion 24) and configured so that each set of connection portions can be separated from one another later in the manufacturing method to define a series of single clips. Put another way, a matrix clip is a component comprising multiple clips 20, 20′ separable into individual clips 20.
As shown on the right-hand side of
Following the removal of the base layer 2, the die 12 and the second connection portion 24 of the clip 20 are thinned. In the present embodiment, the die 12 and the second connection portion 24 of the clip 20 are thinned by abrasion using the polisher/grinder 30. However, in alternative embodiments any suitable thinning process may be used, such as for example chemical etching, laser ablation or the like.
Preferably, the die is thinned so that the thickness of the die (i.e. the dimension of the die between the first surface 14 and the second surface 16) is at most around 100 μm, or preferably at most around 50 μm, or more preferably at most around 25 μm, or most preferably at most around 15 μm. As explained above, the thinner the die 12, the lower the internal electrical resistance. Because the die 12 is encapsulated within the moulding compound 28, the die 12 is supported during the thinning process by the moulding compound 28. This support keeps the die 12 rigid and prevents the die 12 from deforming once thinned. Accordingly, the problems of die warpage and breakage associated with the prior art are almost entirely avoided.
It will be appreciated that the clip 20 also provides additional mechanical strength that provides further support to the die 12 and resists deformation of the die 12 so as to keep it rigid during the thinning process. However, it will be appreciated that it would be possible to adequately support the die 12 during the thinning process using only the support of the moulding compound 28, in the absence of any clip 20 or base frame 2.
It will be appreciated that, prior to the step of thinning, the die 12 was, of course, thicker. In particular, the thickness of the die 12 prior to the step of thinning may be the thickness of the silicon wafer from which the die was manufactured. Alternatively, the silicon wafer from which the die was manufactured may have been thinned by a certain extent before the die 12 was separated from the wafer. Regardless of which option above is chosen, the thickness of the die 12 before the step of thinning is normally at least around 150 μm, to 700 μm. The thicker the die 12 before the step of thinning, the greater the mechanical strength of the die 12.
In order to provide sufficient mechanical strength to support the die 12 during the thinning process, it is preferable that the moulding compound 28 defines a thickness that is at least 2 times the thickness of the die 12 before the step of thinning. In general, increasing the thickness of the moulding compound 28 and any encapsulated die 20 will provide better support to the die 12 during the thinning process and therefore mitigate against the problems of warpage and breakage. However, it will be appreciated that the thickness of the moulding compound 28 will be limited at least in dependence upon the thickness of the final semiconductor package.
Whilst the above method has been illustrated with a second base frame 38 comprising only two portions, it will be appreciated that in alternative embodiments the second base frame 38 may comprise any number of portions. In particular, it will be appreciated that each portion of the second base frame 38 may correspond to a connection terminal of the semiconductor package 50 to enable the semiconductor package to be integrated into electronic circuitry. For example, the various portions of the second base frame 38 may define the drain, signal and ground terminals of the semiconductor package 50. Accordingly, each portion of the second base frame 38 may be attached to a corresponding connection portion of the clip 20.
The semiconductor package 50 may be any suitable semiconducting device, for example a MOSFET or the like.
| Number | Date | Country | Kind |
|---|---|---|---|
| 23181138.1 | Jun 2023 | EP | regional |
