Patent Application
20250038038
The present disclosure relates to a semiconductor manufacturing device, a wafer mounting device, a dicing device, and a semiconductor manufacturing method.
In manufacturing a semiconductor device, a semiconductor chip cut out from a semiconductor wafer by a dicing device is generally mounted on a semiconductor module. When a semiconductor wafer is cut by a dicing device, the semiconductor wafer is stuck to a dicing tape so that the semiconductor chip does not move (for example, International Publication No. 2015/056303).
An orientation flat as a cutout for adjusting a position and a rotation angle of the semiconductor wafer is provided to the semiconductor wafer in many cases, and there is a case where the dicing device cuts the orientation flat along the orientation flat having a straight shape depending on a design of the semiconductor chip. In this case, one surface of a plate-like dicing blade cutting the orientation flat receives force from the semiconductor wafer, however, the other surface thereof is located adjacent to a space and does not receive the force, thus uneven force is applied to the dicing blade. As a result, the dicing blade is easily broken, and there is a problem that defect such as decrease in lifetime of the dicing blade occurs, for example.
The present disclosure therefore has been made to solve the above problems, and it is an object of the present disclosure to provide a technique capable of suppressing unevenness of force applied to a dicing blade in cutting an orientation flat.
A semiconductor manufacturing device according to the present disclosure includes: a stage on which a semiconductor wafer including an orientation flat and a jig having a shape corresponding to the orientation flat to be used for cutting the orientation flat by a dicing blade are fixed to each other by a dicing tape; and a transport machine transporting the jig so that the jig faces the orientation flat on the stage.
Unevenness of force applied to the dicing blade can be suppressed in cutting the orientation flat.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
Embodiments are described with reference to the appended diagrams hereinafter. Features described in each embodiment described below is exemplification, thus all features are not necessarily applied. The same or similar reference numerals will be assigned to same or similar constituent elements in a plurality of embodiments in the description hereinafter, and the different constituent elements are mainly described hereinafter. A specific position and direction such as “upper side”, “lower side”, “left”, “right”, “front side”, or “back side”, for example, may not necessarily coincide with a position and direction in an actual implementation in the description hereinafter.
The wafer table 1 is a stage on which a semiconductor wafer 21 and a jig 22 are fixed to each other by a dicing tape 26. In the present embodiment 1, the semiconductor wafer 21, the jig 22, and a wafer ring 23 are mounted on the wafer table 1, and then stuck to the dicing tape 26.
The semiconductor wafer 21 includes an orientation flat 21a. Provided to the semiconductor wafer 21 is a semiconductor chip including at least one of a metal oxide semiconductor field effect transistor (MOSFET), an insulated gate bipolar transistor (IGBT), a reverse conducting IGBT (RC-IGBT), a Schottky barrier diode (SBD), and a PN junction diode (PND). In the present specification, for example, at least any one of A, B, C, ···, and Z indicates any one of all of combinations extracting from one or more of groups of A, B, C, ···, and Z.
The semiconductor wafer 21 may be made of normal silicon (Si), or may also made of wide bandgap semiconductor such as silicon carbide (SiC), gallium nitride (GaN), or diamond. When the semiconductor wafer 21 is made up of a wide bandgap semiconductor, a stable operation under high temperature and high voltage and increase in switching speed can be achieved.
The wafer table 1 is provided with a depression 1a, and the semiconductor wafer 21 is mounted on the wafer table 1 manually or by the transport machine 2 or the other transport machine so that only an outer surrounding of the semiconductor wafer 21 is supported by the wafer table 1. The depression 1a suppresses contact between a surface structure of the semiconductor chip provided to the semiconductor wafer 21 and the wafer table 1.
The jig 22 in
The transport machine 2 transports the jig 22 so that the straight shape of the jig 22 faces the straight shape of the orientation flat 21a on the wafer table 1. Accordingly, the jig 22 is mounted on the wafer table 1.
The wafer ring 23 is mounted on the wafer table 1 manually or by the transport machine 2 or the other transport machine to surround the semiconductor wafer 21 and the jig 22 in a plan view. A material of the wafer ring 23 is stainless, for example.
The sticking roller 3 sticks the semiconductor wafer 21, the jig 22 facing the orientation flat 21a, and the wafer ring 23 surrounding the semiconductor wafer 21 and the jig 22 which are mounted on the wafer table 1 to the dicing tape 26. Specifically, the sticking roller 3 presses the dicing tape 26 fed by a feed machine not shown in the drawings against the semiconductor wafer 21, the jig 22, and the wafer ring 23, thereby sticking the dicing tape 26. The structure to be cut in
The semiconductor wafer 21 of the structure to be cut in
According to the semiconductor manufacturing device according to the present embodiment 1 described above, the transport machine 2 transports the jig 22 so that the straight shape of the jig 22 faces the straight shape of the orientation flat 21a on the wafer table 1. According to such a configuration, the structure to be cut in which the semiconductor wafer 21 and the jig 22 are fixed to each other can be formed while the jig 22 faces the orientation flat 21a as illustrated in
The dicing table 6 is a stage on which the semiconductor wafer 21 and the jig 22 are fixed to each other by the dicing tape 26. In the present embodiment 2, the dicing tape 26 to which the semiconductor wafer 21 and the wafer ring 23 surrounding the semiconductor wafer 21 are stuck is mounted on the dicing table 6 manually or by the transport machine 2 or the other transport machine. A part of the dicing table 6 on which the semiconductor wafer 21 is mounted may be provided with a porous capable of performing air suction on the semiconductor wafer 21 via the dicing tape 26.
After the dicing tape 26 described above is mounted on the dicing table 6, the transport machine 2 transports the jig 22 so that the straight shape of the jig 22 faces the straight shape of the orientation flat 21a on the dicing table 6, thereby sticking the jig 22 to the dicing tape 26. The structure to be cut in
The semiconductor wafer 21 of the structure to be cut in
According to the semiconductor manufacturing device according to the present embodiment 2 described above, the transport machine 2 transports the jig 22 so that the straight shape of the jig 22 faces the straight shape of the orientation flat 21a on the wafer table 1. According to such a configuration, the structure to be cut in which the semiconductor wafer 21 and the jig 22 are fixed to each other can be formed while the jig 22 faces the orientation flat 21a as illustrated in
In the description in the embodiment 1 and the embodiment 2, the jig 22 is transported by the transport machine 2. The configuration is not limited thereto, however, the jig 22 may be manually transported so that the straight shape of the jig 22 faces the straight shape of the orientation flat 21a.
The semiconductor wafer 21, for example, is stuck to the dicing tape 26 after being mounted on the wafer table 1 in the embodiment 1, and the jig 22 is stuck to the dicing tape 26 after the dicing tape 26, for example, is mounted on the dicing table 6 in the embodiment 2. However, the operation in the embodiment 1 and the operation of the embodiment 2 may be replaced with each other. That is to say, it is also applicable that the jig 22 is stuck to the dicing tape 26 after the dicing tape 26, for example, is mounted on the wafer table 1 in the embodiment 1, and the semiconductor wafer 21, for example, is stuck to the dicing tape 26 after being mounted on the dicing table 6 in the embodiment 2.
In the present embodiment 3, a material of the jig 22 and a material of the semiconductor wafer 21 are the same as each other in the embodiments 1 and 2. According to such a configuration, unevenness of force applied to the dicing blade can be further suppressed when the dicing blade 8 has contact with the orientation flat 21a compared with a case where materials of the semiconductor wafer 21 and the jig 22 are different from each other.
In the present embodiment 4, a thickness of the jig 22 and a thickness of the semiconductor wafer 21 are the same as each other in the embodiments 1 and 2. The state where the thickness of the jig 22 and the thickness of the semiconductor wafer 21 are the same as each other includes a state where a difference between the thickness of the jig 22 and the thickness of the semiconductor wafer 21 is equal to or smaller than 5% of a thickness of one of the jig 22 and the semiconductor wafer 21 larger than that of the other one thereof. According to such a configuration, unevenness of force applied to the dicing blade can be further suppressed when the dicing blade 8 has contact with the orientation flat 21a compared with a case where thicknesses of the semiconductor wafer 21 and the jig 22 are different from each other.
The configuration of the embodiment 3 may be combined with the configuration of the embodiment 4. That is to say, in the embodiments 1 and 2, it is applicable that the material of the jig 22 and the material of the semiconductor wafer 21 are the same as each other, and the thickness of the jig 22 and the thickness of the semiconductor wafer 21 are the same as each other. According to such a configuration, unevenness of force applied to the dicing blade can be further suppressed when the dicing blade 8 has contact with the orientation flat 21a compared with a case where thicknesses of the semiconductor wafer 21 and the jig 22 are different from each other.
In the present embodiment 5, the transport machine 2 transports the jig 22 so that a gap is located between the jig 22 and the orientation flat 21a in the embodiments 1 and 2. According to such a configuration, abrasion of the dicing blade 8 can be suppressed, thus increase in lifetime of the dicing blade 8 can be expected. The configuration of the present embodiment 5 may be combined with at least one of the configuration of the embodiment 3 and/or the configuration of the embodiment 4.
Each embodiment and each modification example can be arbitrarily combined, or each embodiment and each modification can be appropriately varied or omitted.
The aspects of the present disclosure are collectively described hereinafter as appendixes.
A semiconductor manufacturing device, comprising:
A wafer mounting device, comprising:
A dicing device, comprising:
The semiconductor manufacturing device according to any one of Appendixes 1 to 3, wherein
The semiconductor manufacturing device according to any one of Appendixes 1 to 4, wherein
The semiconductor manufacturing device according to any one of Appendixes 1 to 5, wherein
A semiconductor manufacturing method, comprising:
While the invention has been shown and described in detail, the foregoing description is in all aspects illustrative and not restrictive. It is therefore understood that numerous modifications and variations can be devised without departing from the scope of the invention.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2023-119815 | Jul 2023 | JP | national |
