Patent Application
20190355655
The present technical field relates to a semiconductor-mounted product obtained using a semiconductor part.
As a method of mounting a semiconductor part on a substrate, there is a method in which a bump formed on the lower surface of the semiconductor part using solder as a component is soldered to an electrode of a wiring substrate for conduction. However, the holding ability for holding the semiconductor part on the wiring substrate is often insufficient only by the solder joint between the bump and the electrode. In this case, a thermosetting resin such as an epoxy resin is used to reinforce the bond between the semiconductor part and the substrate.
As a reinforcement method using a resin, methods such as solder fill and side fill have been proposed (for example, PTL 1). In addition, a technique using a resin-reinforced solder paste composed of a thermosetting resin composition containing a solder powder and a flux component has been proposed (for example, PTL 2). In addition, a technique has been proposed in which a resin composition which does not contain solder is attached to the surface of a solder ball (for example, PTL 3).
An example of conventional reinforcement using a resin is described with reference to
As illustrated in
Next, semiconductor device 6 is mounted on circuit board 2 coated with sealing material 5 as illustrated in
Subsequently, circuit board 2 and semiconductor device 6 are heated and joint portion 10 is formed by soldered portion 8 and resin-cured portion 9 as illustrated in
PTL 1: International Publication No. 2012/042809
PTL 2: Unexamined Japanese Patent Publication No. 2011-176050
PTL 3: Unexamined Japanese Patent Publication No. 2012-84845
A semiconductor-mounted product of the present invention includes a semiconductor package, a wiring substrate, four or more soldered portions, and a resin-reinforced portion. The wiring substrate has a mounting surface on which the wiring is disposed, and the semiconductor package is mounted on this mounting surface. Each of the soldered portions electrically connects the semiconductor package to the wiring. The resin-reinforced portion is disposed on a side surface of each of the soldered portions. Each of the soldered portions has a first solder region located closer to the semiconductor package than the wiring substrate and a second solder region located closer to the wiring substrate than the semiconductor package. A proportion of a void present in a polygon connecting centers of the soldered portions located at outermost positions among the soldered portions to a sum of the void and the resin-reinforced portion is from 10% to 99%, inclusive. The proportion of the void is evaluated in a surface which is apart from the mounting surface by ¼ of a distance between the semiconductor package and the wiring substrate and is parallel to the mounting surface. Alternatively, the proportion of the void is evaluated in a surface which is apart from the mounting surface by ⅓ of a distance from a position most distant from the wiring of the resin-reinforced portion to the mounting surface and is parallel to the mounting surface.
This configuration improves the repairability of the semiconductor-mounted product.
Prior to the description of the present exemplary embodiment, problems in a conventional semiconductor device illustrated in
Moreover, thermosetting resin composition 1 is pushed and spread downward when convex terminal 7 is pressed onto thermosetting resin composition 1 which has been printed and formed in advance. For this reason, the height of resin-cured portion 9 for reinforcing the periphery of soldered portion 8 may not be sufficient and resin-cured portion 9 may not be able to reinforce the periphery of soldered portion 8.
Hereinafter, exemplary embodiments of the present invention are described with reference to the drawings. In the respective exemplary embodiments, the same reference numeral is given to the same configuration as that in the preceding exemplary embodiment and the detailed description thereof may be omitted. Incidentally, the present invention is not limited to the following first to fourth exemplary embodiments. It is possible to change the exemplary embodiments within the scope of the concept of the present invention. It is also possible to apply the contents of the first to fourth exemplary embodiments in combination with one another.
Semiconductor part 110 includes semiconductor package 120 having mounting surface 150, bump 130, and covering portion 140. Bump 130 is formed on mounting surface 150. Covering portion 140 covers a tip portion of bump 130. Specifically, a plurality of bumps 130 are formed on mounting surface 150 of semiconductor package 120 at predetermined intervals. Covering portions 140 provided on the surfaces of the respective bumps 130 are apart from each other, and the electric insulation between adjacent bumps 130 is maintained.
Bump 130 is formed of first solder. On the other hand, covering portion 140 is formed of a first composition containing solder powder 170 composed of second solder, a flux component (not illustrated), and first thermosetting resin binder (hereinafter, first binder) 160.
First, semiconductor part 110 is described in more detail. Semiconductor package 120 is not particularly limited as long as it is in a form in which bump 130 composed of a solder ball and the like is formed on the mounting surface of semiconductor package 120. An example of semiconductor package 120 includes BGA (Ball Grid Array Package), CSP (Chip Scale Package) and the like in which a solder ball is provided as bump 130 on the lower surface of an interposer of an organic substrate, a semiconductor chip is mounted on the upper surface, and sealing is performed using a sealing resin.
Next, the first solder constituting bump 130 is described. The solder material constituting the first solder is not particularly limited. As the first solder, for example, a solder material containing Sn as a base can be used. As the first solder, a solder material having a melting point higher than that of solder powder 170 (second solder) contained in covering portion 140 is preferable. It is useful to use a Sn—Ag—Cu-based solder material (for example, a solder material called SAC 305) as the first solder. As a solder material having a high melting point is used as the first solder, bump 130 melts after solder powder 170 melts at the time of reflow. In order to melt bump 130 at a temperature close to the temperature at which solder powder 170 melts at the time of reflow, it is useful to use an alloy containing Bi as the first solder. As a solder alloy containing Bi is used as the first solder, the melting temperature of bump 130 can be lowered. As described above, the first solder forming bump 130 can be appropriately selected according to the application.
Next, each material of first composition 230 constructing covering portion 140 is described. The second solder constituting solder powder 170 is not particularly limited, but, for example, a solder alloy containing Sn as a base can be used. As the second solder, it is desirable to use, for example, a solder alloy containing Sn and Ag, Cu, Bi, Zn, In and the like. As the second solder, a solder material having a melting point lower than that of bump 130 (first solder) is particularly preferable. It is useful to use a solder material having a relatively low melting point as the second solder. When a solder material having a low melting point is used as the second solder, solder powder 170 melts before bump 130 melts at the time of reflow, and semiconductor package 120 and the wiring substrate are suitably soldered.
A specific example of the second solder having a low melting point includes, for example, a Sn—Bi-based solder material containing Bi as an essential component. For example, the eutectic point of Sn—Bi-based solder is 139° C. The melting point of the second solder can be set to be between 139° C. and 232° C. by selecting a solder material containing Bi as the second solder. In addition, as a solder material containing Bi is used as the second solder, the wettability to bump 130 and the wettability to the wiring on the wiring substrate are enhanced. In addition, as a solder material containing Bi is used as the second solder, the melting temperature of solder powder 170 is lowered and the melting behavior of solder powder 170 can be matched with the thermal curing behavior of first binder 160.
The content of solder powder 170 in the first composition is preferably in a range of from 40% by mass to 95% by mass, inclusive. When the content is in this range, it is possible to sufficiently exert the reinforcing effect by a resin-reinforced portion to be described later in addition to the electrical bonding property. Furthermore, it is more preferable that the content is in a range of from 70% by mass to 95% by mass, inclusive, since deterioration in coating workability due to an increase in viscosity of the first composition can be suppressed. Incidentally, solder powder 170 is present in the first composition in a dispersed state and the dispersed state of solder powder 170 is maintained in covering portion 140 as well.
The flux component is not particularly limited, and rosin component materials typified by abietic acid, various kinds of amines and salts thereof, sebacate salts, organic acids such as adipic acid and glutaric acid, and the like can be used. These flux components may be one kind of component or may be a mixture of two or more kinds of components.
The content of flux component is preferably set to be in a range of from 1% by mass to 50% by mass, inclusive, with respect to the total amount of the flux component and first binder 160. In this range, the flux component can exert excellent flux action, and the flux component further improves the mechanical bonding property and electrical bonding property by the cured product of covering portion 140.
First binder 160 is present in covering portion 140 in an uncured state or a B-stage state. First binder 160 forms resin-reinforced portion 290 surrounding the side surface of soldered portion 270 at the time of reflow as illustrated in
As the epoxy resin, it is preferable to use an epoxy resin which is liquid at normal temperature. When such an epoxy resin is used, other components such as solder powder 170 can be easily dispersed in the epoxy resin. Incidentally, “being liquid at normal temperature” means to exhibit fluidity in a temperature range of from 5° C. to 28° C., inclusive, at atmospheric pressure, particularly around 18° C. of room temperature. As this epoxy resin which is liquid at normal temperature, the molecular weight and molecular structure are not particularly limited and various kinds of resins can be used as long as the resin has two or more epoxy groups in one molecule. Specifically, it is possible to use, for example, various kinds of liquid epoxy resins such as glycidyl ether type, glycidyl amine type, glycidyl ester type, and olefin oxidation type (alicyclic) liquid epoxy resins. More specifically, it is possible to use, for example, bisphenol type epoxy resins such as bisphenol A type epoxy resin and bisphenol F type epoxy resin, hydrogenated bisphenol type epoxy resins such as hydrogenated bisphenol A type epoxy resin and hydrogenated bisphenol F type epoxy resin, biphenyl type epoxy resin, naphthalene ring-containing epoxy resin, alicyclic epoxy resin, dicyclopentadiene type epoxy resin, phenol novolac type epoxy resin, cresol novolac type epoxy resin, triphenylmethane type epoxy resin, aliphatic epoxy resin, and triglycidyl isocyanurate. These may be used singly, or two or more kinds thereof may be used concurrently. Among these, bisphenol type epoxy resins and hydrogenated bisphenol type epoxy resins are preferable as the epoxy resin which is liquid at normal temperature when a decrease in viscosity of covering portion 140 and improvement in physical properties of the cured product are taken into consideration.
In addition, as the epoxy resin, an epoxy resin which is solid at normal temperature can be used concurrently with the epoxy resin which is liquid at normal temperature. As the epoxy resin which is solid at normal temperature, it is possible to use, for example, biphenyl type epoxy resin, dicyclopentadiene type epoxy resin, and an epoxy resin having a triazine skeleton.
As a curing agent for the epoxy resin, it is possible to use acid anhydrides, phenol novolacs, various kinds of thiol compounds, various kinds of amines, dicyandiamide, imidazoles, metal complexes, and adducts compounds thereof, for example, adduct modified products of polyamines. The amount of curing agent used is appropriately set, but for example, it is desirable to set the amount to be in a range of from 3 parts by mass to 20 parts by mass, inclusive, with respect to 100 parts by mass of the epoxy resin. In addition, it is more desirable to set the amount to be in a range of from 5 parts by mass to 15 parts by mass, inclusive. In addition, it is desirable that the ratio of stoichiometric equivalent of the curing agent to the epoxy equivalent of the epoxy resin is set to be in a range of from 0.8 to 1.2, inclusive.
In first binder 160, a curing accelerator can be blended, if necessary, in addition to the epoxy resin and the curing agent. As the curing accelerator, it is possible to use imidazoles, tertiary amines, cyclic amines such as 1,8-diazabicyclo(5.4.0)undecene-7 and 1,5-diazabicyclo(4.3.0)nonene-5 and tetraphenylborate salts thereof, trialkyl phosphines such as tributyl phosphine, triaryl phosphines such as triphenyl phosphine, quaternary phosphonium salts such as tetraphenylphosphonium tetraphenylborate and tetra(n-butyl)phosphonium tetraphenylborate; metal complexes such as Fe acetylacetonate, and adducts compounds thereof. The amount of these curing accelerators blended may be appropriately set in consideration of gelation time and storage stability.
First composition 230 may contain commonly used modifiers, additives and the like in addition to the components described above. In addition, a solvent having a low boiling point and a plasticizer may be added to first composition 230 for the purpose of adjusting the viscosity and the fluidity. In addition, hardened castor oil, stearic acid amide and the like may be added to first composition 230 as a thixotropy imparting agent for holding the printing shape.
The method of preparing first composition 230 is not particularly limited, and first composition 230 can be prepared, for example, by the following method. First, solder powder 170, a part or whole of the epoxy resin, and the flux component are mixed together to prepare a mixture. Thereafter, the curing agent is added to and mixed with the mixture. In addition, in a case in which a part of the epoxy resin is first used at the time of preparation of a mixture, the remainder of the epoxy resin and the curing agent are added to and mixed with the mixture.
Next, the covering state of the surface of bump 130 by covering portion 140 is described in more detail.
In
Moreover, it is preferable that covering portion 140 is 40% or more of the height of bump 130 when the height from the tip portion of bump 130 to mounting surface 150 of semiconductor package 120 is defined as the height of bump 130. In other words, it is preferable that the end portion of covering portion 140 on the side surface of bump 130 is closer to mounting surface 150 than a position to be 40% of the height of bump 130 from the tip portion of bump 130. Furthermore, it is more desirable that the height of covering portion 140 is 60% or more of the height of bump 130.
By setting the height of covering portion 140 to be 40% or more of the height of bumps 130, resin-reinforced portion 290 can be increased in height or thickness and the periphery of soldered portion 270 can be to reinforced in a wall shape in
Incidentally, the fact that the height of covering portion 140 is 100% is a state in which the entire surface of bump 130 is covered with covering portion 140. In other words, this state is a state in which covering portion 140 continuously covers from the tip portion of bump 130 to mounting surface 150 of semiconductor package 120.
Incidentally, in a case in which the height of covering portion 140 is 100%, solder powder 170 contained in covering portion 140 may be in direct contact with the mounting surface of semiconductor package 120 between two adjacent bumps 130. In this case, it is useful to carry out the treatment which is illustrated in
In addition, it is useful to carry out the steps illustrated in
It is desirable that the thickness of the region part covering the tip portion of bump 130 in covering portion 140 is 5 μm or more. Furthermore, it is desirable that the thickness is 10 μm or more and 20 μm or more to be thick. However, in this case, it is desirable that covering portions 140 formed on two adjacent bumps 130 do not come into contact with each other. Furthermore, it is desirable that the region part covering the tip portion of bump 130 in covering portion 140 is thicker than the region part covering the side surface of bump 130. In a case in which the thickness of covering portion 140 covering the bump tip portion of bump 130 is less than 5 μm, the formation of first solder region 340 and resin-reinforced portion 290 may be insufficient. In a case in which the region part covering the tip portion of bump 130 in covering portion 140 is the same as or thinner than the region part covering the side surface of bump 130, the mounting strength may be affected.
The average particle diameter of solder powder 170 contained in covering portion 140 is desirably from 3 μm to 30 μm, inclusive. When the average particle diameter is less than 3 μm, solder powder 170 may be expensive and the formation of second solder region 350 in
Next, an example of a method of manufacturing semiconductor part 110 is described with reference to
As illustrated in
In order to make the thickness (or depth) of first composition 230 poured into the pool of transfer table 220 constant, a rubber spatula, a stainless steel plate and the like are used. It is useful to flatten (at least 10 μm or less at 3σ/x, further 5 μm or less, 3 μm or less) the surface of first composition 230. The thickness (or depth) of first composition 230 on transfer table 220 may be lower than the height of bump 130.
In this state, bump 130 of semiconductor package 120 held by part holding tool 210 is moved in the direction indicated by arrow 200 and dipped in first composition 230.
Thereafter, bump 130 is pulled up from first composition 230 in the direction indicated by arrow 200 in
As described above, in order to manufacture semiconductor part 110, semiconductor package 120 having bumps 130 formed of the first solder on mounting surface 150 is prepared. Meanwhile, first composition 230 containing solder powder 170 composed of second solder, a flux component, and first binder 160 is prepared. Thereafter, the tip portion of bump 130 is covered with a part of first composition 230.
In addition, the procedures illustrated in
Next, a semiconductor-mounted product having a solder joint structure according to the present first exemplary embodiment is described with reference to
As illustrated in
Wiring 250 is provided on the mounting surface of wiring substrate 240. The material, size and the like of wiring substrate 240 are not particularly limited, but for example, a printed substrate having an insulating layer formed of a generally used glass epoxy resin can be used. Wiring 250 is not particularly limited and can be formed in, for example, a copper foil pattern having a thickness of about 8 μm to 35 μm, inclusive.
In a conventional semiconductor-mounted product, a so-called underfill structure is employed in which a gap between a wiring substrate and a semiconductor package is filled with a filling material to completely fill the space without a gap. However, in the case of such a conventional underfill structure, it is difficult to completely fill the gap without a void when the number of bumps in the semiconductor package is large. For this reason, in the conventional underfill structure, the underfilling material may not be filled, and a void and the like may be generated when the number of bumps increases and the diameter of individual bumps decreases or the density of a large number of bumps increases.
On the other hand, in the case of semiconductor-mounted product 310, soldered portion 270 is surrounded and reinforced by resin-reinforced portion 290 as illustrated in
For example, when the number of bumps 130 of semiconductor part 110 increases, the diameter of bumps 130 decreases and a large number of bumps 130 are formed on mounting surface 150 of semiconductor part 110 at high density. As described above, even in a case in which bumps 130 are small and disposed at high density, resin-reinforced portion 290 uniformly reinforces the periphery of each soldered portion 270 in semiconductor-mounted product 310.
In
Next, an example of a method of manufacturing semiconductor-mounted product 310 is described with reference to
As illustrated in
Arrow 200 indicates the direction in which semiconductor part 110 held by part holding tool 210 is mounted on wiring 250. It is preferable that solder paste 260 be disposed on wiring 250 in advance by printing and the like. As illustrated in
In the example illustrated in
Thereafter, semiconductor part 110 is moved in the direction indicated by arrow 200a in
As indicated by arrow 200a in
Auxiliary line 190a indicates the end position of covering portion 140 before bump 130 is mounted on solder paste 260. Auxiliary line 190b indicates the end position of covering portion 140 after bump 130 is mounted on solder paste 260.
Arrow 200b indicates the height (or dimension of change in height) of covering portion 140a swelled around bump 130 when bump 130 is pressed against the solder paste. The phenomenon (a kind of bulge phenomenon) in which covering portion 140a swells around bump 130 can be described as follows. In other words, covering portion 140a covering the surface of bump 130 is stripped off by solder paste 260 when bump 130 intrudes into solder paste 260. Thereafter, covering portion 140a stripped off swells around bump 130 as a kind of bulge by the height indicated by arrow 200b.
As bump 130 having covering portion 140a is mounted on solder paste 260 so as to be embedded in this manner, covering portion 140a covering bump 130 can be heightened from the position indicated by auxiliary line 190a to the position indicated by auxiliary line 190b by the height indicated by arrow 200b in
Incidentally, the same effect is obtained even in a case in which a commercially available solder paste not containing a thermosetting resin binder is used as solder paste 260 to be provided on wiring 250. In other words, by carrying out the operation illustrated in
As described above, even when the height of covering portion 140 is about 40% of the height of bump 130 in a state in which mounting illustrated in
Furthermore, when the solder reflow step is performed, covering portion 140a becomes still higher than that before reflow step is performed.
In the solder reflow step, the plurality of solder powders 170a contained in covering portion 140a melt and are integrated with one another. This melting and integration pushes first binder 160a from the inside to the outside of covering portion 140a. First binder 160a thus pushed to the outside covers the periphery of soldered portion 270 illustrated in
Furthermore, as bump 130 melts and solder powder 170 and bump 130 are integrated with each other by the reflow step, the distance between wiring substrate 240 and semiconductor package 120 is decreased. In other words, height 280 after reflow is lower than that before reflow. As a result, even when the height of resin-reinforced portion 290 is the same before and after the reflow step, the relative height of resin-reinforced portion 290 is 50% or more of the height of soldered portion 270 from wiring 250.
Incidentally, in
Incidentally, solder plating and the like may be formed on wiring 250 instead of solder paste 260. In this case as well, first binder 160a is pushed to the outside of covering portion 140 as solder powder 170a melts into and is integrated with the molten solder plating at the time of reflow. Moreover, first binder 160a pushed out increases the height and thickness of resin-reinforced portion 290.
Through the above steps, semiconductor-mounted product 310 has the above-described solder joint structure constituted by semiconductor package 120, wiring substrate 240, soldered portion 270, and resin-reinforced portion 290 as illustrated in
As illustrated in
It is possible to use a Sn—Ag—Cu-based solder material (for example, a solder material called SAC 305) as the first solder constituting bump 130 as described above.
In addition, it is possible to use a Sn—Bi-based solder material containing Bi as an essential component as the second solder constituting solder powder 170. As second solder region 350 contains Bi, the wettability of soldered portion 270 to wiring 250 is enhanced. In addition, it is also useful to diffuse Ag and Cu components contained in Sn—Ag—Cu-based first solder region 340 into Sn—Bi-based second solder region 350. Bi is poorly elongated, and thus a problem may occur by drop impact and the like. In contrast, when a metal component such as Ag or Cu contained in the first solder diffuses into Sn—Bi-based second solder region 350, the ductility of solder alloy is ameliorated and the drop impact resistance is improved. Incidentally, as Ag and Cu diffuse into Sn—Bi-based second solder region 350, second solder region 350 may become Sn—Bi—Ag—Cu-based solder. Incidentally, these solder regions can be confirmed by a simple evaluation method using an X-ray microanalyzer and the like but it is not required to form a clear interface between the regions. Rather, it is desirable to form a diffusion layer between first solder region 340 and second solder region 350.
The strength of soldered portion 270 is enhanced as the periphery of the part containing Bi (for example, second solder region 350 in
It is useful to increase the average thickness of resin-reinforced portion 290 surrounding the periphery of second solder region 350 to 1 μm or more, further 5 μm or more, and 10 μm or more in a case in which second solder region 350 containing Bi is surrounded by resin-reinforced portion 290. The reinforcing effect may decrease in a case in which the average thickness is less than 1 μm.
In addition, it is preferable that resin-reinforced portion 290 covering the side surface of second solder region 350 extends from the side surface of second solder region 350 to the side surface of first solder region 340 and covers the side surface of first solder region 340 as illustrated in
Next, a further preferred structure is described with reference to
Resin-reinforced portion 290 may be formed on mounting surface 150 so as to surround each periphery of the plurality of soldered portions 270 in a ring shape of 360 degrees. In addition, the respective resin-reinforced portions 290 formed on the plurality of soldered portions 270 may be linked to one another on mounting surface 150.
In addition, the corner fill or the side fill formed of filling material 320 may be provided at the peripheral part and the like of semiconductor package 120 as described above. These greatly enhance the reliability of semiconductor-mounted product 310. As filling material 320, it is possible to use an insulating material which is a filling material to be generally used and is obtained by adding an inorganic filler and the like to a thermosetting resin such as an epoxy resin.
Hereinafter, the effects of the present exemplary embodiment are described using a specific example of semiconductor part 110.
As to be described below, semiconductor-mounted products according to sample E1 to sample E4 are fabricated and subjected to the evaluation on solder joint strength.
First, solder paste A containing solder powder 170 containing Bi, a flux component, and first binder 160 is prepared as first composition 230.
Sn42Bi58 manufactured by MITSUI MINING & SMELTING CO., LTD. is used as solder powder 170. An epoxy resin (“YD128” manufactured by NIPPON STEEL Chemical & Material Co., Ltd.) is used as uncured first binder 160. A phenol curing agent (“MEH-8000H” manufactured by MEIWA PLASTIC INDUSTRIES, LTD.) is used as a curing agent. Abietic acid is used as a flux component. Thereafter, 80.0 parts by mass of a solder powder, 16.4 parts by mass of an epoxy resin, 0.9 part by mass of a curing agent, and 2.7 parts by mass of a flux component are blended together and uniformly mixed and kneaded using a disperser. A paste-like first composition (solder paste A) is thus prepared.
Next, semiconductor part 110 illustrated in
Semiconductor part 110 of each sample fabricated in this manner is mounted on wiring substrate 240 by the following procedure. First, FR-4 is prepared as a base material of wiring substrate 240 having wiring 250 on the mounting surface. FR-4 is a base material obtained by impregnating a glass fiber cloth with an epoxy resin, subjecting the impregnated glass fiber cloth to a thermosetting treatment, and molding the treated glass fiber cloth into a plate shape. A glass epoxy substrate is formed by sticking a copper foil on the surface using FR-4 as a base material. The thickness of wiring substrate 240 is 0.8 mm, and the diameter of electrode (land) is 0.4 mm. The first composition (solder paste A) is supplied to the electrode (land) of wiring 250 on wiring substrate 240 using a metal mask for printing. Incidentally, the opening diameter of the metal mask is 0.4 mm.
Thereafter, BGA provided with covering portion 140 and wiring substrate 240 are disposed, bump 130 and the electrode of wiring 250 are positioned, and BGA is mounted on wiring substrate 240 as illustrated in FIG. described above. Thereafter, wiring substrate 240 on which BGA is mounted is heated in accordance with a predetermined heating profile to melt and solidify bumps 130 and to melt and integrate solder powder 170 with bumps 130. Soldered portion 270 for jointing wiring 250 and semiconductor package 120 is thus formed. At the same time, first binder 160 contained in the first composition is cured to form resin-reinforced portion 290 which reinforces soldered portion 270 from the periphery. According to the procedure described above, semiconductor-mounted products 310 of sample E1 to sample E4 are fabricated.
Next, sample C1 and sample C2 are described with reference to
In sample C2, BGA to be semiconductor package 120 is used as semiconductor part 400 without forming covering portion 140 on bumps 130 in the same manner as in sample C1. However, solder paste A is used for metal mask printing. In other words, solder paste A is printed on the electrode of wiring 250 on wiring substrate 240. BGA is mounted on wiring substrate 240 in the same manner as in sample E1 to sample E4 except this. A semiconductor-mounted product of sample C2 is thus fabricated.
Next, the contents and results of the evaluation on reliability performed for samples E1 to E4 and samples C1 and C2 are described.
Semiconductor-mounted products 310 of sample E1 to sample E4 and semiconductor-mounted products of samples C1 and C2 are electrically inspected to be sorted into non-defective products, defective products, and the like. Thereafter, a heat cycle test in which the non-defective products are alternately immersed in a liquid bath at −40° C. for 5 minutes and in a liquid bath at 80° C. for 5 minutes is performed up to 1000 cycles.
Semiconductor-mounted products 310 of sample E1 to sample E4 and semiconductor-mounted products of samples C1 and C2 are electrically inspected to be sorted into non-defective products, defective products, and the like. Thereafter, the non-defective products are subjected to the evaluation to determine the number of drops until the instantaneous interruption occurs to the circuit of the semiconductor-mounted product under a condition of impact acceleration 1500 G/0.5 ms. The number of drops is set to a maximum of 1000 times.
The evaluation results by the tests described above are presented in (Table 1).
Incidentally, solder paste A in (Table 1) corresponds to first composition 230 described in the first exemplary embodiment. The height of cover portion is the height indicated by arrow 200 in
In sample E1 to sample E4, resin-reinforced portion 290 surrounds the entire periphery of soldered portion 270. As presented in (Table 1), height 300 of resin-reinforced portion 290 reaches a height to be 50% or more of height 280 of solder portion 270 particularly in sample E1 to sample E3 in which the height of covering portion 140 is 40% or more of the height of bump 130.
On the other hand, resin-reinforced portion 290 is not substantially formed in sample C1, and the height of the resin-reinforced portion is only 30% of the height of the soldered portion in sample C2.
In each of sample E1 to sample E3, 1000 cycles are cleared in the temperature cycling test and 1000 times are cleared in the drop test as well. In sample E4, the height of covering portion 140 is 35% to be lower than that in sample E1 to sample E3 and the height of resin-reinforced portion 290 is also less than 50%. As a result, the evaluation results on the temperature cycling test and the drop test are inferior to those for sample E1 to sample E3. However, the evaluation results are superior to those for sample C1 and sample C2. Sample E1 to sample E4 thus exhibit excellent mounting reliability.
In sample C1, the resin-reinforced portion is not formed, thus a problem occurs after 250 cycles in the temperature cycling test and a problem occurs after times in the drop test.
In sample C2, the height of the resin-reinforced portion is 30%, thus a problem occurs after 400 cycles in the temperature cycling test and a problem occurs after 250 times in the drop test.
As described above, in sample E1 to sample E4, resin-reinforced portion 290 is formed around soldered portion 270 after reflow, and favorable results re obtained in both the temperature cycling test and the drop test. From the evaluation results for sample E1 to sample E4, it is understood that the height of covering portion 140 is preferably 35% or more and more preferably 40% or more of the height of bump 130.
The problems occurred in sample C2 and the causes thereof are discussed below with reference to
As described above, in semiconductor part 400 of sample C2 illustrated in
Arrow 200a in
As illustrated in
As illustrated in
Next, sample E5 to sample E10 which are other examples according to the present exemplary embodiment are described.
In sample E5 to sample E7, solder is not formed on the electrode of wiring 250. Moreover, the heights of covering portions 140 are 80%, 60%, and 40%, respectively, with respect to the height of bumps 130. Sample E5 to sample E7 are the same as sample E1 except this.
In sample E8, solder plating is formed on the electrode of wiring 250. The amount of solder is the same as that of solder powder 170. Moreover, the height of covering portion 140 is 60% of the height of bumps 130. Sample E8 is the same as sample E1 except this.
In sample E9, the height of covering portion 140 is 40% of the height of bumps 130. However, the thickness of covering portion 140 is two-fold that in sample E1. Sample E9 is the same as sample E1 except this.
In sample E10, above-described solder paste B is supplied onto the electrode of wiring 250. The height of covering portion 140 is 60% of the height of bumps 130. However, the thickness of covering portion 140 is three-fold that in sample E1. Sample E10 is the same as sample E1 except this.
The configurations and evaluation results for samples E5 to E10 are presented in (Table 2).
As presented in (Table 2), in sample E5 to sample E10, the height of resin-reinforced portion 290 is 60% or more of the height of soldered portion 270 and favorable results are obtained in the temperature cycling test and the drop test by setting the height of covering portion 140 to 40% or more.
From the results for sample E5 to sample E7, it is understood that the height of covering portion 140 with respect to the height of bumps 130 may be set to 40% or more and the height of resin-reinforced portion 290 may be set to 60% or more of the height of soldered portion 270 even when solder is not formed on the electrodes of wiring 250.
From the result for sample E8, it is understood that the height of resin-reinforced portion 290 is 100% of the height of soldered portion 270 and favorable results are obtained in the temperature cycling test and the drop test if the height of covering portion 140 is 60% of the height of bumps 130 even in a case in which the solder plating is formed on wiring 250.
It is considered that the reason for this is because first binder 160 contained in covering portion 140 is pushed to the outside of soldered portion 270 when the solder plating melts and solder powder 170 contained in covering portion 140 and the molten solder plating are integrated with each other. In other words, it is considered that first binder 160 pushed to the outside forms resin-reinforced portion 290 along the side surface of bump 130.
In addition, from the results for sample E9 and sample E10, it is understood that the height of resin-reinforced portion 290 is high to be 100% of the height of soldered portion 270 in the samples subjected to thick printing so that the thickness of solder paste A becomes thicker.
For example, in sample E9, the height of covering portion 140 is 40% of the height of bump 130, but the height of resin-reinforced portion 290 becomes 100% of the height of soldered portion 270 by increasing the amount of solder paste A and thickening covering portion 140. As a result, it is considered that favorable results are obtained in the temperature cycling test and the drop test.
Incidentally, it is useful to repeat the steps illustrated in
In sample E10, it is considered that the solder component of solder paste B is integrated with solder powder 170 contained in covering portion 140 in the reflow step and first binder 160 is pushed up along the side surface of bump 130. For this reason, the height of resin-reinforced portion 290 is high to be 100% of the height of soldered portion 270. As a result, favorable results are obtained in the temperature cycling test and the drop test. In addition, thick solder paste A on the surface of bumps 130 also contributes to an increase in the amount of first binder 160 and an increase in the height of resin-reinforced portion 290.
Covering portion 140 covering the surface of bump 130 is attached to mounting surface 150 as well. In this case, the transfer method described based on
As illustrated in
In addition, as indicated by arrow 200b, covering portion 140 attached to the surface of bump 130 may be allowed to flow toward semiconductor package 120 by its own weight by inverting the top and bottom of semiconductor part 110. Such flow of covering portion 140 (first composition 230) is described with reference to
Arrow 200b and dotted line 370 in
Incidentally, the flow of covering portion 140 may be promoted by moving second jig 380 in the direction of arrow 200c and pressing second jig 380 against the tip portion of bump 130 as illustrated in
Next, the amount of covering portion 140 is described with reference to
As illustrated in
Incidentally, as covering portion 140b to be superimposed on covering portion 140a, the first composition may be used but a composition in which the thermosetting resin binder has the same or similar component composition as that in the first composition may be supplied. Alternatively, covering portion 140b may be formed using a mixed composition of the first thermosetting resin binder with the flux component or using only the first thermosetting resin binder. As covering portion 140b is formed in this manner, covering portion 140a and covering portion 140b are favorably mixed with each other at the part at which both of these overlap each other and the interface between covering portion 140a and covering portion 140b disappears. As a result, firm resin-reinforced portion 290 at which cracking due to the interface hardly occurs is formed so as to cover approximately the entire outer periphery of soldered portion 270. In the same manner, the formation of solder portion 270 is stabilized as solder powder 170a contained in covering portion 140a and solder powder 170b contained in covering portion 140b have the same or similar component composition.
Semiconductor part 110 according to the present exemplary embodiment includes auxiliary covering portion 440 in addition to semiconductor part 110 according to the first exemplary embodiment illustrated in
Covering portion 140 is formed so as to cover the region of at least the tip portion of bump 130, for example, as illustrated in
Auxiliary covering portion 440 does not contain solder powder 170. Hence, as illustrated in
At the time of reflow, the viscosity of auxiliary covering portion 440 decreases. Moreover, auxiliary covering portion 440 is integrated with the molten material of first binder 160 of covering portion 140 and constitutes resin-reinforced portion 290 surrounding the side surface of solder portion 270 as illustrated in
Incidentally, a part of auxiliary covering portion 440 and a part of covering portion 140 may overlap each other. This overlapping facilitates the integration of first binder 160 of covering portion 140 melted at the time of reflow and second binder 430 of auxiliary covering portion 440 and makes it possible to more reliably form resin-reinforced portion 290.
Next, second composition 390 is described in more detail. Second binder 430 contained in second composition 390 is present in an uncured or B-stage state in the form of auxiliary covering portion 440. Moreover, second binder 430 is cured together with first binder 160 to constitute resin-reinforced portion 290 after being melted at the time of reflow.
The material for second binder 430 is not particularly limited as long as it can constitute resin-reinforced portion 290, but it is preferable to contain an epoxy resin and a curing agent as main components in the same manner as in first binder 160. Examples of the epoxy resin and curing agent which can be used include those the same as the compounds exemplified in the description of first binder 160. Furthermore, it is preferable that first binder 160 and second binder 430 are composed of the same material or similar resin materials compatible with each other. By this, first binder 160 and second binder 430 are favorably mixed with each other at the part at which auxiliary covering portion 440 and covering portion 140 overlap each other and the like.
Second composition 390 does not contain solder powder 170 and thus may contain a flux component, if necessary, although the flux component is not essential. In addition to the components described above, second composition 390 may contain, if necessary, modifiers, additives and the like in the same manner as first composition 230.
Next, a method of manufacturing semiconductor part 110 according to the present exemplary embodiment is described with reference to
In order to attach second composition 390 to bumps 130 of semiconductor package 120, the following method and the like may be mentioned. For example, second composition 390 can be attached to bumps 130 by applying the steps illustrated in
Next, as illustrated in
Incidentally, the viscosity, thixotropy, tack and the like may be adjusted in order to optimize the fluidity of second composition 390. For this, a thermoplastic resin, an additive, and an insulating additive such as an inorganic filler may be appropriately added to second composition 390.
Thereafter, the tip portion of bump 130 on which auxiliary covering portion 440 is formed is directed downward as illustrated in
Specifically, the intermediate in the state of
Incidentally, the operation to form auxiliary covering portion 440 illustrated in
By mounting semiconductor part 110 illustrated in
As described in the first exemplary embodiment with reference to
The solder contained in soldered portion 270 is remelted when soldered portion 270 is reheated. The solder expands as compared to that before being melted when the solder is remelted in this manner. Furthermore, such reheating causes warpage of wiring substrate 240. As a result of these, the pressure of the remelted solder increases. If resin-reinforced portion 290 has a part at which the adhesion with semiconductor package 120 or wiring substrate 240 is weak, the remelted solder is pushed out from this part and, in some cases, causes defects such as short. Hereinafter, such a phenomenon is called solder flash.
In order to suppress the solder flash, resin-reinforced portion 290 may be formed so that the height of resin-reinforced portion 290 does not become 100% of the height of solder portion 270 over the entire periphery of solder portion 270. In such a state, the remelted solder is released at the part which is not covered with resin-reinforced portion 290 and thus the pressure of the remelted solder does not increase significantly. As a result, solder flash can be suppressed.
Specifically, the solder flash can be suppressed by the following method. By regulating the amount of first binder 160a and/or first binder 160b, the height of resin-reinforced portion 290 is controlled to be less than 100% of the height of solder portion 270 as in sample E1 to sample E4 in (Table 1) and sample E7 in (Table 2). More specifically, the amount of the flux component contained in the first binder is controlled.
The solder flash can be suppressed by methods other than this. Hereinafter, a specific example thereof is described with reference to
In the example illustrated in
Incidentally, supply of first binder 160a to bump 130 as illustrated in
The effect of reinforcing solder portion 270 is higher as resin-reinforced portion 290 is higher as described above. In particular, it is preferable that the height of resin-reinforced portion 290 is 100% of solder portion 270 and resin-reinforced portion 290 is provided substantially from wiring substrate 240 to semiconductor package 120. For this reason, it is preferable that a part of resin-reinforced portion 290 continuously covers the part from the top of wiring substrate 240 to the mounting surface of semiconductor package 120 via the side surface of solder portion 270 at the entire periphery of solder portion 270 as illustrated in
Incidentally, in
Incidentally, in the description with reference to
Resin-reinforced portion 290 is formed on the side surface of each of the plurality of soldered portions 270 and is also formed on wiring substrate 240 by linking soldered portion 270A to soldered portion 270B. In addition, space 29V in which resin-reinforced portion 290 is not present is provided between soldered portion 270A and soldered portion 270B.
A semiconductor-mounted product having such a configuration is hardly damaged even in the case of being accidentally dropped since space 29V absorbs the impact. In addition, even when the semiconductor-mounted product is exposed to an environment in which the temperature periodically changes, space 29V can relieve the stress generated at this time. Moreover, resin-reinforced portion 290 is also formed on wiring substrate 240 by linking soldered portion 270A to soldered portion 270B, thus the rigidity of soldered portions 270A and 270B is improved and the drop resistance is further improved.
Incidentally, in
As described above, in soldered portion 270, second solder region 350 contains Bi and has a low melting point and thus the mechanical strength thereof is lower than that of first solder region 340. For this reason, from the viewpoint of improving rigidity, resin-reinforced portion 290 may be formed on the side surface of each of soldered portions 270 and may also be formed on the mounting surface of semiconductor package 120 by linking soldered portion 270A to soldered portion 270B.
In addition, it is preferable that the height of the part most distant from wiring 250 of resin-reinforced portion 290 is from 30% to 100%, inclusive, of the height of soldered portion 270 from wiring 250. Resin-reinforced portion 290 links soldered portion 270A to soldered portion 270B, and thus drop resistance can be secured even when the height of resin-reinforced portion 290 is 30% of the height of soldered portion 270. In this case as well, it is preferable that resin-reinforced portion 290 covers at least the side surface of second solder region 350. In addition, it is preferable from the viewpoint of strength that resin-reinforced portion 290 extends from the side surface of second solder region 350 to the side surface of first solder region 340 and covers the side surface of first solder region 340.
In addition, it is also preferable from the viewpoint of strength that a part of resin-reinforced portion 290 continuously covers the part from the top of wiring substrate 240 to the mounting surface of semiconductor package 120 via the side surface of soldered portion 270. On the other hand, if the height of resin-reinforced portion 290 is less than 100% of the height of soldered portion 270, the insulation failure due to the solder flash can be suppressed in the same manner as in the fourth exemplary embodiment.
In addition, insulating filling material 320 which links semiconductor package 120 to wiring substrate 240 may be provided at the peripheral portion of semiconductor package 120 in the same manner as that illustrated in
The formation of resin-reinforced portion 290 in this manner can be realized by lowering the viscosity of first binder 160a illustrated in
In the example illustrated in
On the other hand, only soldered portion 270D is exposed to space 29V in the example illustrated in
Next, the effects of the present exemplary embodiment are specifically described using Examples.
BGA type semiconductor packages having different pitches are used as a semiconductor package. There are three pitches of 0.65 mm, 0.5 mm, and 0.4 mm. In addition, a SnAgCu ball as a solder bump is mounted on the semiconductor package. In other words, these semiconductor packages are Daisy-chain wiring semiconductor packages.
The following two kinds of solder pastes are used as a solder paste.
Solder paste D: Sn42Bis58 is used as solder and a bisphenol F type epoxy resin (“jER 806” manufactured by Mitsubishi Chemical Corporation) is used as a first binder. In addition, an imidazole-based curing agent (“2P4MZ” manufactured by Shikoku Kasei Co., Ltd.) is used as a curing agent, and a thixo agent (“TALEN VA-750B” manufactured by KYOEISHA CHEMICAL CO., LTD.) is used as a viscosity adjusting agent/thixotropic additive. Solder paste D is prepared by kneading these until a paste-like product is formed.
Solder paste E: solder paste E is prepared by kneading the same materials as thosefor solder paste D except that “ITOWAX J420” manufactured by ITOH OIL CHEMICALS CO., LTD. is used as a viscosity adjusting agent/thixotropic additive until a paste-like product is formed.
Solder paste F: solder paste F is prepared by kneading the same materials as those for solder paste D except that “THIXCIN R” manufactured by Elementis Japan is used as a viscosity adjusting agent/thixotropic additive until a paste-like product is formed.
The above-mentioned BGA type semiconductor package is mounted on a wiring substrate using solder pastes D to F prepared as described above in the same manner as covering portion 140 and solder paste 260 illustrated in
Specifically, the drop resistant life is evaluated as a drop resistance test. It is judged as defective if the resistance value rises by 20% or more in the semiconductor package when the semiconductor-mounted product is dropped from a height of 30 cm, and the number of drops until the occurrence of defect is evaluated as the drop resistant life.
The items and evaluation results of the respective samples are presented in (Table 3). Incidentally, in (Table 3), “pitch” indicates the pitch of BGA type semiconductor package and “presence or absence of linking” means whether or not a resin-reinforced portion is also formed on the mounting surface of the semiconductor package by linking two adjacent soldered portions to each other. “presence or absence of space” means whether or not a space in which the resin-reinforced portion is not formed is present between two adjacent soldered portions, and “height of resin-reinforced portion” means the height of the part most distant from the wiring of the resin-reinforced portion and is denoted as a percentage with respect to the height of the soldered portion from wiring 250. In addition, the drop resistant life is denoted as “≤200” in a case in which the number of drops before the occurrence of defect is 200 or more times, “≤150” in the case of from 150 times to 199 times, inclusive, and “≤100” in the case of from 100 times to 149 times, inclusive.
In a case in which solder paste D or solder paste E is used, the first binder is likely to flow and thus the resin-reinforced portions may be linked to each other at the lower part of two adjacent soldered portions. On the other hand, in a case in which solder paste C is used, the flowability of the first binder is low and thus the resin-reinforced portions are not linked to each other at the lower part of two adjacent soldered portions. However, in all samples, a space is present between the soldered portions.
In samples E11 to E22, the resin-reinforced portions at the lower part of two adjacent soldered portions are linked to each other. On the other hand, in samples C11 to C14, the resin-reinforced portions at the lower part of two adjacent soldered portions are not linked to each other. For this reason, in a case in which the heights of the resin-reinforced portions are the same as one another, samples E11 to E22 are superior in drop resistance to samples C11 to C14. This is because the rigidity can be enhanced as the resin-reinforced portions have a part at which the resin-reinforced portions are linked to each other at the lower part of adjacent soldered portions.
The first binder is more likely to flow by reflow at 180° C. than by reflow at 160° C., and thus the resin-reinforced portion is lower. However, in samples E18, E20, and E22, the drop resistance is not deteriorated even when the height of the soldered portion is 30% since a great number of parts at which the resins are linked to each other at the lower part of soldered portion are formed.
On the other hand, in sample C14, the first binder flows by reflow at 180° C., and the height of the soldered portion decreases to 30%. However, the drop resistance is deteriorated as compared to that in the case of reflow at 160° C. since the resin-reinforced portions do not have parts at which the resin-reinforced portions are linked to each other at the lower part of adjacent soldered portions.
In the present exemplary embodiment, a structure by which both the repairability and the drop resistant strength are achieved is described. First, the repairability is briefly described.
Troubles may be caused to the semiconductor package or the wiring substrate in the inspection after the semiconductor-mounted product is assembled, or troubles may be caused to the semiconductor package or the wiring substrate during actual use. In such a case, the semiconductor package and the wiring substrate may be separated from each other and the semiconductor package or wiring substrate without any abnormality may be combined with a new part (semiconductor package or wiring substrate).
When the semiconductor package and wiring substrate which have been assembled once are separated from each other in this manner, the semiconductor-mounted product is heated and the soldered portion is divided at the interface between the first solder region and the second solder region. Alternatively, in a case in which the melting point of the second solder region is lower than the melting point of the first solder region, the soldered portion is divided in the second solder region.
In general, a semiconductor package has a large number of bumps such as BGA, and wirings are formed on a wiring substrate by the number corresponding to the number of bumps. Hence, the semiconductor-mounted product has a large number of soldered portions, and each of the soldered portions is covered with the resin-reinforced portion as described in the first to fifth exemplary embodiments. When the resin-reinforced portion covers the resin-reinforced portions without a gap at the time of separation of the semiconductor package from the wiring substrate, the resin-reinforced portion interferes with the separation of the semiconductor package from the wiring substrate. In the following description, the ease of separation of the semiconductor package from the wiring substrate is referred to as repairability.
As described above, when the semiconductor package and the wiring substrate are separated from each other, the soldered portion is divided at the interface between the first solder region and the second solder region or in the second solder region. Hence, the repairability is improved if there are a great number of voids in the resin-reinforced portion at the height position in the vicinity of the place to be divided. Next, the height position at which the number of voids (void ratio) in the resin-reinforced portion is evaluated is described.
For example, as illustrated on the right side of
As described in the first exemplary embodiment, it is preferable that height 300 of resin-reinforced portion 290 in
The height position at which the void ratio is evaluated and which is determined in consideration of these conditions is described with reference to
As illustrated in
Incidentally, in a case in which the height of resin-reinforced portion 290 is lower than the height of soldered portion 270 as illustrated on the left side of
Next, an example of the definition of void ratio on surface EP 10 (EP20) for evaluating the void ratio is briefly described with reference to
The preferred range of void ratio is from 10% to 99%, inclusive, from the viewpoint of repairability. This range is described with reference to the following Examples. Incidentally, the drop resistance can be achieved as long as resin-reinforced portion 290 appropriately covers soldered portion 270 regardless of the void ratio.
A semiconductor package having BGAs lined up so that 400 pins form a square with a 0.5 mm pitch is used. On the wiring substrate, 400 wirings corresponding to these BGAs are formed. A soldered portion and a resin-reinforced portion are formed using these semiconductor packages and wiring substrates by the method described in any of the first to fifth exemplary embodiments. At this time, the void ratio is changed as presented in Table 4 by adjusting the amount of the binder forming the resin-reinforced portion. A resin composition containing an epoxy resin as a main component is used as the binder, Sn-3Ag-0.5Cu is used as the first solder for forming the first solder region, and 42Sn-58Bi is used as the first solder for forming the second solder region. The void ratio is from 10% to 99%, inclusive, in sample E61 to sample E66, and the void ratio is less than 10% in sample C61 to sample C63.
Next, the evaluation method and evaluation criteria of the repairability are described. The semiconductor-mounted product formed as described above is heated by setting the peak temperature to 150° C. and held at the peak temperature for 30 seconds using an infrared rework apparatus (IR/PL 550) manufactured by Kurtz Ersa Corporation. Immediately thereafter, the BGA is manually removed using tweezers. It is evaluated to be GD (Good) if the semiconductor package can be peeled off from the wiring substrate with light force (for example, less than 3 N), it is evaluated to be OK if the semiconductor package can be peeled off from the wiring substrate with relatively strong force (for example, 3N or more and less than 5N), and it is evaluated to be NG if the semiconductor package can be peeled off from the wiring substrate with strong force (for example, 5N or more). The void ratio and the evaluation results are presented together in (Table 4).
As apparent from the evaluation results, the semiconductor package can be peeled off from the wiring substrate with light force in a case in which the void ratio is from 50% to 99%, inclusive, (sample E61 to sample E64). In addition, the semiconductor package can be peeled off from the wiring substrate with relatively strong force in a case in which the void ratio is from 10% to 30%, inclusive, (sample E65 and sample E66). On the other hand, in a case in which the void ratio is less than 10% (sample C61 to sample C63), the repairability is low since the semiconductor package cannot be peeled off from the wiring substrate unless strong force is applied.
On the other hand, when the void ratio exceeds 99%, space 29V described in the fifth exemplary embodiment is extremely small and the effect of relieving the stress generated when the semiconductor-mounted product is exposed to an environment in which the temperature periodically changes is substantially nonfunctional.
Incidentally, in Example above, the case in which the centers of four soldered portions 270E located at the outermost positions among soldered portions 270 are located at the apexes of a square has been described, but the centers of four soldered portions 270E located at the outermost positions among soldered portions 270 may be located at the apexes of rectangle 270E as illustrated in
According to the semiconductor part and semiconductor-mounted product of the present invention, it is possible to improve the repairability of the semiconductor-mounted product as well as the reliability of various kinds of electronic devices.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/JP2017/001307 | 1/17/2017 | WO | 00 |
