Patent Application
20140307382
Embodiments described herein relate generally to a semiconductor storage device and a method of manufacturing the same.
As an auxiliary storage device mounted on a computer, an auxiliary storage device including a hard disk drive (HDD) (hereinafter, “HDD device”) is used (see Japanese Patent Application Laid-Open NO. 2004-30837).
In recent years, an auxiliary storage device including, as a recording medium, a nonvolatile semiconductor memory such as a NAND flash memory (so-called solid state disk, hereinafter, “SSD device”) is mounted on a computer instead of the HDD device. In the SSD device, a plurality of NAND flash memories (hereinafter, “NANDs”) and a controller integrated circuit (IC) that controls the NANDs are mounted on a printed circuit board via electrodes (bumps). The SSD device is mounted on the computer after being housed in a housing generally having an external dimension and a shape same as those of the HDD device specified by a standard (e.g., a housing having a size and a shape same as those of a 2.5-inch HDD device). There are several kinds of standards concerning the housing of the HDD device according to the sizes of magnetic disks. In general, a housing such as that for the 2.5-inch HDD device is a box made of metal.
When the SSD device actually operates (when data is actually read and written), a controller generates heat because switching operation is repeatedly performed at high speed. A part of the heat generated from the controller is transmitted to the printed circuit board via the bump set in contact with the controller and further transmitted to the NANDs via a wiring pattern on the printed circuit board the bumps set in contact with the NANDs. In an operation principle, under a high-temperature environment, the NANDs tend to unsteady operate because leak current increases. Therefore, operation guarantee temperature for the NANDs is set low compared with other kinds of ICs. For example, whereas the operation guarantee temperature of the NANDs is about 85° C., the operation guarantee temperature of the other kinds of ICs is about 100° C.
Therefore, in the SSD device, it is necessary to cool the controller to suppress the transmission of the heat from the controller to the NANDs. In the case of the HDD device including a magnetic disk as a recording medium, because the controller and the magnetic disk are arranged separately from each other, the heat generated from the controller does not affect a mechanical section and the like of the magnetic disk. Therefore, it can be said that this problem is peculiar to the SSD device.
As a structure for cooling the controller in the SSD device, it is conceivable to interpose a heat radiation sheet between the controller and a bottom housing. Even if the heat radiation sheet is interposed between the controller and the bottom housing, the entire heat generated from the controller is not always transmitted to the bottom housing. However, a part of the heat is transmitted to the bottom housing via the heat radiation sheet. Consequently, a heat quantity transmitted to the NANDs is reduced to maintain the temperature of the NAND not to exceed the operation guarantee temperature.
According to the improvement of the performance of the SSD device and the computer mounted with the SSD, a heat value during actual operation of the controller tends to increase. For example, a data transfer rate of the SSD in the past is 100 MByte/sec for readout and 40 MByte/sec for writing. Currently, the data transfer rate is improved to 240 MByte/sec for readout and 200 MByte/sec for writing. Therefore, even if the heat radiation sheet is arranged between the controller and the bottom housing, it is difficult to sufficiently radiate the heat generated from the controller. However, an SSD device that takes measures against this problem is not realized.
In general, according to one embodiment, a semiconductor storage device includes: a printed circuit board mounted on with, one surface, respectively via a plurality of bumps, a plurality of first nonvolatile semiconductor memories and a controller that controls reading of data from and writing of data in the first nonvolatile semiconductor memories; a housing that is formed of a conductive material and houses the printed circuit board; and a first heat radiation member that is interposed between a surface of the housing opposed to one surface of the printed circuit board and the controller and first nonvolatile semiconductor memories and thermally connects the controller and first nonvolatile semiconductor memories and the housing. The coupling capacitance in a state in which the first radiation member is arranged between a first capacitor formed by the surface of the housing opposed to one surface of the printed circuit board and the printed circuit board is smaller than coupling capacitance in a state in which an integrally formed object having a relative dielectric constant of 5.8 is arranged between the first capacitor to cover a first radiating region containing the controller and the first nonvolatile semiconductor memories.
Exemplary embodiments of semiconductor storage device and method of manufacturing the same will be explained below in detail with reference to the accompanying drawings. The present invention is not limited to the following embodiments.
The top cover 1 and the bottom housing 9 are coupled by cover fixing screws 2 to form a housing having a substantial hexahedron shape opened on one side. The printed circuit board 3 is screwed to the bottom housing 9 by fixing screws 8 in a state in which heat radiation sheets 10 (first heat radiation members) are interposed between the controller 6 and NANDs 5 and the bottom housing 9. A connector 4 is arranged at one end of the printed circuit board 3. The connector 4 is an interface that connects a host apparatus such as a computer and the SSD device. A shape and the like of the connector 4 are decided to conform to, for example, a serial advanced technology attachment (SATA) standard as a connection interface standard. The connector 4 is exposed to the outside of the housing in an opened surface of the housing. The SSD device is connected to the computer as the host apparatus that is an apparatus on which the SSD is mounted. In the following explanation, the printed circuit board 3 mounted with the connector 4, the NANDs 5, and the controller 6 is also referred to as semiconductor memory device 50. The SSD device according to this embodiment is a box-type semiconductor storage device in which the semiconductor memory device 50 is housed in a housing of a 2.5-inch type same as the housing of the HDD device.
Each of the heat radiation sheets 10 is formed to have flexibility with a material containing silicone resin and ceramics filler. Each of the heat radiation sheets 10 is pressed by the controller 6, the NAND 5, and the bottom housing 9 mounted on the printed circuit board 3 and closely attached to both of the printed circuit board 3 and the controller 6, the NAND 5, and the bottom housing 9. Consequently, the controller 6, the NAND 5, and the bottom housing 9 are thermally connected. An SDRAM 7 has high heat resistance. No deficiency occurs even if heat from the controller 6 is transited to the SDRAM 7. Therefore, the heat radiation sheet 10 is not arranged between the SDRAM 7 and the bottom housing 9. The heat radiation sheet 10 has a size for realizing a heat radiation effect sufficient for preventing the temperature of the controller 6 and the NAND 5 from rising to be equal to or higher than a design value (e.g., 85° C. as the operation guarantee temperature). As explained later, the first heat radiation member is not limited to a heat radiation sheet molded in a sheet shape and can be a gel member. However, in an example explained below, the heat radiation sheet is used.
The printed circuit board 3 has a multilayer structure formed by superimposing synthetic resin. In this embodiment, the printed circuit board 3 has an eight-layer structure. On the printed circuit board 3, a circuit pattern 3a (not shown in
In the SSD device according to this embodiment as the box-type semiconductor storage device, in the semiconductor memory device 50, as shown in
The screw 24 inserted into the screw hole 9a on a direction side to which the center axis AX of the semiconductor memory device 50 is shifted interferes with a part (the interference section 3b) of the printed circuit board 3 set close to the wall surface of the housing.
In the printed circuit board 3 used in the SSD device according to this embodiment, the interference section 3b is cut out to form a cutout 3c. Therefore, the screw 24 and the printed circuit board 3 can be actually prevented from interfering with each other. Therefore, the printed circuit board 3 can be prevented from being broken or bent by interference with the screw 24. Specifically, the cutout 3c is formed near the connector 4 and on one side of the printed circuit board 3 that is close to the wall surface of the housing when the semiconductor memory device 50 is housed in the housing.
The printed circuit board 3 can also be used in a module-type semiconductor storage device in which the semiconductor memory device 50 is used without being housed in a housing or the like to conform to the MO-297 standard set up by the Joint Electron Device Engineering Council (JEDEC).
In the semiconductor memory device 50 for the module-type semiconductor device and the semiconductor memory device 50 for the box-type semiconductor storage device, a part of a shape of the printed circuit board 3 included in the semiconductor memory device 50 is different. Specifically, a part of the printed circuit board 3 of the semiconductor memory device 50 for the box-type semiconductor storage device is cut out to form the cutout 3c.
An external dimension and the like of the module-type semiconductor storage device are specified by, for example, the MO-297 standard of the JEDEC. In the module-type semiconductor storage device, because the semiconductor memory device 50 is used without being housed in the housing, an external dimension and the like of the semiconductor memory device 50 itself are specified. Consequently, an external dimension and the like of the printed circuit board 3 included in the semiconductor memory device 50 are also specified.
As explained above, the printed circuit board 3 is also used when the SSD device is configured as the module-type semiconductor storage device. Therefore, a discriminating section 14 is formed as shown in
The configuration of the circuit pattern 3a formed on the printed circuit board 3 is explained below.
The circuit pattern 3a is formed in other layers different from the layer shown in
As shown in
The NANDs 5 and controllers 6 are mounted on the sections of the printed circuit boards 3 in a state of the sheet-like substrate 19 to which the peripheral section 16 is coupled. The peripheral section 16 can be separated to obtain the semiconductor memory device 50 from the sheet-like substrate 19 by cutting off the coupling sections 18 using a drill of a divider. Cutouts 3c of the printed circuit boards 3 are formed when the coupling sections 18 are cut off. In this embodiment, four semiconductor memory devices 50 can be obtained from one sheet-like substrate 19 by separating the peripheral section 16 from the sheet-like substrate 19 mounted with the NANDs 5 and the controllers 6. The number of semiconductor memory devices 50 that can be obtained from the one sheet-like substrate 19 is not limited to four. A larger number of semiconductor memory devices 50 can be obtained from the one sheet-like substrate 19 by using a larger sheet-like substrate 19. One semiconductor memory device 50 can be obtained from the one sheet-like substrate 19.
When it is discriminated at step S3 that the printed circuit boards 3 are not used in the box-type semiconductor storage device but is used in the module-type semiconductor storage device (“No” at step S3), the cutouts 3c are not formed and the coupling sections 18 are cut off (step S5). Consequently, the four semiconductor memory devices 50 in which the cutouts 3c are not formed are obtained from the one sheet-like substrate 19. The step of forming the cutouts 3c and the step of cutting off the coupling sections 18 can be separately performed and whichever of the steps can be performed earlier.
As explained above, the circuit pattern 3a is formed to avoid the interference section 3b of the printed circuit board 3 and the devices such as the NANDs 5 are arranged to avoid the interference section 3b. Therefore, the arrangement of the circuit pattern 3a and the devices of the printed circuit board 3 can be used in common irrespectively of whether the semiconductor memory device 50 is used in the module-type semiconductor storage device or used in the box-type semiconductor storage device. The arrangement of the circuit pattern 3a and the devices of the printed circuit board 3 can be used in common irrespectively of presence or absence of the cutout 3c. This makes it possible to suppress design cost for the arrangement of the circuit pattern 3a and the devices. Because mounting evaluation and performance evaluation can be used in common, it is also possible to suppress evaluation cost. Because the devices to be mounted can be used in common, it is also possible to suppress selection cost for the devices. When the semiconductor memory device 50 is used in the module-type semiconductor storage device, because the cutout 3c is not formed, it is possible to satisfy the formation of a hole requested by the MO-297 standard. On the other hand, when the semiconductor memory device 50 is used in the box-type semiconductor storage device, it is possible to prevent interference between the screw and the printed circuit board 3 by forming the cutout 3c.
Because the circuit pattern 3a is formed to avoid the interference section 3b, when the cutout 3c is formed, the drill 31 does not have to be caused to cut off the circuit pattern 3a. Consequently, when the cutout 3c is formed, it is possible to cause the drill 31 to cut off only resin. Therefore, the life of the drill 31 can be extended. As shown in
In the above explanation, when the peripheral section is separated from the sheet-like substrate 19, the interference section 3b is cut out to form the cutout 3c. However, the formation of the cutout 3c is not limited to this. For example, it is also possible to store the semiconductor memory device 50 as the module-type semiconductor storage device without forming the cutout 3c when the peripheral section is separated and, when the semiconductor memory device 50 is used in the box-type semiconductor storage device a posteriori, cut out the interference section 3b to form the cutout 3c.
A procedure for assembling the SSD device including the semiconductor memory device 50 is explained below. First, as shown in
An assembling procedure for an SSD apparatus substituting a gel member for the heat radiation sheet as the first heat radiation member is explained below. First, as shown in
In this case, at a point when the semiconductor memory device 50 is housed in the bottom housing 9, a leak of the gel member 22 already less easily occurs. Extrusion and a leak of the gel member 22 do not easily occur. Therefore, it is easy to automate an injection process for the gel member 22 using an industrial robot or the like. It is possible to realize a reduction in manufacturing cost.
If the gel member 22 has viscosity and surface tension enough for not spreading exceeding a predetermined area (e.g., an area opposed to the NAND 5 and the controller 6) from application to curing of the gel member 22, it is also possible to house the semiconductor memory device 50 in the bottom housing 9 before the curing of the gel member 22. In other words, even if the gel member 22 is compressed by the NAND 5, the controller 6, and the bottom housing 9 when the semiconductor memory device 50 is housed in the bottom housing 9, an application amount of the gel member 22 only has to be controlled to an amount enough for maintaining a shape of the gel member 22 with the surface tension and the viscosity. When a certain length of time elapses after the semiconductor memory device 50 is housed in the bottom housing 9, the gel member 22 is cured. Therefore, even when the SSD apparatus is used as a product, it is possible to suppress a leak of the gel member 22.
In general, the gel member is more inexpensive than the heat radiation sheet. Therefore, if the gel member is used, it is possible to realize a further reduction in manufacturing cost for the SSD apparatus.
A reason for individualizing the heat radiation sheets 10 in this embodiment is explained below.
As measures against heat of the NANDs, it is conceivable to thermally connect the NANDs and the bottom housing via the heat radiation sheets. As an example of this structure, there is a structure in which a heat radiation sheet 11 having a minimum rectangular shape that covers a radiating region (first radiating region) containing a plurality of the NANDs 5 and the controller 6 is interposed between the controller 6 and NANDs 5 and the bottom housing 9.
The printed circuit board 3 of the SSD device is arranged substantially parallel to the bottom housing 9. Therefore, it can be regarded that a parallel flat capacitor is formed by the printed circuit board 3 and the bottom housing 9. A model of the parallel flat capacitor formed by the printed circuit board 3 and the bottom housing 9 is shown in
The printed circuit board 3 receives the supply of electric power from the computer connected via the connector 4 and operates as an SSD. High-frequency noise occurs from the NANDs 5 and the controller 6 because of an internal operation clock and read/write data. The noise propagates to the bottom housing 9 according to capacitive coupling of the printed circuit board 3 and the bottom housing 9.
The bottom housing 9 resonates with respect to an electromagnetic wave having a frequency (1/n) times (n=1, 2, 4, 8, . . . ) as high as a frequency with a dimension in a longitudinal, lateral, or diagonal direction of the bottom housing 9 set as one wavelength and functions as an efficient antenna. For example, if the long side, the short side, and the diagonal of the bottom housing 9 are 0.1 meter, 0.06985 meter, and 0.122 meter, respectively, in the long side direction, electromagnetic waves having frequencies 3 GHz, 1.5 GHz, 0.75 GHz, 0.375 GHz, and the like resonate. In the short side direction, electromagnetic waves having frequencies 4.295 GHz, 2.147 GHz, 1.074 GHz, 0.537 GHz, and the like resonate. In the diagonal direction, electromagnetic waves having frequencies 2.459 GHz, 1.230 GHz, 0.615 GHz, 0.307 GHz, and the like resonate. The electromagnetic waves having these frequencies are radiated into the air via the bottom housing 9 as an antenna.
In the example explained above, resonant frequencies are present over substantially all bands of 300 MHz to 1 GHz included as measurement ranges in electromagnetic interference (EMI) standards of countries and regions specified in the CE, the Voluntary Control Council for Interference by information technology equipment (VCCI), the Federal Communications Commission (FCC), and the like. However, because of a difference in dimensions in the longitudinal, lateral, and diagonal directions of the bottom housing 9, the resonant frequency of 0.537 GHz at ⅛ wavelength in the short side direction, the resonant frequency of 0.615 GHz at ¼ wavelength in the diagonal direction, and the resonant frequency of 0.750 GHz at ¼ wavelength in the long side direction have a small frequency difference of a resonant frequency. When operation speed of the SSD device is increased, noise corresponding to the bands tends to occur and resonate with the bottom housing 9. Therefore, unnecessary radiation caused by the bottom housing 9 functioning as an antenna becomes more conspicuous according to the increase in the operation speed of the SSD device.
As explained above, the arrangement of the heat radiation sheets 10 or the heat radiation sheet 11 to cool the controller 6 and the NANDs 5 is nothing but insertion of an object having a relative dielectric constant (a relative dielectric constant of a material of the heat radiation sheets 10 or the heat radiation sheet 11) between the parallel flat plates of the parallel flat capacitor (between the printed circuit board 3 and the bottom housing 9). Therefore, when the heat radiation sheets 10 or the heat radiation sheet 11 is arranged, the coupling capacitance of the parallel flat capacitor increases compared with coupling capacitance in a state in which the printed circuit board 3 and the bottom housing 9 are simply opposed to each other. The bottom housing 9 easily functions as an antenna. When the heat radiation sheet 11 integrally formed to cover the radiating region containing the controller 6 and the NANDs 5 is set, the coupling capacitance of the capacitor increases more than the coupling capacitance of the capacitor obtained when the individual heat radiation sheets 10 are arranged. Therefore, the heat radiation sheet 11 integrally formed to cover the radiating region containing the controller 6 and the NANDs 5 is disadvantageous in terms of a reduction in unnecessary radiation caused by the bottom housing 9 functioning as the antenna.
A relative dielectric constant of a material of an existing heat radiation sheet is about 5.8. When the heat radiation sheet is integrally formed and arranged to cover the radiating region containing the controller 6 and the NANDs 5, an EMI characteristic of the SSD device can conform to the EMI standard at the very limit. It is likely that the EMI characteristic does not conform to the standard depending on shield performance of a computer as an apparatus on which the SSD device is mounted. If the operation speed of the SSD device is further increased, it is more highly likely that the EMI characteristic does not conform to the EMI standard. When a margin is given to the EMI standard and stricter specifications are required, it is likely that the required specifications cannot be met even by the current operation speed.
In this embodiment, with the above points taken into account, the individual heat radiation sheets 10 are adopted to suppress an increase in the coupling capacitance of the parallel flat capacitor. Because the heat radiation sheets 10 are individualized, a total of areas occupied by the heat radiation sheets 10 is small compared with an area of the heat radiation sheet 11 integrally formed to cover the radiating region containing the controller 6 and the NANDs 5. Therefore, the coupling capacitance of the capacitor decreases, impedance from a noise source to an antenna side increases, a transmission level decreases, and the unnecessary radiation caused by the bottom housing 9 functioning as the antenna is reduced.
A difference between the use of the individual heat radiation sheets 10 and the use of the heat radiation sheet 11 integrally formed to cover the radiating region containing the controller 6 and the NANDs 5 is explained more in detail below with reference to specific numerical values as examples. However, the present invention is not limited to the numerical values referred to as the examples.
Each of the individual heat radiation sheets 10 has longitudinal and lateral length of 0.01 meter and thickness of 0.003 meter. The printed circuit board 3 has longitudinal length of 0.063 meter and lateral length of 0.0865 meter. The bottom housing 9 has a long side of 0.1 meter, a short side of 0.06985 meter, and a diagonal of 0.122 meter.
A space between the printed circuit board 3 and the bottom housing 9 is 0.0044 meter. Mounting height of the controller 6 and the NANDs 5 is 0.0014 meter. Therefore, a space between the controller 6 and NANDs 5 and the bottom housing 9 is 0.003 meter.
The heat radiation sheet 11 integrally formed to cover the radiating region containing the controller 6 and the NANDs 5 has longitudinal length of 0.05 meter, lateral length of 0.07 meter, and thickness of 0.003 meter.
An area of each of the individual heat radiation sheet 10 is 0.0001 m2 and an area of the heat radiation sheet 11 integrally formed to cover the radiating region containing the controller 6 and the NANDs 5 is 0.0035 m2. Nine individual heat radiation sheets 10 are used in total to correspond to the controller 6 and the NANDs 5, respectively. Therefore, an area ratio of a total area S1 of the individual heat radiation sheet 10 and an area S2 of the heat radiation sheet 11 integrally formed to cover the radiating region containing the controller 6 and the NANDs 5 is S1:S2=0.0009:0.0035=1:3.9.
Coupling capacitance C of the parallel flat capacitor is represented by the following Formula (1):
C=ε
0
×ε×S
3
÷d (1)
In Formula (1), ε0 represents a dielectric constant (F/m) in the vacuum, ε represents a relative dielectric constant of an object present between the parallel flat plates, S3 represents an area (m2) of the parallel flat plates, and d represents a distance (m) between the parallel flat plates.
In the SSD device according to this embodiment, an area of the printed circuit board 3 smaller than the bottom housing 9 is the area of the parallel flat plates: S3=0.063×0.0865=0.0054495 m2. When the heat radiation sheets 10 or the heat radiation sheet 11 is present in a part between the parallel flat plates, the coupling capacitance of the capacitor is a sum of coupling capacitance of a region where the heat radiation sheets 10 or the heat radiation sheet 11 is present and coupling capacitance of a region where the heat radiation sheets 10 or the heat radiation sheet 11 is not present.
It is assumed that a relative dielectric constant of the air is approximated as 1. For simplification of explanation, it is assumed that a relative dielectric constant of electric components such as the controller 6 and the NANDs 5 is 1.
When the heat radiation sheets 10 or the heat radiation sheet 11 is not used, because only the air is present between the parallel flat plates, from Formula (1), coupling capacitance is 8.85419×10−12×1×0.0054495÷0.0044=1.10×10−12F=11.0 pF.
When the individual heat radiation sheets 10 are used, an area of a region where the heat radiation sheets 10 are present is 0.0009 m2 and an area of a region where the heat radiation sheets 10 are not present is 0.0045495 m2. From Formula (1), coupling capacitance of the region where the heat radiation sheets 10 are not present is 8.85419×10−12×1×0.0045495÷0.0044=9.16×10−12F=9.16 pF.
On the other hand, coupling capacitance of the region where the heat radiation sheets 10 are present is series coupling capacitance of coupling capacitance of sections of the heat radiation sheets and coupling capacitance of sections of the electronic components. Series coupling capacitance Cc of two capacitors CA and CB is represented by the following Formula (2):
1/Cc=(1/CA)+(1/CB) (2)
From formula (1), coupling capacitance of sections of the heat radiation sheets 10 is 8.85419×10−12×5.8×0.0009÷0.003=5.9×10−12=5.69 pF. From Formula (1), coupling capacitance of sections of the electronic components is 8.85419×10−12×1×0.0009÷0.0014=1.5×10−11F=15.4 pF. Therefore, from Formula (2), coupling capacitance of the entire area where the heat radiation sheets 10 are present is 4.16 pF. Therefore, coupling capacitance of the entire capacitors is 9.16 pF+4.16 pF−13.32 pF.
When the heat radiation sheet 11 integrally formed to cover the radiating region containing the controller 6 and the NANDs 5 is used, an area of a region where the heat radiation sheet 11 is present is 0.0035 m2 and an area of a region where the heat radiation sheet 11 is not present is 0.0019495 m2. According to calculation same as the calculation performed when the individual heat radiation sheet 10 is used, coupling capacitance of the region where the heat radiation sheet 11 is not present is 3.92 pF and coupling capacitance of the region where the heat radiation sheet 11 is present is 16.2 pF. Therefore, coupling capacitance of the entire capacitors is 20.1 pF.
As a result, the coupling capacitance can be reduced by about 44% by using the individual heat radiation sheets 10 compared with the coupling capacitance obtained when the heat radiation sheet 11 integrally formed to cover the radiating region containing the controller 6 and the NANDs 5 is used.
An EMI characteristic of the SSD device including the individual heat radiation sheets 10 is shown in
By using the individualized heat radiation sheets 10, the coupling capacitance of the capacitor is reduced and the unnecessary radiation caused by the bottom housing 9 functioning as the antenna is reduced. To realize, with the heat radiation sheet 11 integrally formed to cover the radiating region containing the controller 6 and the NANDs 5, coupling capacitance equivalent to that of the individual heat radiation sheets 10, it is necessary to form the heat radiation sheet 11 with a material having a relative dielectric constant of 1.586. However, in the present situation, it is difficult to form the heat radiation sheet 11 with such a material. In other words, by using the individualized heat radiation sheets 10, it is possible to reduce the coupling capacitance to a level that cannot be realized when the heat radiation sheet 11 integrally formed to cover the radiating region containing the controller 6 and the NANDs 5 is used and reduce the unnecessary radiation.
By individualizing the heat radiation sheet 10, it is also possible to reduce the weight of the SSD device. When the specific gravity of the heat radiation sheets 10 and 11 is set to 2.7, in the above example, a difference in an area is 0.0026 m2 and the thickness of the sheet is 0.003 meter, a weight difference is about 21 grams. In other words, by using the individual heat radiation sheets 10, it is possible to reduce the weight by about 21 grams compared with the SSD device including the heat radiation sheet 11 integrally formed to cover the radiating region containing the controller 6 and the NANDs 5.
In the example of the configuration explained above, the individual heat radiation sheets 10 are respectively arranged in the controller 6 and the NANDs 5. However, as shown in
As it is evident from Formula (1), the coupling capacitance of the parallel flat capacitor is proportional to the relative dielectric constant of an object present between the parallel flat plates. It is assumed that dimensions of the heat radiation sheet 12 are the same as the dimensions of the heat radiation sheet 11 explained in the first embodiment and other conditions such as an area of the printed circuit board 3 and a space between the bottom housing 9 and the printed circuit board 3 are also the same. In this case, as the coupling capacitance of the parallel flat capacitor, according to Formulas (1) and (2), the coupling capacitance of a region where the heat radiation sheet 12 is not present is 3.92 pF and the coupling capacitance of a region where the heat radiation sheet 12 is present is 14.1 pF. Therefore, the coupling capacitance of the entire capacitor is 18.0 pF. Therefore, by applying a heat radiation sheet formed of a material having a low relative dielectric constant, it is possible to reduce the coupling capacitance of the capacitor formed by the printed circuit board and the bottom housing and reduce the unnecessary radiation caused by the bottom housing functioning as the antenna.
In an SSD device according to a third embodiment, as in the second embodiment, one heat radiation sheet covers a controller and eight NANDs. A perspective view of a heat radiation sheet 13 according to this embodiment is shown in
The printed circuit board 3 has a temperature sensor IC 60 having a function to output temperature measurement results mounted thereon.
The temperature of the controller 6 is lower when the number of the radiation sheets 10 is six (6 pcs) than when the number of the radiation sheets 10 is five (5 pcs). The temperature of the controller 6 when the number of the radiation sheets 10 is nine (9 pcs) is approximately the same as the temperature of the controller 6 when the number of the radiation sheets 10 is six (6 pcs). The temperature of the NAND 5 is approximately the same when the number of the radiation sheets 10 is five and the number of the radiation sheets 10 is six. The temperature of the NAND 5 when the number of the radiation sheets 10 is nine is further lower than the temperature of the NAND 5 when the number of the radiation sheets 10 is six.
It is assumed here that the temperature of each device should be 85° C. or less when the temperature of the housing is set to 70° C. and an increase in temperature at each location will be calculated based on temperature measurement results illustrated in
The configuration in which the number of the radiation sheets 10 is five is lighter and costs less, but the temperature difference from the temperature of the housing is large. Though the configuration in which the number of the radiation sheets 10 is six is heavier than the configuration in which the number of the radiation sheets 10 is five, the temperature difference from the temperature of the housing becomes smaller. Thus, the number of the radiation sheets 10 can be decided as appropriate by considering the weight, cost, and the magnitude of temperature difference from the temperature of the housing within the range in which a product meets requirements concerning the device temperature. Therefore, heat dissipation performance can be ensured while reducing the weight and material costs by arranging the radiation sheets 10 on a portion of the controller 6 and the NANDs 5.
In the configuration explained as the example in the embodiments, the controller 6 and the NANDs 5 are mounted on the lower surface of the printed circuit board 3 and the heat radiation sheets 10, the heat radiation sheet 12, or the heat radiation sheet 13 is arranged between the printed circuit board 3 and the bottom housing 9. However, it goes without saying that the same effect can be obtained even when the controller 6 and the NANDs 5 are mounted on the upper surface of the printed circuit board 3 and a heat radiation sheet(s) is arranged between the printed circuit board 3 and the top cover 1.
In the configuration explained as the example in the embodiments, the NANDs 5 are mounted on only the lower surface of the printed circuit board 2. However, it is also possible to adopt a configuration in which the printed circuit board 3 mounted with the NANDs 5 on both the surfaces is used.
While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel embodiments described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the embodiments described herein may be made without departing from the sprit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2009-172942 | Jul 2009 | JP | national |
| 2009-293492 | Dec 2009 | JP | national |
| 2010-121629 | May 2010 | JP | national |
This application is a continuation of and claims the benefit of priority under 35 U.S.C. §120 from U.S. application Ser. No. 13/010,475, filed Jan. 20, 2011, which is a continuation-in-part of application Ser. No. 12/839,785, filed Jul. 20, 2010, now abandoned, and is based upon and claims the benefit of priority from the prior Japanese Patent Applications No. 2009-172942, filed on Jul. 24, 2009, Japanese Patent Application No. 2009-293492, filed on Dec. 24, 2009, and Japanese Patent Application No. 2010-121629, filed on May 27, 2010, the entire contents of all of which are incorporated herein by reference.
| Number | Date | Country | |
|---|---|---|---|
| Parent | 13010475 | Jan 2011 | US |
| Child | 14307288 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | 12839785 | Jul 2010 | US |
| Child | 13010475 | US |
