The disclosed embodiments relate to methods and apparatus for controlling electrolyte hydrodynamics during electroplating. More particularly, methods and apparatus described herein are particularly useful for plating metals onto semiconductor wafer substrates, especially those having a plurality of recessed features.
In semiconductor device fabrication, deposition and etching techniques are used for forming patterns of materials, such as for forming metal lines embedded in dielectric layers. Electrochemical deposition processes are well-established in modern integrated circuit fabrication. The transition from aluminum to copper metal line interconnections in the early years of the twenty-first century drove a need for increasingly sophisticated electrodeposition processes and plating tools. Much of the sophistication evolved in response to the need for ever smaller current carrying lines in device metallization layers. These copper lines are formed by electroplating metal into very thin, high-aspect ratio trenches and vias in a methodology commonly referred to as “damascene” processing (pre-passivation metallization).
Electrochemical deposition is now poised to fill a commercial need for sophisticated packaging and multichip interconnection technologies known generally and colloquially as wafer level packaging (WLP) and through silicon via (TSV) electrical connection technology. These technologies present their own very significant challenges due in part to the generally larger feature sizes (compared to Front End of Line (FEOL) interconnects) and high aspect ratios.
The background description provided herein is for the purposes of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
In one aspect, an electroplating apparatus is provided. In some embodiments, the electroplating apparatus includes: (a) an electroplating chamber configured to contain an electrolyte and an anode while electroplating metal onto a substrate; (b) a substrate holder configured to hold the substrate such that a plating face of the substrate is separated from the anode during electroplating; and an ionically resistive element. The ionically resistive element includes: (i) a channeled plate adapted to provide ionic transport through the ionically resistive element during electroplating; (ii) a substrate-facing side that is parallel to the plating face of the substrate and separated from the plating face of the substrate by a gap; and (iii) a plurality of ribs positioned on the substrate-facing side of the ionically resistive element, wherein the plurality of ribs comprises a first plurality of ribs of full maximum height and a second plurality of ribs of smaller maximum height than the full maximum height. The electroplating apparatus further includes: an inlet to the gap for introducing cross flowing electrolyte to the gap; and an outlet to the gap for receiving cross flowing electrolyte flowing in the gap, wherein the inlet and outlet are positioned proximate azimuthally opposing perimeter locations on the plating face of the substrate during electroplating.
In some embodiments, the ionically resistive element is positioned such that the second plurality of ribs of smaller maximum height is proximate the inlet to the gap. In some embodiments all ribs are parallel to each other, and are perpendicular to a direction of a flow of the cross flowing electrolyte in the gap. In some embodiments the second plurality of ribs comprises at least two ribs of different maximum heights. In some embodiments the ribs in the second plurality of ribs are arranged such that the maximum rib height increases in a direction from an edge to the center of the ionically resistive plate, and wherein the second plurality of ribs of lower height are disposed only on one side of the ionically resistive element.
In some embodiments, the total number of ribs is between about 15 and about 30, and the second plurality of ribs of lower maximum height has between about 2 and about 10 ribs. In some embodiments the full maximum height of the ribs is less than about 5 mm. For example, in some embodiments the full maximum height of the ribs is about 1-3 mm. In some embodiments, the gap between the bottom portion of the substrate holder and the ionically resistive element is less than about 20 mm.
In some embodiments, at least some of the ribs have variable height. In some embodiments, at least some of the ribs have variable height, and rib height in a rib having variable height, decreases gradually in a direction toward an edge of the rib.
In some embodiments, the ionically resistive element includes a region, where rib height is lower than the full maximum height, and wherein the region is generally crescent-shaped. In some implementations this region is located proximate either the inlet or the outlet from the gap.
In some embodiments, the ionically resistive element includes a region, where rib height is lower than the full maximum height, and where the region is generally ring-shaped. In some embodiments, the ionically resistive element includes a region where rib height is lower than the full maximum height, and where the region has a martini glass shape.
In some embodiments, the ionically resistive element includes a plurality of non-communicating channels. In other embodiments, the ionically resistive element includes a three-dimensional network of communicating channels.
In some embodiments, the electroplating apparatus further includes a cross flow injection manifold fluidically coupled to the inlet. In some implementations, the cross flow injection manifold is at least partially defined by a cavity in the ionically resistive element. In some embodiments, the electroplating apparatus further includes a flow confinement ring positioned over a peripheral portion of the ionically resistive element. In some embodiments, the inlet spans an arc between about 90-180° proximate the perimeter of the plating face of the substrate.
In another aspect, an ionically resistive plate for use in an electroplating apparatus is provided, where the resistive plate may be adapted to plate material on a semiconductor wafer of a standard diameter, In some embodiments, the plate includes: a circular portion that has a plurality of channels that is coextensive with a plating face of the semiconductor wafer, wherein the plate has a thickness between about 2-25 mm; and a plurality of ribs extending from the circular portion, wherein the plurality of ribs comprises a first plurality of ribs of full maximum height and a second plurality of ribs of smaller maximum height than the full maximum height.
In another aspect, a method for electroplating a substrate is provided. In some embodiments, the method includes: (a) receiving a substrate in a substrate holder, wherein a plating face of the substrate is exposed, and wherein the substrate holder is configured to hold the substrate such that the plating face of the substrate is separated from an anode during electroplating; (b) immersing the substrate in an electrolyte, wherein a gap is formed between the plating face of the substrate and an ionically resistive element plane, wherein the ionically resistive element is at least about coextensive with the plating face of the substrate, wherein the ionically resistive element comprises a channeled plate adapted to provide ionic transport through the ionically resistive element during electroplating, and wherein the ionically resistive element includes a plurality of ribs positioned on the substrate-facing side of the ionically resistive element, wherein the plurality of ribs includes a first plurality of ribs of full maximum height and a second plurality of ribs of smaller maximum height than the full maximum height; (c) flowing electrolyte in contact with the substrate in the substrate holder from a side inlet, into the gap, and out a side outlet, wherein the side inlet and side outlet are designed or configured to generate cross flowing electrolyte in the gap during electroplating; (d) rotating the substrate holder; and (e) electroplating material onto the plating face of the substrate while flowing the electrolyte as in (c).
In some embodiments, the electroplated material includes tin and silver. In some embodiments, the electroplated material includes copper.
In some embodiments the electrodepositions methods provided herein are used in conjunction with photolithographic patterning, and provided methods further include the steps of applying photoresist to the semiconductor substrate; exposing the photoresist to light; patterning the photoresist and transferring the pattern to the semiconductor substrate; and selectively removing the photoresist from the semiconductor substrate.
In another aspect, a non-transitory computer machine-readable medium is provided, where the non-transitory computer machine-readable medium includes program instructions for control of an apparatus configured for substrate processing, wherein the program instructions comprise code configured to effect electrodeposition of material in accordance with the methods provided herein.
These and other aspects of implementations of the subject matter described in this specification are set forth in the accompanying drawings and the description below.
Methods and apparatuses for electrodeposition of a metal on a semiconductor substrate with improved control over electrolyte hydrodynamics are provided. Due to greater control over electrolyte hydrodynamics, uniformity of electrodeposition can be improved. The methods are particularly useful for electroplating metal onto a semiconductor substrate having a plurality of recessed features. For example, provided methods can be used to fill recessed features, e.g., in WLP processing. The methods make use of an ionically resistive ionically permeable element, which includes an ionically permeable channeled plate and a plurality of ribs extending from the substrate-facing surface of the plate toward the substrate, where ribs have different maximum heights, or where individual ribs have variable heights (e.g. tapered ribs), or both. In some embodiments the electrolyte is injected into a gap between the ionically resistive element and the surface of the substrate, creating electrolyte cross-flow (lateral electrolyte flow parallel to the surface of the substrate). In some embodiments, the ribs (referring to “length” dimension of the ribs) are substantially perpendicular to electrolyte cross-flow direction. In one implementation the ribs proximate the inlet to the gap (e.g., within 50 mm of the inlet) have lower maximum height than ribs further away from the inlet. For example, the ionically resistive element may include a first rib (or a first plurality of ribs) and a second rib (or a second plurality of ribs), where the ionically resistive element is positioned such that the first rib (or a first plurality of ribs) is closer to the inlet to the gap than the second rib (or the second plurality of ribs) and where the first rib (or a first plurality of ribs) has a smaller maximum height than the second rib (or the second plurality of ribs). In some embodiments maximum rib height increases gradually in a direction from the edge of the element towards the center of the element.
In some embodiments the ionically resistive element has ribs of various sizes distributed in a spatially non-uniform pattern. This produces tailored convection at a substrate surface for improved plating performance. By tailoring the rib height, tapering, and distributing the ribs at certain locations across the ionically resistive element, the hydrodynamics at the wafer surface can be modulated to improve plating performance.
The term “a metal” as used herein, refers to one or more metals, and “electrodeposition of a metal” is not limited to electrodeposition of a single metal. For example, “a metal” can be a combination of tin and silver. In some embodiments, the methods are used for electrodeposition of copper (Cu). In some embodiments, the methods are used for electrodeposition of nickel (Ni), tin (Sn), or tin silver alloy (SnAg).
The term “semiconductor substrate” as used herein refers to a substrate at any stage of semiconductor device fabrication containing a semiconductor material anywhere within its structure. It is understood that the semiconductor material in the semiconductor substrate does not need to be exposed. Semiconductor wafers having a plurality of layers of other materials (e.g., dielectrics) covering the semiconductor material, are examples of semiconductor substrates. The following detailed description assumes the disclosed implementations are implemented on a semiconductor wafer, such as on a 200 mm, 300 mm, or 450 mm semiconductor wafer. However, the disclosed implementations are not so limited. The work piece may be of various shapes, sizes, and materials. In addition to semiconductor wafers, other work pieces that may take advantage of the disclosed implementations include various articles such as printed circuit boards and the like.
The term “about” when used in reference to numerical values includes a range of ±10% of the recited numerical value, unless otherwise specified.
The term “ribs” refer to protrusions on the substrate-facing side of the ionically resistive ionically permeable element. The ribs in many embodiments have length to height ratios of greater at least 3:1. The rib lengths are usually at least coextensive with the channeled portion of the ionically resistive ionically permeable element. In some embodiments the ionically resistive ionically permeable element is machined from a single piece of a non-conductive material, e.g., polycarbonate. In other embodiments, the ribs may be removeable and may be inserted into slots on the channeled portion of the ionically resistive element.
The terms “ionically resistive element”, “ionically resistive ionically permeable element”, and “channeled ionically resistive plate” are used herein interchangeably and refer to an element that is made of an electrically non-conductive material that has a plurality of channels that allow for passage of electrolyte. The element in some embodiments introduces a resistance to the ionic current between the anode and the cathodically biased wafer substrate.
The term “maximum height” refers to the greatest height of a rib. For example, a rib that is tapered at the edges will have maximum height outside of the tapered region. If a rib has a constant height, its maximum height is equal to its constant height. The term “full maximum height” for a plurality of ribs refers to the greatest maximum height of a plurality of ribs. For example is a plurality of ribs has a plurality of ribs, where each rib has a maximum height of 5 mm, and a plurality of ribs where each rib has a maximum height of 3 mm, the “full maximum height” will be 5 mm.
Provided methods make use of a channeled ionically resistive plate (CIRP), which is also referred to as ionically resistive ionically permeable element to control electrolyte hydrodynamics proximate the substrate. CIRP provides a small channel (a cross flow manifold) between the plating surface of the wafer substrate and the top of the CIRP. The CIRP can serve many functions, which may include at least one of 1) allowing ionic current to flow from an anode generally located below the CIRP and to the wafer, 2) allowing fluid to flow through the CIRP upwards and generally towards the wafer surface and 3) confining and resisting the flow of electrolyte away from and out of the cross flow manifold region. The electrolyte flow in the cross flow manifold region in some embodiments is comprised of fluid that comes up through holes in the CIRP as well as fluid that comes in from a cross flow injection manifold, typically located on the CIRP and to one side of the wafer, which creates transverse electrolyte flow. In certain embodiments, the apparatus is configured to operate under conditions that produce an average transverse electrolyte velocity of about 3 cm/sec or greater (e.g., about 5 cm/s or greater, about 10 cm/s or greater, about 15 cm/s or greater, or about 20 cm/s or greater) across the center point of the plating face of the substrate.
When CIRP with uniform rib elements (thin protrusions of same height) is used, it should provide uniform flow disturbance across the CIRP. However, in some cases inlet or outlet effects can interact with the rib elements, creating a highly turbulent zone, leading to non-uniform plating performance. According to some embodiments provided herein, spatially distributing the ribs can counteract and minimize inlet/outlet turbulence and produce a more uniformly plated substrate.
In one aspect, an electroplating apparatus is provided, where the electroplating apparatus includes: (a) an electroplating chamber configured to contain an electrolyte and an anode while electroplating metal onto a substrate; (b) a substrate holder configured to hold the substrate such that a plating face of the substrate is separated from the anode during electroplating; and an ionically resistive ionically permeable element positioned such that there is a gap between a working surface of the substrate and a substrate-facing surface of the element. The ionically resistive element includes a channeled plate adapted to provide ionic transport through the ionically resistive element during electroplating; a substrate-facing side that is parallel to the plating face of the substrate and separated from the plating face of the substrate by a gap; and a plurality of ribs positioned on the substrate-facing side of the ionically resistive element, wherein the plurality of ribs comprises a first plurality of ribs of full maximum height and a second plurality of ribs of smaller maximum height than the full maximum height. In some embodiments, the apparatus further includes an inlet to the gap for introducing cross flowing electrolyte to the gap; and an outlet to the gap for receiving cross flowing electrolyte flowing in the gap, wherein the inlet and outlet are positioned proximate azimuthally opposing perimeter locations on the plating face of the substrate during electroplating.
The non-uniform ribs on the ionically resistive ionically permeable element are used to tailor the hydrodynamic environment at the substrate, by adjusting convection of electrolyte in the gap (also known as cross-flow manifold or CIRP chamber).
An example of an electroplating apparatus 100 having a CIRP 101 with ribs of different maximum heights, as described above, is shown in
The flow path for delivering cross flowing electrolyte begins in a vertically upward direction as it passes through the cross flow feed channel in the plate. Next, this flow path enters a cross flow injection manifold formed within the body of the channeled ionically resistive plate. The cross flow injection manifold is an azimuthal cavity which may be a dug out channel within the plate that can distribute the fluid from the various individual feed channels (e.g., from each of 6 individual cross flow feed channels) to the various multiple flow distribution holes of a cross flow showerhead plate. This cross flow injection manifold may be located along an angular section of the peripheral or edge region of the channeled ionically resistive plate 101. In certain embodiments, the cross flow injection manifold forms a C-shaped structure over an angle of about 90-180° of the plate's perimeter region. The details of the cross-flow injection manifold are not shown in
It is understood that the depiction of apparatus in
In some embodiments the full maximum height of the ribs is less than about 5 mm, such as between about 1-3 mm. In some embodiments, the total number of ribs is between about 15-30, and the number of ribs of lower maximum height than the full maximum height is between about 2-10 ribs.
It is noted that in the depicted embodiment the use of lower rib heights proximate the electrolyte inlet 117 is associated with marked decrease in turbulence as compared to a CIRP having all ribs of same maximum heights. The decrease in turbulence, in turn, leads to improved plating uniformity. Further in those embodiments where tin and silver are electroplated concurrently the use of the CIRP as shown in
In various cases, the CIRP is a disc made of a solid, non-porous dielectric material that is ionically and electrically resistive. The material is also chemically stable in the plating solution of use. In certain cases the CIRP is made of a ceramic material (e.g., aluminum oxide, stannic oxide, titanium oxide, or mixtures of metal oxides) or a plastic material (e.g., polyethylene, polypropylene, polyvinylidene difluoride (PVDF), polytetrafluoroethylene, polysulphone, polyvinyl chloride (PVC), polycarbonate, and the like), having between about 6,000-12,000 non-communicating through-holes. The channeled portion of the disc, in many embodiments, is at least substantially coextensive with the plating surface of the wafer (e.g., the CIRP disc has a diameter of about 300 mm when used with a 300 mm wafer) and resides in close proximity to the wafer, e.g., just below the wafer in a wafer-facing-down electroplating apparatus. Preferably, the plated surface of the wafer resides within about 20 mm, more preferably within about 5 mm of the closest CIRP surface.
Another feature of the CIRP is the diameter or principal dimension of the through-holes and its relation to the distance between the CIRP and the substrate. In certain embodiments, the diameter of each through-hole (or of a majority of through-holes, or the average diameter of the through-holes) is no more than about the distance from the plated wafer surface to the closest surface of the CIRP. Thus, in such embodiments, the diameter or principal dimension of the through-holes should not exceed about 5 mm, when the CIRP is placed within about 5 mm of the plated wafer surface.
As above, the overall ionic and flow resistance of the plate is dependent on the thickness of the plate and both the overall porosity (fraction of area available for flow through the plate) and the size/diameter of the holes. Plates of lower porosities will have higher impinging flow velocities and ionic resistances. Comparing plates of the same porosity, one having smaller diameter I-D holes (and therefore a larger number of 1-D holes) will have a more micro-uniform distribution of current on the wafer because there are more individual current sources, which act more as point sources that can spread over the same gap, and will also have a higher total pressure drop (high viscous flow resistance).
In certain cases, however, the ionically resistive plate is porous, as mentioned above. The pores in the plate may not form independent 1-D channels, but may instead form a mesh of through-holes which may or may not interconnect. For example, the plate may include a three-dimensional network of interconnecting channels. It should be understood that as used herein, the terms channeled ionically resistive plate (CIRP) and channeled ionically resistive element are intended to include this embodiment, unless otherwise noted.
Rib Tapering
In some embodiments, individual ribs of the CIRP have variable height, and, for example, may be tapered at the edges. Such tapering can improve electrolyte hydrodynamics at the substrate proximate the rib edges, and can also lead to more uniform electroplating. Rib height variation for individual ribs may be used either alone or in combination with using ribs of different maximum height as discussed above.
The CIRP shown in
The CIRPs with non-uniform ribs can be used to improve electrolyte hydrodynamics and to improve plating uniformity in a variety of other embodiments. They are particularly useful when used in an electroplating apparatus having electrolyte cross flow between an inlet and outlet in the cross flow manifold. A number of CIRP embodiments are illustrated in
In another aspect, a method for electroplating a metal on a substrate is provided, where the method includes: (a) receiving a substrate in a substrate holder, wherein a plating face of the substrate is exposed, and wherein the substrate holder is configured to hold the substrate such that the plating face of the substrate is separated from an anode during electroplating; (b) immersing the substrate in an electrolyte, wherein a gap is formed between the plating face of the substrate and an ionically resistive element plane, wherein the ionically resistive element is at least about coextensive with the plating face of the substrate, wherein the ionically resistive element comprises a channeled plate adapted to provide ionic transport through the ionically resistive element during electroplating, and wherein the ionically resistive element comprises a plurality of ribs positioned on the substrate-facing side of the ionically resistive element, wherein the plurality of ribs comprises a first plurality of ribs of full maximum height and a second plurality of ribs of smaller maximum height than the full maximum height. The method further includes: (c) flowing electrolyte in contact with the substrate in the substrate holder (i) from a side inlet, into the gap, and out a side outlet, wherein the side inlet and side outlet are designed or configured to generate cross flowing electrolyte in the gap during electroplating; (d) rotating the substrate holder; and (e) electroplating material onto the plating face of the substrate while flowing the electrolyte as in (c).
In another aspect an ionically resistive plate for use in an electroplating apparatus to plate material on a semiconductor wafer of standard diameter is provided, comprising: a circular portion that has a plurality of channels that is coextensive with a plating face of the semiconductor wafer, wherein the plate has a thickness between about 2-25 mm; and a plurality of ribs extending from the circular portion, wherein the plurality of ribs comprises a first plurality of ribs of full maximum height and a second plurality of ribs of smaller maximum height than the full maximum height. In some embodiments full maximum rib height is about 5 mm or less, such as about 3 mm or less.
The deposition methods described herein can be carried out in a variety of electroplating apparatuses that are configured to include provided CIRPs.
A suitable apparatus for deposition of a metal includes a plating chamber configured for holding an electrolyte and an anode, and a substrate holder having contacts for cathodically biasing the substrate. The apparatus may be configured for rotating the substrate during electroplating. Deposition can be conducted in a face-up or a face-down orientation. Some plating tools may be also run vertically. An example of a suitable apparatus is a SABRE 3D tool available from Lam Research Corp. of Fremont, CA. In some embodiments the electroplating tool includes multiple plating cells (for electrodepositing identical or different metals), where at least one plating cell includes a CIRP with non-uniform ribs as described herein, and a robotic tool for transferring the substrate between the individual plating cells. In some embodiments the apparatus further includes a controller that includes program instructions for causing performance of any of the methods described herein.
An integrated apparatus configured for electrodeposition of metals is illustrated in
The system controller will typically include one or more memory devices and one or more processors configured to execute the instructions so that the apparatus will perform a method in accordance with the present invention. Machine-readable media containing instructions for controlling process operations in accordance with the present invention may be coupled to the system controller.
In some implementations, a controller is part of a system, which may be part of the above-described examples. Such systems can include semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform or platforms for processing, and/or specific processing components (a wafer pedestal, a gas flow system, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after processing of a semiconductor wafer or substrate. The electronics may be referred to as the “controller,” which may control various components or subparts of the system or systems. The controller, depending on the processing requirements and/or the type of system, may be programmed to control any of the processes disclosed herein, including the delivery of electrolytes, temperature settings (e.g., heating and/or cooling), voltage delivered to the cathode, wafer transfers into and out of a tool and other transfer tools and/or load locks connected to or interfaced with a specific system.
Broadly speaking, the controller may be defined as electronics having various integrated circuits, logic, memory, and/or software that receive instructions, issue instructions, control operation, enable cleaning operations, enable endpoint measurements, and the like. The integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and/or one or more microprocessors, or microcontrollers that execute program instructions (e.g., software). Program instructions may be instructions communicated to the controller in the form of various individual settings (or program files), defining operational parameters for carrying out a particular process on or for a semiconductor wafer or to a system. The operational parameters may, in some embodiments, be part of a recipe defined by process engineers to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and/or dies of a wafer.
The controller, in some implementations, may be a part of or coupled to a computer that is integrated with, coupled to the system, otherwise networked to the system, or a combination thereof. For example, the controller may be in the “cloud” or all or a part of a fab host computer system, which can allow for remote access of the wafer processing. The computer may enable remote access to the system to monitor current progress of fabrication operations, examine a history of past fabrication operations, examine trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing steps to follow a current processing, or to start a new process. In some examples, a remote computer (e.g. a server) can provide process recipes to a system over a network, which may include a local network or the Internet. The remote computer may include a user interface that enables entry or programming of parameters and/or settings, which are then communicated to the system from the remote computer. In some examples, the controller receives instructions in the form of data, which specify parameters for each of the processing steps to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type of tool that the controller is configured to interface with or control. Thus as described above, the controller may be distributed, such as by comprising one or more discrete controllers that are networked together and working towards a common purpose, such as the processes and controls described herein. An example of a distributed controller for such purposes would be one or more integrated circuits on a chamber in communication with one or more integrated circuits located remotely (such as at the platform level or as part of a remote computer) that combine to control a process on the chamber.
Without limitation, example systems may include a plasma etch chamber or module, a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a clean chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an atomic layer deposition (ALD) chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing systems that may be associated or used in the fabrication and/or manufacturing of semiconductor wafers.
As noted above, depending on the process step or steps to be performed by the tool, the controller might communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout a factory, a main computer, another controller, or tools used in material transport that bring containers of wafers to and from tool locations and/or load ports in a semiconductor manufacturing factory.
The apparatus/process described hereinabove may be used in conjunction with lithographic patterning tools or processes, for example, for the fabrication or manufacture of semiconductor devices, displays, LEDs, photovoltaic panels and the like. Typically, though not necessarily, such tools/processes will be used or conducted together in a common fabrication facility. Lithographic patterning of a film typically comprises some or all of the following steps, each step enabled with a number of possible tools: (1) application of photoresist on a workpiece, i.e., substrate, using a spin-on or spray-on tool; (2) curing of photoresist using a hot plate or furnace or UV curing tool; (3) exposing the photoresist to visible or UV or EUV or x-ray light with a tool such as a wafer stepper; (4) developing the resist so as to selectively remove resist and thereby pattern it using a tool such as a wet bench; (5) transferring the resist pattern into an underlying film or workpiece by using a dry or plasma-assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper.
A PCT Request Form is filed concurrently with this specification as part of the present application Each application that the present application claims benefit of or priority to as identified in the concurrently filed PCT Request Form is incorporated by reference herein in its entirety and for all purposes.
Filing Document | Filing Date | Country | Kind |
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PCT/US2022/012969 | 1/19/2022 | WO |
Number | Date | Country | |
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63199896 | Feb 2021 | US |