Static induction type thyristor

Abstract

In a static induction type thyristor comprising a low impurity concentration channel region having opposed first and second major surfaces, a first main electrode region having one conductivity type and a second main electrode region having another conductivity type opposite to the one conductivity type and provided on the first and second major surfaces, respectively, and a gate region provided in the vicinity of the first main electrode region, there intervenes, between the channel region and the second main electrode region, a thin layer region having the same conductivity type as that of first main electrode region. The provision of this thin layer reegion contributes to allowing a markedly low impurity concentration as well as a decreased thickness of the channel region for a given maximum forward blocking voltage, making it feasible to obtain a high maximum forward blocking voltage and a high switching speed.

Description

Claims

1. A static induction type thyristor comprising:

a semiconductor channel region of a substantially uniform low impurity concentration having opposed major surfaces;

a first main electrode means comprising a first high impurity concentration semiconductor region having a first conductivity type formed adjacent to one of said major surfaces of the channel region;

a thin layer region having an impurity concentration higher than that of said channel region and a thickness much smaller than that of the channel region and made with a semiconductor of said first conductivity type and formed on the other major surface of the channel region;

a substantially flat second main electrode means comprising:

a second highly-doped semiconductor region having a second conductivity type opposite to said first conductivity type and a third highly-doped semiconductor region having the first conductivity type, and a conductive electrode formed on said second and third semiconductor region;

the second and third semiconductor regions being formed on that side of said thin layer region located opposite to the side adjacent to said channel region, the impurity concentration of said second and third semiconductor regions being much higher than that of said thin layer region;

said second and third semiconductor regions being disposed in alternate fashion on that side of said thin layer region located opposite to the side adjacent to said channel region, and said third semiconductor region having an area smaller than that of said second semiconductor region on said that side of said thin layer region;

a highly-doped gate region having said second conductivity type and provided adjacent to said channel region in the vicinity of said first semiconductor region and at such site that at least one current channel for those carriers supplied from said first semiconductor region and said second semiconductor region is formed in that portion of said channel region which is surrounded substantially by said gate region;

said second semiconductor region being formed at a location facing said first semiconductor region; and

said third semiconductor region being formed at a location facing said gate region.

2. A static induction type thyristor according to claim 1, in which:

said thin layer region has an impurity concentration at least one order of magnitude higher than said predetermined low impurity concentration in said channel region.

3. A static induction type thyristor according to claim 1, in which:

said thin layer region has an impurity concentration at least two orders of magnitude higher than said predetermined low impurity concentration in said channel region.

4. A static induction type thyristor according to claim 1, in which:

said channel region has the same conductivity type as that of the first semiconductor region, and is made with a semiconductor having a substantially lower impurity concentration than that of said first main electrode region.

5. A static induction type thyristor according to claim 1, in which:

said predetermined low impurity concentration of said channel region is selected lower than 1.times.10.sup.16 atoms/cm.sup.3.

6. A static induction type thyristor according to claim 1, in which:

said predetermined low impurity concentration of said channel region is selected in a range between 1.times.10.sup.12 atoms/cm.sup.3 and 1.times.10.sup.15 atoms/cm.sup.3.

7. A static induction type thyristor according to claim 1, in which:

said thin layer region has an impurity concentration at least one order of magnitude higher than said predetermined low impurity concentration of said channel region.

8. A static induction type thyristor according to claim 1, in which:

said impurity concentration of said thin layer region is at least one order of magnitude lower than that of said first semiconductor region.

9. A static induction type thyristor according to claim 1, in which:

said impurity concentration of said thin layer region is at least two orders of magnitude lower than that of said first semiconductor region.

10. A static induction type thyristor according to claim 1, in which:

said thin layer region has a thickness much smaller than that of said another portion of said channel region.

11. A static induction type thyristor according to claim 1, in which:

said current channel defined by said gate regions has a length smaller than that of said another portion of said channel region.

12. A static induction type thyristor according to claim 1, in which:

said gate region is formed so that:

a surface of said first semiconductor region, and surface of said gate region, are positioned on a same substantially flat surface parallel with said thin layer region; and further that:

those end portions of the gate region located closer to the thin layer region extend toward the thin layer region beyond the end portion of the first semiconductor region.

13. A static induction type thyristor according to claim 1, in which:

said gate region is formed so that:

surfaces of the gate region are positioned closer to said thin layer region than surfaces of said first semiconductor region; and

those end portions of said gate region located closer to said thin layer region are positioned toward the thin layer region beyond that end portion of the first semiconductor region located closer to this thin layer region.

14. A static induction type thyristor according to claim 1, in which:

said channel region contains a certain concentration of a substance having a killer effect for charge carriers.

15. A static induction type thyristor according to claim 1, in which:

said substance having a killer effect is at least one selected from a group consisting of Au, Cu, and Ni.

16. A static induction type thyristor according to claim 1, in which:

said first main electrode means is provided in a plural number, and they are coupled together by another common conductive electrode.

17. A static induction type thyristor according to claim 1, in which:

said thin layer region (15) has impurity concentration N.sub.D2 and thickness l.sub.3, said channel region (12) has impurity concentration N.sub.D1 and thickness l.sub.2, and wherein said impurity concentrations and thicknesses are defined by the relationship: ##EQU7## where V.sub.Bmax is a maximum blocking voltage, E.sub.qs is an electric field intensity in the vicinity of the gate region, q is an electron charge, and .epsilon. is a dielectric constant of the semiconductor region of said thyristor.

18. A static induction type thyristor according to claim 1, in which:

said gate regions (14) and said cathode regions (13) have insulation means interposed therebetween to form a separation barrier on said major surface of said substrate whereby to maintain sufficient cathode-to-gate breakdown voltage at a relatively high forward blocking voltage of said thyristor.