Claims
- 1. A process for forming an electrical interconnect line in a semiconductor device comprising the steps of:providing a substrate; depositing a first layer of AlxTiyNz thereon, wherein x, y, and z are numbers >0 and <1; depositing a layer of aluminum metal onto said first layer of AlxTiyNz; and depositing a second layer of AlxTiyNz onto said aluminum metal layer.
- 2. A process as claimed in claim 1 in which said substrate comprises silicon or silicon oxide.
- 3. A process as claimed in claim 1 in which x is from about 0.45-0.50, y is about 0.15, and z is from about 0.35-0.40.
- 4. A process as claimed in claim 1 in which said layers are deposited by sputtering.
- 5. A process as claimed in claim 1 in which said first and second layers of AlxTiyNz are between about 100 to about 800 Å thick.
- 6. A process as claimed in claim 1 in which said layer of aluminum is from about 500 to about 5000 Å thick.
- 7. A process for suppressing hillock formation in an aluminum interconnect line in a semiconductor device comprising the steps of:providing a silicon substrate; sputter depositing a first layer of AlxTiyNz onto said silicon substrate, wherein x, y, and z are numbers >0 and <1 and; depositing a layer of aluminum metal onto said layer of AlxTiyNz; sputter depositing a second layer of AlxTiyNz over said aluminum metal; and heating said silicon substrate to a temperature greater than about 300° C., whereby said second layer of AlxTiyNz acts as a cap layer to suppress hillock formation in said aluminum layer.
- 8. A process as claimed in claim 7 in which x is from about 0.45-0.50, y is about 0.15, and z is from about 0.35-0.40.
- 9. A process as claimed in claim 7 in which said first and second layers of AlxTiyNz are between about 100 to about 800 Å thick.
- 10. A process as claimed in claim 7 in which said layer of aluminum is from about 500 to about 5000 Å thick.
- 11. A method for fabricating a field emission device comprising the steps of:providing a substrate; forming a cathode on said substrate by depositing a first layer of AlxTiyNz onto said substrate, wherein x, y, and z are numbers >0 and <1 ; depositing a layer of aluminum metal onto said first layer of AlxTiyNz; and depositing a second layer of AlxTiyNz onto said aluminum metal layer; forming a dielectric layer on said cathode and a gate on said dielectric layer, said dielectric layer and said gate including at least one opening therein, and; forming an emitter on said cathode, said emitter extending through said at least one opening.
- 12. A method as claimed in claim 11 in which said substrate comprises glass.
- 13. A process as claimed in claim 11 in which x is from about 0.45-0.50, y is about 0.15, and z is from about 0.35-0.40.
- 14. A process as claimed in claim 11 in which said layers are deposited by sputtering.
- 15. A process as claimed in claim 11 in which said first and second layers of AlxTiyNz are between about 100 to about 800 Å thick.
- 16. A process as claimed in claim 11 in which said layer of aluminum is from about 500 to about 5000 Å thick.
CROSS REFERENCE TO RELATED APPLICATIONS
This application is a division of U.S. patent application Ser. No. 09/387,133, filed Aug. 31, 1999 now U.S. Pat. No. 6,140,701.
Government Interests
This invention was made with Government support under Contract No. DABT 63-97-C-0001 awarded by the Advanced Research Projects Agency (ARPA). The Government has certain rights in this invention.
US Referenced Citations (11)