Patent Grant
10843920
The present application relates to suspended microelectromechanical system (MEMS) devices and methods for fabricating such devices.
A MEMS device can be produced to have a structure that is suspended over a cavity. For example, a MEMS resonator can be produced to include a stack of patterned layers of materials suspended by tethers above a cavity in a substrate. The stack may include electrode layers, dielectric layers, a layer of a piezoelectric material, and other layers that are patterned and that may be required for an operational resonator. A MEMS resonator may be incorporated in a variety of devices, such as oscillators, mass sensors, gyros, accelerometers, and switches, for example, and may be used in a variety of applications that require accuracy and predictability, such as frequency and timing applications, signal filtering applications, and motion sensing applications, for example.
A MEMS device is provided that includes a substrate having a dielectric cavity formed therein and a movable electromechanical device suspended in the dielectric cavity. The dielectric cavity includes a substantially planar bottom surface and at least one sidewall surface extending substantially perpendicularly from the bottom surface. The movable electromechanical device is suspended in the dielectric cavity such that the movable electromechanical device is spaced apart from the bottom surface and the at least one sidewall surface of the dielectric cavity. The bottom surface of the cavity and each of the at least one sidewall surface of the cavity meet at a rectilinear corner.
Aspects of the present application provide MEMS resonator structures that facilitate stable operation at a known and desired frequency. In this regard, temperature stability and mechanical stability are factors that may be taken into consideration for MEMS resonators and techniques for fabricating MEMS resonators. Aspects of the present application provided suspended MEMS resonators which are suspended in a substrate above a cavity of precisely controlled dimensions.
Suspended MEMS devices are described, in which the MEMS devices may each include a stack of patterned layers of materials suspended over a cavity. Each suspended MEMS device may be produced by forming the stack, which may include one or more electrode layers and an active layer, over a multilayer substrate. Part of the multilayer substrate then is removed from underneath the stack to form the cavity. Each suspended MEMS device may include at least one trench that extends vertically from an upper surface of the stack to the cavity. Each trench may include at least one trench sidewall and at least one stack sidewall. Each of the sidewalls may be formed of a dielectric material (e.g., an oxide) that serves as a dielectric spacer. The cavity may have rectilinear corners, and also may have substantially planar surfaces that give rise to linear cross-sectional profiles. The cavity may have at least one portion that extends laterally below and beyond the at least one trench sidewall to form at least one undercut region. The manner of fabrication of the suspended MEMS devices may allow for forming the cavities to have a high degree of reproducibility in size and shape, and thus may allow, for example, a MEMS resonator that vibrates stably at a known and desired frequency to be formed reproducibly.
According to an aspect of the present technology, a MEMS device is provided that may include a substrate having a dielectric cavity formed therein, and a movable electromechanical device suspended in the dielectric cavity. The cavity may include a substantially planar bottom surface and at least one sidewall surface extending substantially perpendicularly from the bottom surface. The electromechanical device may be spaced apart from the bottom and sidewall surfaces of the cavity. The bottom and each sidewall surface of the cavity may meet at a rectilinear corner. The dielectric cavity may completely surround bottom and side surfaces of the electromechanical device. The bottom and sidewall surfaces of the cavity may be formed of silicon oxide. The electromechanical device may be a resonator.
According to another aspect of the present technology, a MEMS device is provided that may include a substrate having a cavity formed therein, and a movable electromechanical device suspended in the cavity. The cavity may include a bottom surface, at least one sidewall surface extending substantially perpendicularly from the bottom surface, and an open top. A dielectric material may cover the bottom surface and each sidewall surface of the cavity. The movable electromechanical device, which is suspended above the bottom surface through the open top, may include bottom and side portions facing the dielectric material of the bottom and sidewall surfaces, respectively. The bottom surface of the cavity may have a substantially linear cross-sectional profile, and each sidewall surface of the cavity may have a substantially linear cross-sectional profile, such that the bottom surface and each sidewall surface meet at a rectilinear corner. The dielectric material may be silicon oxide, and the electromechanical device may be a resonator.
According to another aspect of the present technology, a method of forming a MEMS device is provided. According to the method, a substrate is provided that includes: a base layer, a sacrificial layer, a first dielectric layer positioned on a first side of the sacrificial layer and sandwiched between the base layer and the sacrificial layer, a second dielectric layer positioned on a second side of the sacrificial layer, an etchstop formed of a dielectric material and having a substantially vertical wall that extends between the first dielectric layer and the second dielectric layer, and an active layer covering a surface of the second dielectric layer. A movable electromechanical device is formed using the active layer and is isolated with an confinement trench that extends from a surface of the electromechanical device to an interface between the second dielectric layer and the sacrificial layer. The confinement trench may have vertical sidewalls formed of a dielectric material. A portion of the sacrificial layer between the electromechanical device and the first dielectric layer may be removed to form a dielectric cavity surrounding the electromechanical device. The cavity may include a bottom and a sidewall, with the bottom of the cavity corresponding to a portion of the first dielectric layer, and with the sidewall of the cavity corresponding to the etchstop. The bottom of the cavity may have a substantially linear cross-sectional profile, and the sidewall of the cavity may have a substantially linear cross-sectional profile, such that the bottom of the cavity and the sidewall of the cavity may form a rectilinear corner. The sacrificial layer may be formed of silicon, and the bottom of the cavity and the sidewall of the cavity may be formed of silicon oxide.
According to an aspect of the present technology, a dielectric cavity in a semiconductor material is provided. The cavity may have rectilinear corners, and walls of the cavity may be substantially planar and may be formed of a dielectric material. The cavity may be structured to accommodate a movable device therein. For example, the movable device may be an electromechanical device that is suspended in the cavity, such that the electromechanical device does not contact a bottom surface of the cavity, and such that side and bottom surfaces of the electromechanical device are surrounded by the dielectric material of the cavity. The cavity may be formed by an etching process after the electromechanical device is fabricated, in which the dielectric material forming the walls of the cavity serve as etch stops in the etching process. The cavity may be a silicon oxide cavity, and the microelectromechanical device may be a MEMS resonator that is suspended in the cavity by at least one tether.
According to another aspect of the present technology, a suspended MEMS device is provided. The MEMS device may include a stack of layers including a bottom dielectric layer having a bottom surface positioned above a cavity in a multilayer substrate; a bottom electrode layer positioned above the bottom dielectric layer; an upper electrode layer positioned above the bottom electrode layer; an active layer positioned between the bottom electrode layer and the top electrode layer. The MEMS device also may include at least one trench surrounding the stack and extending substantially vertically from an upper surface of the stack to a cavity below the stack. Each trench may include at least one trench sidewall formed of a dielectric material. Each trench sidewall faces a stack sidewall, which also may be formed of a dielectric material. Surfaces of the cavity may be formed of a dielectric material. The cavity may have rectilinear corners and a planar bottom surface. Surfaces of the cavity may have linear (i.e., substantially straight or non-curved) profiles when viewed in cross section. Portions of the cavity may extend laterally below and beyond the at least one trench sidewall to form at least one undercut region.
According to another aspect of the present technology, a method for forming a suspended MEMS device is provided. The method includes providing a multilayer substrate that includes: a base or handle silicon layer, a substrate silicon layer disposed above the handle silicon layer, a first oxide layer sandwiched between the handle silicon layer and the substrate silicon layer, a second oxide layer positioned above the substrate silicon layer, a least one dielectric etchstop each having a wall that extends substantially vertically between the first oxide layer and the second oxide layer, and a polycrystalline silicon (polysilicon) layer positioned above the second oxide layer. The method also includes forming an electronic device that uses the polysilicon layer, which may include one or more sublayers of polysilicon, as a device or active layer. The method further includes confining the electronic device with a trench that extends from a surface of the electronic device to an interface between the second oxide layer and the substrate silicon layer. The trench has at least one substantially vertical trench wall formed of a dielectric material. The method also includes forming a cavity in the multilayer substrate by removing at least a portion of the substrate silicon layer underneath the electronic device, between the electronic device and the first oxide layer. Once formed, the cavity completely surrounds side and bottom surfaces of the electronic device. The surfaces of the cavity facing the electronic device are formed of at least one dielectric material, such that the side and bottom surfaces of the electronic device are completely surrounded by the at least one dielectric material. The cavity includes a bottom corresponding to a portion of the first oxide layer, at least one first sidewall corresponding to the at least one etchstop, and at least one second sidewall corresponding to the at least one trench wall. The bottom surface and the first and second sidewalls of the cavity have substantially linear profiles such that, when viewed in cross section, the cavity has rectilinear corners. Dimensions of the cavity are determined by thicknesses of layers of the MEMS device and the multilayer substrate and by dimensions of masks used in lithographic processes for forming the MEMS device. The cavity's dimensions are not sensitive to an amount of time used to etch or remove material to form the cavity.
Various aspects and embodiments of the application will be described with reference to the following figures. It should be appreciated that the figures are not necessarily drawn to scale. Items appearing in multiple figures are indicated by the same reference numeral in all the figures in which they appear.
Aspects of the present application relate to suspended MEMS structures, such as MEMS resonators, and to fabrication techniques for making such structures. In some embodiments, features of a resonator are defined or formed prior to forming a cavity underneath the resonator, such that the resonator is suspended over the cavity. By forming the features of the resonator before the cavity is formed, it is possible for the features to be formed on surfaces that are more planar or flat than they would be if formed while a cavity is present. That is, if a cavity already is present then a layer formed above the cavity would be supported by one or more layers floating above the cavity. These one or more floating layers may not be flat and rigid but instead may be prone to having undulations or non-planar surface topology caused by, for example, stresses on the one or more floating layers. Such stresses can arise from thermal expansion mismatches of the layers, as well as from flexure of the one or more floating layers while the resonator is being formed. Such stresses may lead to resonators that cannot be fabricated consistently to have reproducible characteristics, and may even lead to defects in the resonator, which could have a negative impact on the resonator's fabrication yield.
The cavity surrounding the resonator has dimensions that are determined by thicknesses of layers of the multilayer substrate and layers of the resonator, positions of etchstops, and process tolerances of lithographic processes used to define a trench surrounding the resonator. Therefore, because the layer thicknesses can be very accurately controlled to be within a few tens of angstroms (Å), sometimes within 5 Å or less, and because the process tolerances can be very accurately controlled to produce patterns having widths within 10 Å, sometimes within 5 Å or less, it is possible to control the cavity's dimensions with a high degree of reproducibility and accuracy. The cavity's dimensions are not determined strictly by an amount of time used to remove or etch cavity material; therefore, dimensional variations caused by etch-rate variations (from one production lot to another production lot) are eliminated. The cavity is formed by selectively etching cavity material (e.g., silicon) and not appreciably etching material that is not cavity material (e.g., silicon oxide), thus making it possible to control with a high degree of accuracy an environment in which the resonator vibrates. This high degree of control over the cavity underlying the resonator enables the resonator to have stable and predictable operating characteristics.
Although the methods discussed below may refer to fabricating a MEMS resonator suspended over a cavity, the methods are applicable to fabricating other suspended devices.
A suspended MEMS device fabricated using the techniques described herein may have one or more physical features resulting from the fabrication process. One such feature is the presence of a spacer formed of a dielectric material (e.g., oxide) on each side of a trench that confines the device and that extends from an upper surface of the device to an underlying cavity.
To form the underlying cavity, cavity material is removed from underneath a stack of layers forming the device. The cavity material may be removed in an etching process that removes a portion of the multilayer substrate horizontally as well as vertically (e.g., an isotropic etch process). By using a boundary material having a significantly lower etch rate than that of the cavity material to define the cavity's boundaries, the boundary material may serve as a physical etch stop that limits further etching and enables the cavity to have corners that are rectilinear, a bottom surface that is substantially planar, and walls that have a linear (i.e., substantially straight) profile when viewed in cross section. Such a cavity is not possible when an isotropic etch process predominantly based on etch time is used.
Each trench 120 may extend from a top surface 126 of the resonator 102 to a bottom surface 132 of the resonator 102. Each of the sidewalls 122, 124 may be oriented substantially vertically relative to the top and bottom surfaces 126, 132 of the resonator 102. A portion of the cavity 104 may extend laterally beneath and beyond each trench sidewall 122 to form at least one undercut region 130.
The cavity 104 may have rectilinear corners 108. Surfaces 110a, 110b, 110c, 122 of the cavity 104 may be formed of a dielectric material (e.g., silicon oxide) and may have linear (i.e., substantially straight) profiles when viewed in cross section. The dielectric material need not be the same for all of the surfaces 110a, 110b, 110c, 122 of the cavity 104.
The bottom surface 132 of the resonator 102 may be devoid of any relief structure, as in the embodiment shown in
In an embodiment of the present technology, a process flow for fabricating a MEMS device of the type shown in
The first field oxide layer 408 may be patterned using standard lithographic techniques known in the art of device fabrication.
Standard photoresist-based lithographic techniques known in the art may be used to form a pattern in the mask layer 410. The pattern in the mask layer 410 then may be transferred to the first field oxide layer 408.
More specifically, the mask layer 410 may be patterned using photoresist to form holes in the mask layer 410 (i.e., a patterned mask layer). After the photoresist is removed, the patterned masked layer 410 is used to etch the first field oxide layer 408 to form at least one preliminary channel 420′ in the first field oxide layer 408, such as shown in
Each portion of the first active layer 404 exposed via the at least one preliminary channel 420′ may be etched to form at least one channel 420 extending through the first active layer 404 to the first dielectric layer 403, as shown in
After removal of the mask layer 410, a structure such as shown in
In one branch of the embodiment, the process flow may extend from
Portions of the first active layer 404 exposed after forming the at least one channel 420 may be covered by a dielectric material, such that dielectric liner layers 426 cover the walls 422 of each channel 420, as shown in
A filler material 428′ may be deposited in the at least one channel 420 and on the first field oxide layer 408 to form a filler layer 428. The filler material 428′ may be planarized to provide the filler layer 428 with a substantially flat upper surface 430, as shown in
A second active layer 440 may be deposited on top of the filler layer 428, as depicted in
In the double SOT structure, the first active layer 404 may be formed of polysilicon and may serve as a device-quality polysilicon layer for an electronic device corresponding to the first SOT structure. The second active layer 440 may be formed of polysilicon and may serve as a device-quality polysilicon layer for an electronic device corresponding to the second SOT structure of the double SOT structure. The polysilicon of the first active layer 404 of the first SOT structure 450 may also serve as a base layer for the second SOT structure 460.
In an embodiment, the double SOT structure formed of the first SOT structure 450 and the second SOT structure 460 may be used advantageously to form electronic devices on two different levels by selectively using the first and second active layers 404, 440.
The at least one channel 420 is depicted in
An intermediary layer 427 may be deposited on the first field oxide layer 408. A second active layer 440 may be deposited on top of the intermediary layer 428′, as depicted in
A substrate having the double SOI structure schematically shown in
A second field oxide layer 502 may be grown or deposited on the second active layer 440 of the multilayer substrate 500, as shown in
The resonator 550 may be isolated or confined by using standard lithographic processes to form at least one trench 554 extending substantially vertically from an upper surface 556 of the cap oxide layer 552 (or an upper surface of the resonator 550 if no cap oxide layer is present) to an upper surface of the first active layer 404, as shown in
Each trench 554 may include a trench sidewall 558 and at least one resonator sidewall 560 located on a side surface of the resonator 550. Each trench sidewall 558 may face a corresponding one of the at least one resonator sidewall 560. Each of the sidewalls 558, 560 may be oriented substantially vertically relative to the upper surface 556 of the cap oxide layer 552 (or the upper surface of the resonator 550 if no cap oxide layer is present). Each trench sidewall 558 and each resonator sidewall 560 is formed of a dielectric material. The dielectric material of the trench sidewall 558 and the dielectric material of the resonator sidewall form vertical spacers that line each trench 554.
A cavity 570 may be formed by removing a portion of the first active layer 404 that extends from underneath the resonator 550 to the at least one liner layer 426, as shown in
In an embodiment, the at least one trench sidewall 558, the at least one resonator sidewall 560, the at least one liner layer 426, the first dielectric layer 403, and the first field oxide layer 408 all may be formed of silicon oxide, and the first active layer 404 may be formed of polysilicon. The polysilicon may be etched selectively without appreciably etching the silicon oxide by using known techniques. For example, XeF2 has a silicon:silicon oxide (Si:SiO2) etch selectivity of over 1000:1, and as a vapor can be transported laterally to reach buried structures (e.g., underneath the resonator 550, under each trench sidewall 558 and into each undercut region 572). Silicon oxide acts as an etch stop and enables the cavity 570 to be formed reproducibly to have known dimensions and a predictable surface topology. That is, as discussed above in connection with
As schematically illustrated in
The at least one undercut region 572 of the cavity 570 may be bounded by an upper surface 580 that corresponds to a lower surface of the first field oxide layer 408 (see
The cavity 570 also may have at least one upper vertical wall 584 corresponding to the trench sidewall 558 (see
In another embodiment of the present technology, a process flow is provided for fabricating a dielectric cavity in a semiconductor material. The cavity may have rectilinear corners, and walls of the cavity may be substantially planar and may be formed of a dielectric material. The cavity may be structured to accommodate a movable device therein. For example, the movable device may be an electromechanical device that is suspended in the cavity, such that the electromechanical device does not contact a bottom surface of the cavity, and such that side and bottom surfaces of the electromechanical device are surrounded by the dielectric material of the cavity. The cavity may be formed by an etching process after the electromechanical device is fabricated, in which the dielectric material forming the walls of the cavity serve as etchstops in the etching process. The cavity may be a silicon oxide cavity, and the electromechanical device may be a MEMS device (e.g., a MEMS resonator) of the type shown in
The sacrificial layer 604 may be patterned using known lithographic techniques to produce at least one through-channel 606 that extends from an upper surface 608 of the sacrificial layer 604 entirely through a thickness of the sacrificial layer 604 to the first dielectric layer 603, as shown schematically in
The upper surface 608 of the sacrificial layer, the at least one through-channel 606, and the recessed portions 610 are covered with a dielectric material forming a projection layer 612. The dielectric material fills the at least one through-channel 606 and the recessed portions 610, as shown in
As depicted in
Subsequently, similar to the discussion above regarding
The resonator 650 may be isolated or confined by using standard lithographic processes to form at least one trench 654 extending substantially vertically from an upper surface 656 of the cap oxide layer 652 (or an upper surface of the resonator 650 if no cap oxide layer is present) to an upper surface of the sacrificial layer 604, as shown in
Each trench 654 may include a trench sidewall 658 and at least one resonator sidewall 660 located on a side surface of the resonator 650. Each trench sidewall 658 may face a corresponding one of the at least one resonator sidewall 660. Each of the sidewalls 658, 660 may be oriented substantially vertically relative to the upper surface 656 of the cap oxide layer 652 (or the upper surface of the resonator 650 if no cap oxide layer is present). Each trench sidewall 658 and each resonator sidewall 660 is formed of a dielectric material. The dielectric material of the trench sidewall 658 and the dielectric material of the resonator sidewall form vertical spacers that line each trench 654.
A cavity 670 may be formed by removing a portion of the sacrificial layer 604 that extends from underneath the resonator 650 to the at least one dielectric-filled through channel 606. A portion of the cavity 670 may extend laterally beneath the at least one trench sidewall 658 to form at least one undercut region 672.
The at least one trench sidewall 658, the at least one resonator sidewall 660, the at least one dielectric-filled through channel 606, the first dielectric layer 603, and the projection layer 612 all may be formed of silicon oxide, and the sacrificial layer 604 may be formed of polysilicon. As discussed above, the polysilicon may be etched selectively without appreciably etching the silicon oxide by using, for example, XeF2. After the polysilicon is removed, the resulting cavity 670 that surrounds the resonator 650 is bounded by surfaces formed of silicon oxide.
As schematically illustrated in
The at least one undercut region 672 of the cavity 670 may be bounded by an upper surface 680, the bottom surface 674 of the cavity 670, and the at least one dielectric-filled through channel 606 forming the at least one lower vertical wall 676 of the cavity 650. The upper surface 680 and each lower vertical wall 676 may meet to form a corner 682 that is substantially rectilinear.
The cavity 670 also may have at least one upper vertical wall 684 corresponding to the trench sidewall 658. Each upper vertical wall 684 extends substantially vertically from the upper surface 656 of the cap oxide layer 652 (or the upper surface of the resonator 650 if no cap oxide layer is present) to a surface previously abutting the sacrificial layer 604 (removed to form the cavity 650). Each upper vertical wall 684 has a lower corner 686 that is substantially rectilinear.
The resonator 650 may have projections 688 that extend from a bottom surface 690 of the resonator 650. The projections 688 correspond to the dielectric-filled recessed portions 610, and may be formed of a material (e.g., silicon oxide) that may provide mechanical and thermal compensation for the resonator 650 to counteract temperature fluctuations and vibrational fluctuations in an environment of the resonator 650 and thus may enable the resonator 650 to operate stably in the presence of such fluctuations.
In yet another embodiment of the present technology, a process flow for fabricating a MEMS device of the type shown in
The sacrificial layer 704 may be patterned using known lithographic techniques to produce at least one through-channel 706 that extends from an upper surface 708 of the sacrificial layer 704 entirely through a thickness of the sacrificial layer 704 to the first dielectric layer 703, as shown schematically in
Subsequently, the processing is similar to that discussed above with reference to
The resulting structure is similar to that shown in
MEMS devices of the types described herein may be used in various applications and systems.
The read-out circuitry 804 may be configured to provide signals proportional to quantities sensed by the resonator 802. For example, the read-out circuitry 804 may be connected to contacts (not shown) on the resonator 802 to generate signals based on sensed capacitances. The read-out circuitry 804 may include any suitable component(s) for performing such read-out functions, as well as circuitry for signal processing functions such as filtering, amplifying, and demodulating. The read-out circuitry 804 may be an application specific integrated circuit (ASIC) in some embodiments, and may be formed on a different substrate from the resonator 802, or the read-out circuitry 804 and the resonator 802 may be formed on the same substrate in some embodiments.
In the system 800 of
The I/O interface 806 may be wired or wireless. Suitable wired connections include Universal Serial Bus (USB) and Firewire connections, among others. In those embodiments in which a wired connection is used, the connection may be pluggable. Wired connections may be used in settings in which the system 800 is relatively immobile, for example when fixed on a substantially stationary object, or when the distance between system 800 and an external device with which it communicates remains relatively constant. In some embodiments, however, the I/O interface may be wireless, for example communicating via a flexible radio frequency (RF) antenna.
The power unit 808 may provide power to some or all the components of the system 800, and may take various forms. In some embodiments, the power unit 808 may include one or more batteries. In some embodiments, the power unit 808 may include circuitry to convert AC power to DC power. For example, the power unit 808 may receive AC power from a power source external to system 800, such as via the I/O interface 806, and may provide DC power to some or all other components of system 800. In such instances, the power unit 808 may include a rectifier, a voltage regulator, a DC-DC converter, or any other suitable apparatus for power conversion.
As described, MEMS devices of the types described herein may be used in various applications. For example, industrial applications, medical applications, and athletic applications may make use of the structures described herein.
Some aspects of the present technology may be embodied as one or more methods. The acts performed as part of the method may be ordered in any suitable way. Accordingly, embodiments may be constructed in which acts are performed in an order different than illustrated, which may include performing some acts simultaneously, even though shown as sequential acts in illustrative embodiments.
The terms “approximately” and “about” if used herein may be construed to mean within ±20% of a target value in some embodiments, within ±10% of a target value in some embodiments, within ±5% of a target value in some embodiments, and within ±2% of a target value in some embodiments. The terms “approximately” and “about” may equal the target value.
The term “substantially” if used herein may be construed to mean within 95% of a target value in some embodiments, within 98% of a target value in some embodiments, within 99% of a target value in some embodiments, and within 99.5% of a target value in some embodiments. In some embodiments, the term “substantially” may equal 100% of the target value.
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