Claims
- 1. A semiconductor device comprising:a first low pressure grown oxide layer; a dielectric layer located on said first low pressure grown oxide layer; a stress-accommodating interface located between said first low pressure grown oxide layer and said dielectric layer; and a second low pressure grown oxide layer located between said first low pressure grown oxide layer and said substrate, said second low pressure grown oxide layer having a thickness of less than about 1 nm.
- 2. The semiconductor as recited in claim 1 wherein said first and second oxide layers and said dielectric layer are formed on said substrate in a single vapor deposition device.
- 3. The semiconductor as recited in claim 1 wherein said second oxide layer is formed at a temperature exceeding about 800° C.
- 4. The semiconductor as recited in claim 1 wherein said dielectric layer is formed in a zone of low pressure of about 400 milliTorr.
- 5. The semiconductor as recited in claim 1 wherein said first oxide layer has thickness of less than about 5.0 nm.
- 6. The semiconductor as recited in claim 5 wherein said thickness is about 3.0 nm.
- 7. The semiconductor as recited in claim 1 wherein said dielectric layer comprises an oxidized tetraethyl orthosilicate (TEOS) and has a thickness of about 1.5 nm.
- 8. The semiconductor as recited in claim 7 wherein said TEOS layer is deposited at a flow rate of about 50 cubic centimeters per minute.
- 9. The semiconductor as recited in claim 1 wherein a thickness of said second oxide layer ranges from about 1 nm to about 4.0 nm.
- 10. The semiconductor as recited in claim 1 wherein said first oxide layer and said dielectric layer are grown in a temperature of about 650° C.
- 11. The semiconductor as recited in claim 1 wherein said first oxide layer is formed under a pressure of 900 milliTorr and an environment of oxygen with a flow rate of 9 standard liters per minute.
- 12. The semiconductor as recited in claim 1 wherein said dielectric layer is formed under a nitrous oxide and nitrogen environment, wherein a flow rate of said nitrous oxide is about 1.72 standard liters per minute and a flow rate of said nitrogen is about 0.75 standard liters per minute.
- 13. The semiconductor as recited in claim 1 further including light nitrogen incorporation from about 1% to about 5% near said stress-accommodating interface.
Parent Case Info
This application is a divisional of prior application Ser. No. 08/814,670, filed on Mar. 11, 1997, now U.S. Pat. No. 5,940,736, to David C. Brady.
US Referenced Citations (3)
Non-Patent Literature Citations (2)
Entry |
Article from the AT&T Technical Journal: Nov./Dec. 1988 entitled “Synthesis of High-Quality Ultra-Thin Gate Oxides for ULSI Applications” by Pradip K. Roy and Ashok K. Sinha: pp. 155-174. |
Article from Semiconductor International: Jul. 1992 entitled “A Robust Gate Dielectric for Submicron Technology” by Hsing-Huang Tseng and Philip J. Tobin: pp. 68-74. |