Claims
- 1. A laminated substrate comprising, at least one sheet of material comprised of:
- a sheet of cloth having fibers and interstices between the fibers,
- a first coating of a first selected thermosetting resin surrounding said fibers, and filling some, but not all, of said interstices,
- a second coating of a second selected thermosetting resin different from said first thermosetting resin disposed over said first coating and with said first coating essentially filling all of said interstices unfilled by said first coating of resin,
- said first coating being cured sufficiently beyond B stage cure so that it has not dissolved in the uncured resin of the second coating,
- said second coating being B stage cured,
- a transition zone between said first and second coatings that is smooth, substantially continuous with crosslinking between said first and second coatings providing an essentially continuous polymer of two layers,
- said first coating having better adhesion to cloth fibers than said second coating, and said second coating having better adhesion to metal than said first coating,
- said one sheet being laminated between two sheets of metal further, and further characterized by each of said resins being essentially fully cured.
- 2. The substrate as defined in claim 1 wherein at least one of said metal sheets is copper and forms circuit traces.
- 3. The substrate as defined in claim 2 wherein said substrate is an integrated circuit chip carrier.
- 4. The invention as defined in claim 1 wherein said substrate comprises a core, and wherein additional sheets of material as defined in claim 1 and additional sheets of metal are laminated on said core, and wherein said resin in said additional sheets is essentially fully cured.
Parent Case Info
This is a divisional of copending application Ser. No. 08/716,813, filed on Sep. 10, 1996.
US Referenced Citations (11)
Foreign Referenced Citations (4)
Number |
Date |
Country |
63-048340 |
Aug 1986 |
JPX |
63-159442 |
Jul 1988 |
JPX |
63-159441 |
Jul 1988 |
JPX |
2-244-786 |
Sep 1990 |
JPX |
Non-Patent Literature Citations (1)
Entry |
"Prepreg Manufacturing Process," F.W. Haining and D.G. Herbaugh, IBM Technical Disclosure Bulletin, vol. 20, No. 11B, Apr. 1978 B, p. 4723. |
Divisions (1)
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Number |
Date |
Country |
Parent |
716813 |
Sep 1996 |
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