Claims
- 1. The method of passivating a silicon semiconductor device comprising:
- exposing a P-N junction in a multilayered silicon semiconductor body,
- forming a mixture of glass and a quantity of carrier lifetime degrading material selected from a group comprising gold and platinum,
- applying the mixture to the exposed P-N junction, and
- firing the mixture to fuse the glass and material on the silicon semiconductor body to enhance the voltage capacity and stability of the exposed P-N junction.
- 2. The method of claim 1 wherein the quantity of gold provides a gold concentration of from about 10.sup.16 to 10.sup.23 atoms per cubic centimeter.
- 3. The method of claim 1 wherein said mixture comprises lead oxide, silicon dioxide, gold oxide and aluminum oxide.
- 4. The method of claim 1 wherein said mixture comprises zinc oxide, silicon dioxide, gold oxide and boron oxide.
- 5. The method of claim 1 wherein said mixture comprises:
- about 40% to about 60% lead oxide,
- about 30% to about 50% silicon dioxide,
- up to about 20% aluminum oxide, and
- at least about 0.001% gold oxide.
Parent Case Info
This application is a divisional of Ser. No. 569,704 filed Apr. 21, 1975, now U.S. Pat. No. 4,007,476, issued Feb. 8, 1977.
US Referenced Citations (8)
Divisions (1)
|
Number |
Date |
Country |
Parent |
569704 |
Apr 1975 |
|