Patent Application
20060118947
The present invention relates generally to flip chip ball grid array (FCBGA) packaging and, more specifically, to FCBGA packaging having reduced warpage and mechanical enhancement.
Ball grid array (BGA) is an advanced type of integrated circuit packaging technology which is characterized by the use of an organic substrate whose upper surface is mounted with a semiconductor chip and whose lower surface is mounted with a grid array of solder balls. During a surface mount technology process, for example, the BGA package can be mechanically bonded and electrically coupled to a printed circuit board (PCB) by means of these solder balls.
Flip chip ball grid array is a more advanced type of BGA technology that uses flip chip technology in mounting the active side of the chip in an upside-down manner over the substrate and bonded to the same by means of a plurality of solder bumps attached to input/output pads thereon. Due to the inherent coefficient of thermal expansion (CTE) mismatches between the FCBGA package components such as for example the chip, substrate, and underfill (an adhesive flowed between the chip and substrate), high package warpage and thermal stresses are frequently induced in the FCBGA package. These high thermal stresses and warpage not only lead to the delamination in the low-k interconnect layer(s) in the chip, but also cause solder bump cracks leading to failure, degrading the long term operating reliability of the FCBGA package. Furthermore, the substrate onto which the flip chip may be mounted can be a single layer structure, or the substrate may comprise two or many more layers of materials. Often these materials tend to be quite diverse in their composition and structure. The coefficient of thermal expansion for these different layers may be considerably different and may result in uncontrolled bending or thermal induced substrate surface distortions. Such distortions can cause failure of the flip chip or other components of the substrate.
With the introduction of new components and materials such as inorganic substrates (e.g. ceramic) for FCBGA packaging, the above problems become more pronounced due to the coefficient of thermal expansion mismatches among these components.
For these reasons and other reasons that will become apparent upon reading the following detailed description, there is a need for an improved FCBGA package that reduces and/or eliminates the component and/or board level reliability problems of conventional FCBGA packages due the coefficient of thermal expansion mismatches among these components.
The present invention is directed to integrated circuit chip packages, particularly, but not by way of limitation, to flip chip ball grid array packages. In one embodiment, a flip chip ball grid array package comprises an inorganic substrate, a die disposed on the substrate, the die having a coefficient of thermal expansion approximately equal to the coefficient of thermal expansion of the substrate, a heat spreader disposed over the die, the heat spreader having a coefficient of thermal expansion approximately equal to the coefficients of thermal expansion of the die and the substrate, and at least one stiffener disposed between the substrate and the heat spreader, the stiffener having a coefficient of thermal expansion approximately equal to the coefficients of thermal expansion of the die, substrate, and the heat spreader, whereby warpages in the flip chip ball grid array package are reduced.
The features, aspects, and advantages of the present invention will become more fully apparent from the following detailed description, appended claims, and accompanying drawings in which:
It is to be understood that the following disclosure provides many different embodiments, or examples, for implementing different features of various embodiments. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed interposing the first and second features, such that the first and second features may not be in direct contact.
Referring to
An underfill 50 may be filled between chip 30 and first substrate 20. Underfill 50 has a high tensile modulus that stiffens the FCBGA package 10 to further protect chip 30 from flexural damage. Underfill 50 may be, for example, a commercially available epoxy polymer.
A second set of solder balls 60 may be secured to contact pads (not shown) on the lower surface of first substrate 20. The combination of the first substrate 20 and the second set of solder balls 60 on the lower surface thereof are commonly known as and referred to as a ball grid array. Second set of solder balls 60 may also be secured to contact pads (not shown) on a second substrate 70, which may be a printed wire board (also sometimes called a printed circuit board) or may be a multilayer module known to those skilled in the art.
The FCBGA package 10 may also include a heat spreader 80 and one or more stiffeners 90 for preventing excess warpage of the FCBGA package 10. Heat spreader 80 is mounted on top of chip 30 and counter-balances the forces exerted by the thermal expansion mismatches between at least the chip 30 and the first substrate 20. The heat spreader 80 and the stiffeners 90 may be formed integrally or employed as discrete elements, and may substantially comprise materials having relatively high coefficients of thermal expansion. In one embodiment, the heat spreader 80 comprises copper tungsten, aluminum silicon carbide, aluminum, stainless steel, copper, nickel and/or nickel-plated copper. In one embodiment, the stiffener 90 comprises copper, copper carbon, copper tungsten, aluminum silicon carbide, aluminum, stainless steel, nickel and/or nickel-plated copper. Other materials may be implemented accordingly to meet the design requirements of a particular application and the heat spreader 80 and the stiffener 90 may comprise other materials having high coefficients of thermal expansion as is known to those skilled in the art. However, in one embodiment, heat spreader 80, stiffener 90 may have substantially equal coefficients of thermal expansion, due to substantial similarities of the materials selected for each element. In another embodiment, heat spreader 80 has a coefficient of thermal expansion approximately equal to the coefficients of thermal expansion of the chip 30 and inorganic substrate 20 whereby warpages in FCBGA package 10 are reduced. In another embodiment, a material, shape, and a thickness of heat spreader 80 may be adjusted to match the coefficient of thermal expansion of chip 30, first substrate 20, and stiffener 90. In yet another embodiment, a material, shape, and a thickness of stiffener 90 may be adjusted to match the coefficient of thermal expansion of chip 30, first substrate 20, and heat spreader 80.
Further illustrated in
In one embodiment, heat spreader 80 has substantially similar dimensions as first substrate 20, although in other embodiments heat spreader 80 may be substantially smaller than first substrate 20. In either case, heat spreader 80 may be sized to substantially cover and enclose first substrate 20 in conjunction with the stiffeners 90. Accordingly, heat spreader 80 and stiffeners 90 may define a cavity 110 within which chip 30 is coupled to the first substrate 20. In one embodiment, the cavity 110 may be substantially filled with a thermo-set epoxy or other underfill material 50. In another embodiment, the underfill material 50 may only be disposed in a region proximate the chip 30 and separated from the stiffeners 90. In yet another embodiment, the underfill material 50 may be deposited around the chip 30 and between the chip 30 and the first substrate 20 before the heat spreader 80 is assembled to the stiffeners 90. In another embodiment, the underfill material 50 is deposited by injection through apertures (not shown) in the heat spreader 80 and/or the stiffeners 90 or between the stiffeners 90 and the first substrate 20.
Stiffener 90 may be disposed on first substrate 20 at a predetermined location to reduce warpage of the integrated circuit chip package thereby enhancing its structural integrity and at the same time allowing for the deposition of underfill material 50. In one embodiment, stiffener 90 is indented from about 0.5 mm to about 5 mm from one edge of first substrate 20. In a preferred embodiment, stiffener 90 is indented at about 2 mm from one edge of first substrate 20. However, those skilled in the art will understand that the indentation of stiffener 90 depends on at least the dimensions of the other components of FCBGA package 10 such as first substrate 20 and also on whether underfill material 50 may be suitably filled in cavity 110; and in general, other configurations may be implemented accordingly to meet the design criteria of a particular application.
Also shown in
The flip chip ball grid array package 10 of the present invention may have improved component and board level reliability when compared with conventional flip chip packages. The present invention may improve component and board level reliability of flip chip packages with inorganic substrates such as ceramic-containing substrates.
In the preceding detailed description, the present invention is described with reference to specifically exemplary embodiments thereof. It will, however, be evident that various modifications, structures, processes, and changes may be made thereto without departing from the broader spirit and scope of the present invention, as set forth in the claims. The specification and drawings are, accordingly, to be regarded as illustrative and not restrictive. It is understood that the present invention is capable of using various other combinations and environments and is capable of changes or modifications within the scope of the inventive concept as expressed herein.
