A PCT Request Form is filed concurrently with this specification as part of the present application. Each application that the present application claims benefit of or priority to as identified in the concurrently filed PCT Request Form is incorporated by reference herein in its entirety and for all purposes.
Semiconductor processing tools often include components designed to distribute process gases in a relatively even manner across a semiconductor substrate or wafer. Such components are commonly referred to in the industry as “showerheads.” Showerheads typically include a faceplate that fronts a semiconductor processing volume in which semiconductor substrates or wafers may be processed. The faceplate may include a plurality of gas distribution ports that allow gas in the plenum volume to flow through the faceplate and into a reaction space between the substrate and the faceplate (or between a wafer support supporting the wafer and the faceplate). Showerheads are typically classified into broad categories: flush-mount and chandelier-type. Flush-mount showerheads are typically integrated into the lid of a processing chamber, i.e., the showerhead serves as both a showerhead and as the chamber lid. Chandelier-type showerheads do not serve as the lid to the processing chamber, and are instead suspended within their semiconductor processing chambers by stems that serve to connect such showerheads with the lids of such chambers and to provide a fluid flow path or paths for processing gases to be delivered to such showerheads.
Details of one or more implementations of the subject matter described in this specification are set forth in the accompanying drawings and the description below. Other features, aspects, and advantages will become apparent from the description, the drawings, and the claims.
In some implementations, an apparatus is provided that includes a showerhead. The showerhead may include a faceplate and a backplate, with a gas distribution plenum interposed between the faceplate and the backplate. The showerhead may also include a stem that has a gas inlet, one or more heater elements, and a cooling plate assembly. In such a showerhead, the stem may be supported by the cooling plate assembly and may extend from the cooling plate assembly along a center axis. Additionally, the one or more heater elements may be located at least partially within the stem and may extend at least along a direction parallel to the center axis, the cooling plate assembly may include an inner cooling channel and an outer cooling channel, the outer cooling channel may extend around the inner cooling channel when viewed along the center axis, and the inner and outer cooling channels may both extend around the one or more heater elements when viewed along the center axis.
In some such implementations, a stem base may also be included. The stem base may be interposed between the backplate and the stem, larger in size than the stem when viewed along the center axis, and smaller in size than the backplate when viewed along the center axis.
In some implementations, the stem base may include a plurality of scallops arranged along an outer perimeter of the stem base when viewed along the center axis, the back plate may include a corresponding plurality of weld access holes, and each weld access hole may be collocated with one of the scallops.
In some further implementations, each of the one or more heater elements may extend from the cooling plate assembly to a location in between the gas distribution plenum and the stem base.
In some implementations, there may be at least three heater elements.
In some implementations, the cooling plate assembly may include a first plate and a second plate, a first surface of the first plate may be bonded to a second surface of the second plate, the inner cooling channel may extend into the second surface of the second plate and away from the first surface, and the first plate may include one or more protrusions that extend from the first surface, into one or more corresponding portions of the inner cooling channel, and towards the backplate.
In some implementations, the inner cooling channel may include an inner side wall and an outer side wall, the inner side wall may be encircled by the outer side wall, and the inner side wall may include a first plurality of first convex lobes arranged in a first radial pattern.
In some implementations, each protrusion may include a first concave recess within which is nestled one of the first convex lobes. In some further implementations, the inner side wall may include a second plurality of second convex lobes arranged in a second radial pattern. In some additional implementations, the outer side wall may include a plurality of third convex lobes arranged in a third radial pattern. In yet some further implementations, each first convex lobe may be positioned across the inner cooling channel from a corresponding one of the third convex lobes.
In some implementations, each protrusion may include a second concave recess on a side of the protrusion opposite the first concave recess of the protrusion, and one of the third convex lobes may be nestled within each of the second concave recesses.
In some implementations, each second convex lobe may be circumferentially interposed in between two adjacent third convex lobes.
In some implementations, there may be three protrusions.
In some implementations, a gap may exist between each protrusion and the second plate.
In some implementations, at least a first protrusion of the one or more protrusions may not contact the second plate.
In some implementations, the cooling plate assembly may include a plurality of through-holes, the stem may include a plurality of threaded holes in a top face of the stem, each threaded hole may be aligned with one of the through-holes in the cooling plate assembly, the top face of the stem may be butted up against a bottom face of the cooling plate assembly, a corresponding clamping fastener may be inserted through each through-hole in the cooling plate assembly and threaded into the threaded hole in the stem aligned therewith, counterbores may exist in one or both of the top face of the stem and the bottom face of the cooling plate assembly, and each counterbore may be centered on one of the through-holes through the cooling plate assembly. In some such implementations, the counterbores may be in the top face of the stem. In some further or alternative such implementations, the threaded holes may have threads provided by helical inserts.
Details of one or more implementations of the subject matter described in this specification are set forth in the accompanying drawings and the description below. Other features, aspects, and advantages will become apparent from the description, the drawings, and the claims. Note that the relative dimensions of the following figures may not be drawn to scale.
The various implementations disclosed herein are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings, in which like reference numerals refer to similar elements.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the presented concepts. The presented concepts may be practiced without some or all of these specific details. In other instances, well known process operations have not been described in detail so as to not unnecessarily obscure the described concepts. While some concepts will be described in conjunction with the specific embodiments, it will be understood that these embodiments are not intended to be limiting.
In this application, the terms “semiconductor wafer,” “wafer,” “substrate,” “wafer substrate,” and the like are used interchangeably. A wafer or substrate used in the semiconductor device industry typically has a diameter of 200 mm, 300 mm, or 450 mm, but may also be non-circular and of other dimensions. In addition to semiconductor wafers, other work pieces that may take advantage of this invention include various articles such as printed circuit boards, magnetic recording media, magnetic recording sensors, mirrors, optical elements, micro-mechanical devices and the like.
Several conventions may have been adopted in some of the drawings and discussions in this disclosure. For example, reference is made at various points to “volumes,” e.g., “plenum volumes.” These volumes may be generally indicated in various Figures, but it is understood that the Figures and the accompanying numerical identifiers represent an approximation of such volumes, and that the actual volumes may extend, for example, to various solid surfaces that bound the volumes. Various smaller volumes, e.g., gas inlets or other holes leading up to a boundary surface of a plenum volume, may be fluidically connected to those plenum volumes.
It is to be understood that the use of relative terms such as “above,” “on top,” “below,” “underneath,” etc. are to be understood to refer to spatial relationships of components with respect to the orientations of those components during normal use of a showerhead or with respect to the orientation of the drawings on the page. In normal use, showerheads are typically oriented so as to distribute gases downwards towards a substrate during substrate processing operations.
In some semiconductor processing operations, it may be desirable to heat gas that flows through a showerhead, e.g., to prevent condensation or to ensure that the gas is at an appropriate temperature when introduced to the semiconductor processing chamber via the showerhead. In order to provide for such controlled heating in a chandelier-type showerhead, cartridge heaters may be introduced into holes in the stem of such a chandelier-type showerhead that run parallel to the gas flow passage through the stem. Such cartridge heaters may, depending on the particular requirements of a semiconductor processing operation, reach temperatures of between 500° C. and 800° C.
Showerheads may also receive heat through other mechanisms, e.g., as a result of semiconductor processing operations. For example, in some semiconductor processing operations, the temperature of the pedestal supporting the wafer may reach temperatures of 600° C. to 700° C., e.g., 650° C., and the gas that is introduced into the semiconductor processing chamber may be exposed to high-voltage radio-frequency field to generate a plasma environment that may be several thousand degrees Celsius. Moreover, a trend can be seen that processing temperatures continue to increase as new and improved semiconductor processing operations are develop. The heat from such semiconductor processing operations may be transferred into the showerhead and, along with the heat provided by the cartridge heaters, cause the showerhead to reach temperatures of approximately 300° C. to 360° C., e.g., 350° C. The heat that accumulates in the showerhead may then generally need to be transferred out of the showerhead to avoid overheating; the only conductive path out of such a showerhead is via the stem of that showerhead and through the structure that supports the stem. Radiative and convective heat transfer may also serve to transfer heat out of the showerhead, but the dominant mechanism for heat transfer is conductive heat transfer.
Presented herein are concepts relating to a thermally controlled showerhead that may be used in high-temperature processing to not only deliver gases at elevated temperatures to the showerhead, but to also allow for efficient conduction of excess heat out of the showerhead via the stem.
In the example showerhead of
Due to the high temperatures that a showerhead 100 such as that shown in
As can be seen from
Another characteristic of the backplate 146 is that the backplate 146 has a non-uniform radial thickness, getting larger the closer the backplate 146 is to the stem base 118. Such increased thickness may serve to increase the heat conduction cross-sectional area of the backplate 146 in tandem with the increased heat conduction needs of the faceplate 114 near the stem 112 as compared with the perimeter of the faceplate 114. Similarly, the stem base 118 may provide additional thermal mass that may provide additional heat flow paths for heat originating near the outer diameter of the faceplate 114. The stem base 118, however, may also include a plurality of longitudinal scallops 120 that extend in directions parallel to a center axis of the center gas passage 138; each such scallop 120 may provide clearance for a welding or brazing system to gain access to the weld access holes 116.
These longitudinal scallops 120 are more clearly depicted in
The cooling plate assembly 102 may, as shown, have a layered construction, although other implementations may provide a similar structure using other manufacturing techniques, e.g., additive manufacturing or casting, but without the layered construction. The cooling plate assembly 102 may include a cover plate 132 that is bonded, e.g., via diffusion bonding or brazing, to a first plate 126, which is, in turn, bonded to a second plate 128, which is, in turn, bonded to a third plate 130. It will be understood that while such structures are referred to as “plates” in this application, they may include features that extend away from an otherwise generally planar surface, leaving the “plates” as having 3-dimensional structures that give such structures non-planar appearances.
As discussed above, the cooling plate assembly may be a bonded laminated structure. However, it may still be desirable to utilize fasteners to connect the cooling plate assembly 102 to the stem 112. In such implementations, the stem may include a plurality of threaded holes that may receive fasteners that are inserted through corresponding holes in the cooling plate assembly 102 and then tightened, thereby drawing the stem 112 into good thermal contact with the cooling plate assembly 102. This is shown in
It will be appreciated as well that the inner cooling channel feature 136 in the cooling plate assembly 102 may also be vertically shifted from the location shown in the Figures. For example, in some implementations, the inner cooling channel 136 may be vertically offset downward (or extended in depth downward) so as to have a bottommost surface (closest to the faceplate 114) that is closer to the faceplate 114 than as depicted.
In some other implementations, such as that shown in
As can be seen in
The cooling plate assembly 102 may include an inner cooling channel 136 that extends generally around the stem 112 and which may be fluidically connected within the cooling plate assembly 102 so as to cause coolant flowed therethrough from a coolant inlet 106 to subsequently flow through an outer cooling channel 134, which may encircle (or at least partially encircle) the inner cooling channel 136, before flowing to a coolant outlet 108.
When the showerhead 100 is installed in a semiconductor processing system, it may be connected to several additional systems. For example, the heater elements 110 may be connected with a heater power supply 164 that may provide electrical power to the heater elements 110 under the direction of a controller 166. The controller 166 may, for example, have one or more processors 168 and one or more memory devices 170. The one or more memory devices may, as discussed later herein, store computer-executable instructions for controlling the one or more processors to perform various functions or control various other pieces of hardware.
The controller 166 of
The showerhead 100 of
Further details of the cooling plate assembly are discussed below with respect to
In
As can be seen in
The effect of the protrusions may be more clearly seen in
As can be seen in
It will be further noted that the protrusions 140 extend downward from the first plate 126, towards the faceplate 114. Thus, heat from the faceplate 114 and stem 112 may flow along the sidewalls of the inner cooling channel 136 and towards the first plate 126, as well as from the first plate 126 and to the ends of the protrusions 140, i.e., in the opposite direction. This may have the effect of evening out the heating of the coolant flowing through the inner cooling channel, as the temperature gradient of the inner cooling channel 136 side walls may be highest at the bottom of the inner cooling channel 136, i.e., closest to the faceplate 114, and lowest near the top of the inner cooling channel 136, i.e., near the first plate 126, whereas the temperature gradient in the protrusions 140 may be reversed, i.e., with the highest temperature near the first plate 126 and the lowest temperature near the bottom of the inner cooling channel 136. This promotes more efficient heat transfer.
As mentioned above, the various controllable components discussed herein, e.g., valves to gas supplies, heater power units, coolant pumps, etc., may be controlled by a controller of a semiconductor processing tool. The controller may be part of a system that may include semiconductor processing equipment, including a processing tool or tools, chamber or chambers, platform or platforms for processing, and/or specific processing components (a wafer pedestal, a gas flow system, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after processing of a semiconductor wafer or substrate. The electronics may be referred to as the “controller,” which may control various components or subparts of the system or systems. The controller, depending on the processing requirements and/or the type of system, may be programmed to control any of the processes disclosed herein, as well as various parameters affecting semiconductor processing, such as the delivery of processing gases, temperature settings (e.g., heating and/or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, positional and operation settings, wafer transfers into and out of a tool and other transfer tools and/or load locks connected to or interfaced with a specific system.
Broadly speaking, the controller may be defined as electronics having various integrated circuits, logic, memory, and/or software that receive instructions, issue instructions, control operation, enable cleaning operations, enable endpoint measurements, and the like. The integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and/or one or more microprocessors, or microcontrollers that execute program instructions (e.g., software). Program instructions may be instructions communicated to the controller in the form of various individual settings (or program files), defining operational parameters for carrying out a particular process on or for a semiconductor wafer or to a system. The operational parameters may, in some embodiments, be part of a recipe defined by process engineers to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and/or dies of a wafer.
The controller, in some implementations, may be a part of or coupled to a computer that is integrated with, coupled to the system, otherwise networked to the system, or a combination thereof. For example, the controller may be in the “cloud” or all or a part of a fab host computer system, which can allow for remote access of the wafer processing. The computer may enable remote access to the system to monitor current progress of fabrication operations, examine a history of past fabrication operations, examine trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing steps to follow a current processing, or to start a new process. In some examples, a remote computer (e.g. a server) can provide process recipes to a system over a network, which may include a local network or the Internet. The remote computer may include a user interface that enables entry or programming of parameters and/or settings, which are then communicated to the system from the remote computer. In some examples, the controller receives instructions in the form of data, which specify parameters for each of the processing steps to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type of tool that the controller is configured to interface with or control. Thus as described above, the controller may be distributed, such as by comprising one or more discrete controllers that are networked together and working towards a common purpose, such as the processes and controls described herein. An example of a distributed controller for such purposes would be one or more integrated circuits on a chamber in communication with one or more integrated circuits located remotely (such as at the platform level or as part of a remote computer) that combine to control a process on the chamber.
Without limitation, example systems may include a plasma etch chamber or module, a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a clean chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an atomic layer deposition (ALD) chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing systems that may be associated or used in the fabrication and/or manufacturing of semiconductor wafers.
As noted above, depending on the process step or steps to be performed by the tool, the controller might communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout a factory, a main computer, another controller, or tools used in material transport that bring containers of wafers to and from tool locations and/or load ports in a semiconductor manufacturing factory.
The term “wafer,” as used herein, may refer to semiconductor wafers or substrates or other similar types of wafers or substrates. A wafer station, as the term is used herein, may refer to any location in a semiconductor processing tool in which a wafer may be placed during any of various wafer processing operations or wafer transfer operations. Wafer support is used herein to refer to any structure in a wafer station that is configured to receive and support a semiconductor wafer, e.g., a pedestal, an electrostatic chuck, a wafer support shelf, etc.
References herein to “substantially,” “approximately,” or the like may be understood, unless otherwise indicated, to refer to values or relationships within ±10% of those stated. For example, two surfaces that are substantially perpendicular to one another may be either truly perpendicular, i.e., at 90° to one another, at 89° or 91° to one another, or even as far as at 80° or 100° to one another.
It is also to be understood that any use of ordinal indicators, e.g., (a), (b), (c), . . . , herein is for organizational purposes only, and is not intended to convey any particular sequence or importance to the items associated with each ordinal indicator. There may nonetheless be instances in which some items associated with ordinal indicators may inherently require a particular sequence, e.g., “(a) obtain information regarding X, (b) determine Y based on the information regarding X, and (c) obtain information regarding Z”; in this example, (a) would need to be performed (b) since (b) relies on information obtained in (a)-(c), however, could be performed before or after either of (a) and/or (b).
It is to be understood that use of the word “each,” such as in the phrase “for each <item> of the one or more <items>” or “of each <item>,” if used herein, should be understood to be inclusive of both a single-item group and multiple-item groups, i.e., the phrase “for . . . each” is used in the sense that it is used in programming languages to refer to each item of whatever population of items is referenced. For example, if the population of items referenced is a single item, then “each” would refer to only that single item (despite the fact that dictionary definitions of “each” frequently define the term to refer to “every one of two or more things”) and would not imply that there must be at least two of those items. Similarly, when a selected item may have one or more sub-items and a selection of one of those sub-items is made, it will be understood that in the case where the selected item has one and only one sub-item, selection of that one sub-item is inherent in the selection of the item itself.
It will also be understood that references to multiple controllers that are configured, in aggregate, to perform various functions are intended to encompass situations in which only one of the controllers is configured to perform all of the functions disclosed or discussed, as well as situations in which the various controllers each perform subportions of the functionality discussed.
Various modifications to the implementations described in this disclosure may be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other implementations without departing from the spirit or scope of this disclosure. Thus, the claims are not intended to be limited to the implementations shown herein, but are to be accorded the widest scope consistent with this disclosure, the principles and the novel features disclosed herein.
Certain features that are described in this specification in the context of separate implementations also can be implemented in combination in a single implementation. Conversely, various features that are described in the context of a single implementation also can be implemented in multiple implementations separately or in any suitable sub-combination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a sub-combination or variation of a sub-combination.
Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. Further, the drawings may schematically depict one more example processes in the form of a flow diagram. However, other operations that are not depicted can be incorporated in the example processes that are schematically illustrated. For example, one or more additional operations can be performed before, after, simultaneously, or between any of the illustrated operations. In certain circumstances, multitasking and parallel processing may be advantageous. Moreover, the separation of various system components in the implementations described above should not be understood as requiring such separation in all implementations, and it should be understood that the described program components and systems can generally be integrated together in a single software product or packaged into multiple software products. Additionally, other implementations are within the scope of the following claims. In some cases, the actions recited in the claims can be performed in a different order and still achieve desirable results.
Filing Document | Filing Date | Country | Kind |
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PCT/US2020/070437 | 8/21/2020 | WO |
Number | Date | Country | |
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62891211 | Aug 2019 | US |