Not applicable.
Not applicable.
This invention relates to the sealing of microelectromechanical systems (MEMS) devices in an enclosure and the method of manufacture of the sealed enclosure. In particular, this invention relates to the formation of a hermetic seal between a fabrication wafer supporting the MEMS devices, and a lid wafer.
Microelectromechanical systems (MEMS) are devices often having moveable components which are manufactured using lithographic fabrication processes developed for producing semiconductor electronic devices. Because the manufacturing processes are lithographic, MEMS devices may be batch fabricated in very small sizes. MEMS techniques have been used to manufacture a wide variety of sensors and actuators, such as accelerometers and electrostatic cantilevers.
MEMS techniques have also been used to manufacture electrical relays or switches of small size, generally using an electrostatic actuation means to activate the switch. MEMS devices often make use of silicon-on-insulator (SOI) wafers, which are a relatively thick silicon “handle” wafer with a thin silicon dioxide insulating layer, followed by a relatively thin silicon “device” layer. In the MEMS switches, a thin cantilevered beam of silicon is etched into the silicon device layer, and a cavity is created adjacent to the cantilevered beam, typically by etching the thin silicon dioxide layer to allow for the electrostatic deflection of the beam. Electrodes provided above or below the beam may provide the voltage potential which produces the attractive (or repulsive) force to the cantilevered beam, causing it to deflect within the cavity.
Because the MEMS devices often have moveable components, such as the cantilevered beam, they typically require protection of the moveable portions by sealing the devices in a protective cap or lid wafer, to form a device cavity. The lid wafer may be secured to the device layer by some adhesive means, such as a low outgassing epoxy.
However, the epoxy bond may not be hermetic, such that the gas with which the MEMS device is initially surrounded during fabrication, escapes over time and may be replaced by ambient air. In particular, if the MEMS device is an electrostatic MEMS switch is intended to handle relatively high voltages, such as those associated with telephone signals, the voltages may exceed, for example, about 400 V. For these relatively high voltages, it may be desirable to seal the electrostatic MEMS switch in an insulating gas environment, to discourage breakdown of the air and arcing between the high voltage lines. To this end, it may be desirable to seal an insulating gas such as sulphur hexafluoride SF6 or a freon such as C2Cl2F2 or C2Cl2F4 within the device cavity. In order to maintain the gas environment around the electrostatic MEMS switch, the seal needs to be hermetic.
The systems and methods described here form a hermetic seal between a MEMS device layer and a cap or lid wafer. The seal construction may include an indium layer deposited over a gold layer. The gold and indium layers may be deposited by ion beam sputter deposition, by plating, or sputtering using a shadow mask to define the regions in which the gold and indium layers are to be deposited, for example. The gold and indium layers are then heated to a temperature beyond the melting point of the indium (156 C°). At this point, the indium melts into the gold and forms an alloy AuInx. The alloy AuInx may have the stoichiometry AuIn2, and may be eutectic, such that it quickly solidifies. The alloy may be impermeable to insulating gases such as SF6, and therefore may form a hermetic seal. Because indium melts at relatively low temperatures, the hermetic seal is formed at temperatures of only on the order of 150 degrees centigrade. The formation of the seal is therefore compatible with the presence of relatively vulnerable films, such as metal films, which would volatilize at temperatures of several hundred degrees centigrade. Nonetheless, because the alloy is stable to several hundred degrees centigrade, the seal may maintain its integrity up to these temperatures.
While the gold and indium layers may be deposited using lithographic patterning techniques, the systems and methods described here also include forming the seal using a metal insert, preformed with openings arranged in a manner consistent with the arrangement of MEMS devices as laid out on an SOI fabrication wafer. The metal insert may be stamped or etched from a thin metal sheet, and plated with indium metal. The SOI fabrication wafer and the cap or lid wafer may also be prepared with a deposited gold layer. The metal preformed insert may then be inserted between the SOI fabrication wafer and the cap or lid wafer. The fabrication wafer, the cap wafer and metal insert may then be sealed as before, by heating the assembly to form the alloy AuInx.
The systems and methods for forming the hermetic seal may therefore include forming a first metal layer on a first substrate around the MEMS device formed on the first substrate, forming a second metal layer on a second substrate, and coupling the first substrate to the second substrate with an alloy of the first metal and the second metal.
These and other features and advantages are described in, or are apparent from, the following detailed description.
Various exemplary details are described with reference to the following figures, wherein:
In the systems and methods described here, a MEMS device is encapsulated with a cap or lid wafer. The MEMS device may have been previously formed on, for example, a silicon-on-insulator (SOI) composite substrate, or any other suitable substrate. The sealing mechanism may be a two-metal alloy, which bonds the silicon-on-insulator composite substrate with the cap or lid wafer. The two-metal alloy may have a melting point much higher than the melting point of either of the constituent elements, so that the alloy solidifies quickly upon formation. The alloy may form a hermetic seal, preventing an enclosed gas from leaking out of the enclosed area of the MEMS device. Because the seal is a metal alloy seal, it may also provide electrical continuity between the cap or lid wafer and the device wafer.
It should be understood that metal layers 130 and 330 may be multilayers, rather than a single layer of metal material. For example, layers 130 and 330 may include an additional layer of metal within layer 130 or 330, to promote adhesion of metal layer 130 or metal layer 330 to substrate 110 or 310, respectively. For example, if the layers 130 and 330 are a gold layers, they may also include a thin layer of chromium (Cr) which promotes adhesion of the gold layers 130 and 330 to the surface of the substrate 110. The chromium layer may be, for example, about 50 Angstroms to about 200 Angstroms in thickness. Furthermore, there may also be diffusion barrier layers present, to prevent the diffusion of the metal of the adhesion layer into metal layer 130 or metal layer 330. For example, the gold layers 130 and 330 may also include a thin layer of molybdenum, about 100 Angstroms in thickness, which prevents the diffusion of the chromium adhesion layer into the gold layer, which would otherwise increase the electrical resistance of the metal layer 130. The remainder of metal layer 130 may be gold, which may be, for example, 3000 Angstroms to about 5000 Angstroms in thickness.
As illustrated in
The surfaces of metal layers 200 and 130 may be cleaned to prepare the surfaces for bonding, and to enhance the strength of the alloy bond. The cleaning procedures may include ion milling over the surfaces, or dipping substrate 110 with metal layer 130, and substrate 310 with metal layers 330 and 200 into a solution of hydrochloric acid (HCl) or nitric acid. The hydrochloric or nitric acid may be used for the removal of the self-passivated metal oxide surface formed over the metal layers 130, 200 and 330. Oxygen plasmas may be used to remove residual photoresist left over from the previous processing, or any other organics which may otherwise interfere with the formation of the alloy bond. The oxygen plasma treatment may be performed before the acid dip.
The material of metal layers 130, 200 and 330 may be chosen such that metal layers 130, 200 and 330 may form an alloy 210, as shown in
In one exemplary embodiment, the first metal layer 130 and third metal layer 330 are gold (Au) and the second metal layer 200 is indium (In). The thicknesses of the gold layers 130 and 330 to the indium metal layer 200 may be in a ratio of about one-to-one by thickness. Since gold is about four times denser than indium, this ratio ensures that there is an adequate amount of gold in layers 130 and 330 to form the gold/indium alloy AuInx, where x is about 2, while still having enough gold remaining to ensure good adhesion to the substrates 110 and 310. The gold/indium alloy AuInx 210 may have a much higher melting point than elemental indium 200, such that upon formation of the alloy 210, it quickly solidifies, forming the hermetic bond. For example, the melting point of the gold/indium alloy may be 540 degrees centigrade, whereas the melting point of elemental indium is only 156 degrees centigrade.
Gold diffuses slowly into indium at room temperature and will diffuse fully into the indium at a temperature well below the melting temperature making the alloy AuInx which will not melt below 400 degrees centigrade. Care may therefore be taken to process and store the assembly at low temperatures to prevent the bond from forming before intended.
The metal layer 130 may then be ion milled to remove the material of metal layer 130 in any areas not covered by photoresist 120. The metal layer 130 may thus be located around the perimeter of each of the MEMS devices 340, as was shown in
Although the first metal layer 130 is described as being formed by milling or deposition through a shadow mask, it should be understood that any of a number of alternative deposition techniques may be used, such as sputter deposition through a patterned resist, followed by lift off of the resist.
It should be understood that the method used for depositing metal layer 330 on substrate 310 may be different than the method used to deposit metal layer 130 on substrate 110, because of the presence of the MEMS devices on substrate 310. For example, when depositing the metal layer 330 on substrate 300, a photoresist may first be deposited over the surface and the MEMS devices, and the photoresist patterned and removed over the areas in which it is desired to deposit the metal layer 330. Metal layer 330 is then deposited over the whole surface, and lifted off with the remaining photoresist in the areas in which the metal layer 330 is not desired. In another embodiment, metal layer 330 may be patterned as described above, whereas metal layer 130 may be left unpatterned.
The preformed metal insert may be, for example, a copper, aluminum or stainless steel sheet of material 600, or any other suitable material, which has been processed to form openings 620. The openings 620 may be formed by stamping, etching, or milling for example. The openings 620 may be dimensioned so as to surround each of the MEMS devices 340. The thickness, T, of the metal sheet may be, for example, between about 30 μm to about 100 μm thick. After formation, the metal sheet 600 may be plated with the second metal material 630 to a thickness, t, of about 3 μm to about 6 μm. The second metal material 630 may be, for example, indium, plated by immersion in a plating bath for about 2 minutes, the plating bath being a solution of indium sulfate, indium sulfamate, sulfamic acid and sodium chloride. Suitable plating bath solutions may be obtained from Indium Corporation of Utica, N.Y.
The advantage of using preformed metal sheet 600 is that the processing required to make preformed metal sheet 600 may take place outside of the wafer fab, as the etching or stamping processes used to make preformed metal sheet 600 do not require clean room conditions. Furthermore, the plating of the second metal 630 may also be performed outside the clean room, by simply immersing the preformed metal sheet 600 in a metal plating bath. For example, to plate 4 μm of indium requires submersion in an indium plating bath for about 2 minutes. The preformed metal insert 600 may therefore be fabricated relatively cheaply and quickly.
After cap or lid wafer 110 is aligned with the fabrication substrate 310 and preformed metal insert 600, the assembly 300 may be held together by the clamp with a clamping force of between about 100 to about 4000 Newtons, and heated to a temperature exceeding a melting temperature of at least one of the two metal materials 330 and 630. An alloy layer 400 then forms between the first metal layer 330′ and the second metal layer 630, and alloy 500 forms between first metal layer 330 and second metal layer 630. In the exemplary embodiment described above, first metal layer 330 and first metal layer 330′ are both gold, and second metal layer 630 is indium, such that alloy layers 400 and 500 are both an alloy of gold and indium, AuInx. In various exemplary embodiments, x is about 2, such that the stoichiometry of the alloy is AuIn2. The process temperature for forming the gold/indium alloy 400 and 500 may be, for example, 160 to 180 degrees centigrade, whereas the melting point of indium is about 156 degrees centigrade. The assembly 300 is then allowed to dwell at this temperature for about 10 minutes. Thereafter, the assembly 300 may be cooled to room temperature before removing the clamp.
It may be important to assure that metal layers 330 and 330′ are sufficiently thick that a layer of pure metal remains over the cap or lid wafer 110 and over fabrication substrate 310, in order to assure good adhesion to these surfaces after formation of the alloy layers 400 and 500. Since gold is three to four times denser than indium, a gold layer about 4 μm thick may be appropriate to form a hermetic alloy seal with an indium layer plated to a thickness of 4 μm.
The material of the metal sheet 600 may be chosen to have a similar coefficient of thermal expansion compared to the metal alloy layers 400 and 500. The thermal coefficient of expansion (TCE) for silicon is 3 ppm. Some glasses (like Corning 7740) and metals (Invar or Kovar) are designed to have the same TCE as silicon. Use of these kinds of materials minimizes the strain on the MEMS wafer after bonding. While the indium tensile strength is very low, 273 psi, the AuInx alloy tensile strength is greater then 10,000 psi. Therefore, the hermetic seal formed with a gold/indium alloy 400 and 500 will not yield until a pressure in excess of (10,000 psi*area of bond) is applied to the bond. The area of the bond is around 0.0007 square inches, so that the force to break the lid off will be 10,000 psi*0.0007 in.=7 lbs of force.
Because of the extra height afforded to the assembly 300 by the presence of the preformed metal insert 600, the assembly 300 may be cut to expose electrical contacts under the cap or lid wafer 110, before the devices are singulated (i.e., separated) from one another on the fabrication wafer 310. The devices may therefore be probed and tested at the wafer level before final dicing to separate the devices. This may further reduce cost, by identifying bad devices or bad wafers, before the additional investment is made to singulate the packaged devices.
While various details have been described in conjunction with the exemplary implementations outlined above, various alternatives, modifications, variations, improvements, and/or substantial equivalents, whether known or that are or may be presently unforeseen, may become apparent upon reviewing the foregoing disclosure. For example, while the disclosure describes the formation of a gold/indium alloy, it should be understood that the systems and methods described herein may be applied to any number of different alloy systems in addition to AuInx. Furthermore, while a number of alternatives are described for the formation of the metal layers, it should be understood that the metal layers may be formed by any number of alternative processes. Accordingly, the exemplary implementations set forth above, are intended to be illustrative, not limiting.
This U.S. patent application is a divisional application of U.S. patent application Ser. No. 11/211,622, filed Aug. 26, 2005. This U.S. patent application is related to U.S. patent application Ser. No. 11/211,623 (Attorney Docket No. IMT-Wallis), U.S. patent application Ser. No. 11/211,624 (Attorney Docket No. IMT-Blind Trench), and U.S. patent application Ser. No. 11/211,625 (Attorney Docket No. IMT-Interconnect), filed on an even date herewith, each of which is incorporated by reference in its entirety.
Number | Date | Country | |
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Parent | 11211622 | Aug 2005 | US |
Child | 12222845 | US |