Patent Application
20120326170
None.
An optocoupler contains an optical emitter device that is optically coupled to an optical receiver device through an optically transmissive material. This arrangement permits the passage of information from one electrical circuit that contains the optical emitter device to another electrical circuit that contains the optical receiver device. A high degree of electrical isolation is maintained between the two circuits. Because information is passed optically across an electrically insulating gap, the transfer is one way. For example, the optical receiver device cannot modify the operation of a circuit containing the optical emitter device. This feature is desirable because, for example, the emitter may be driven by a low voltage circuit using a microprocessor or logic gates, while the output optical receiver device may be part of a high voltage DC or AC load circuit. The optical isolation also prevents damage to the input circuit caused by the relatively hostile output circuit, and allows the two circuits to be at different ground potentials.
As part of making their invention, the inventors have recognized that optocouplers are being used in greater numbers in power conversion circuits, and that the relatively bulky size of multiple optocouplers in a power conversion circuit will be an impediment to allowing the size and volume of the circuit to be reduced. Also as part of making their invention, the inventors have recognized that there is a need to reduce the costs of optocouplers and to increase their electrical performance. Aspects of the present invention provide optocouplers with optoelectronic components embedded within a support substrate, and one or more ultra thin interconnect layers, which each provide for an ultra thin and ultra-small optocoupler package. The construction enables the support substrate and embedded components to be manufactured with a wafer-level molding and manufacturing processes in which multiple instances of the package are manufacture together on a common wafer using a common molding process and conventional semiconductor processes, and separated from the common wafer and one another after fabrication. This wafer-level manufacture approach can be automated to a high degree, which significantly lowers manufacturing costs. Further aspects of the present invention reduce manufacturing costs and improve electrical performance.
Accordingly, a first general exemplary embodiment according to the present invention is directed to an optocoupler package comprising: a substrate having a first surface, a second surface opposite to the first surface, and a body of electrically insulating material disposed between the first and second surfaces, a first optoelectronic device embedded in the body of electrically insulating material of the substrate and disposed between the substrate's first and second surfaces, the first optoelectronic device having a first conductive region and a second conductive region, and a second optoelectronic device embedded in the body of electrically insulating material of the substrate and disposed between the substrate's first and second surfaces and optically coupled to the first optoelectronic device, the second optoelectronic device having a first conductive region and a second conductive region. The exemplary optocoupler package further comprises: a first electrical trace disposed on a surface of the substrate and electrically coupled to the first conductive region of the first optoelectronic device, a second electrical trace disposed on a surface of the substrate and electrically coupled to the second conductive region of the first optoelectronic device, a third electrical trace disposed on a surface of the substrate and electrically coupled to the first conductive region of the second optoelectronic device, and a fourth electrical trace disposed on a surface of the substrate and electrically coupled to the second conductive region of the second optoelectronic device. The first and second optoelectronic devices may be optically coupled together by a body of radiation transmissive material disposed at or on the first surface of the substrate and over the first and second optoelectronic devices.
A second general exemplary embodiment according to the present invention is directed to a method of manufacturing an optocoupler package comprising: molding a body of electrically insulating material around a first optoelectronic device and a second optoelectronic device to form a substrate having a first surface and a second surface opposite to the first surface, with the body of electrically insulating material being disposed between the first and second surfaces, the first optoelectronic device being embedded in the body of electrically insulating material and disposed between the substrate's first and second surfaces, the first optoelectronic device having a first conductive region and a second conductive region, and the second optoelectronic device being embedded in the body of electrically insulating material and disposed between the substrate's first and second surfaces, the second optoelectronic device having a first conductive region and a second conductive region. The exemplary method further comprises forming a first electrical trace disposed on a surface of the substrate and electrically coupled to the first conductive region of the first optoelectronic device, forming a second electrical trace disposed on a surface of the substrate and electrically coupled to the second conductive region of the first optoelectronic device, forming a third electrical trace disposed on a surface of the substrate and electrically coupled to the first conductive region of the second optoelectronic device, forming a fourth electrical trace disposed on a surface of the substrate and electrically coupled to the second conductive region of the second optoelectronic device; and disposing a body of radiation transmissive material on the first surface of the substrate and over the first and second optoelectronic devices such that the second optoelectronic device is optically coupled to the first optoelectronic device. The electrical traces may be formed using various combinations of electroplating and masking steps, which can be highly automated processes in the wafer-level manufacturing environment.
The above exemplary construction has many advantages. First, embedding the optoelectronic devices into the substrate reduces the thickness of package compared to prior art optocouplers where the optoelectronic devices are mounted on the surface of a substrate. Since the devices are embedded in the substrate, the body radiation transmissive material does need to encase the devices, and therefore can have a smaller height and smaller foot print area, thereby reducing the foot print area of the package. Also, the construction enables the traces to replace the wire bonds used in conventional optocoupler packages, which also reduces the height and foot print area of the packages. The elimination of wire bonds also increases the reliability of the package, enables wafer-level manufacturing processes to be used. Wafer-level processing allows for a high degree of automation, and generally results in lower costs compared to conventional lead frame methods. The smaller foot print of the package also enables a larger number of packages to be formed on a common wafer.
The above exemplary embodiments and other embodiments of the inventions are described in the Detailed Description with reference to the Figures. In the Figures, like numerals may reference like elements and descriptions of some elements may not be repeated.
The present invention will be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown. This invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure is thorough and complete and fully conveys the scope of the invention to one skilled in the art. In the drawings, the thicknesses of layers and regions may be exaggerated for clarity. The same reference numerals are used to denote the same elements throughout the specification. The elements may have different interrelationships and different positions for different embodiments.
It will also be understood that when a layer is referred to as being “on” another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may also be present. It will also be understood that when an element, such as a layer, a region, or a substrate, is referred to as being “on,” “connected to,” “electrically connected to,” “coupled to,” or “electrically coupled to” another element, it may be directly on, connected or coupled to the other element, or one or more intervening elements may be present. In contrast, when an element is referred to as being “directly on,” “directly connected to” or “directly coupled to” another element or layer, there are no intervening elements or layers present. The term “and/or” used herein includes any and all combinations of one or more of the associated listed items.
The terms used herein are for illustrative purposes of the present invention only and should not be construed to limit the meaning or the scope of the present invention. As used in this specification, a singular form may, unless definitely indicating a particular case in terms of the context, include a plural form. Also, the expressions “comprise” and/or “comprising” used in this specification neither define the mentioned shapes, numbers, steps, actions, operations, members, elements, and/or groups of these, nor exclude the presence or addition of one or more other different shapes, numbers, steps, operations, members, elements, and/or groups of these, or addition of these. Spatially relative terms, such as “over,” “above,” “upper,” “under,” “beneath,” “below,” “lower,” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device (e.g., optocoupler, package) in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as “below” or “beneath” or “under” other elements or features would then be oriented “over” or “above” the other elements or features. Thus, the exemplary term “above” may encompass both an above and below orientation.
As used herein, terms such as “first,” “second,” etc. are used to describe various members, components, regions, layers, and/or portions. However, it is obvious that the members, components, regions, layers, and/or portions should not be defined by these terms. The terms are used only for distinguishing one member, component, region, layer, or portion from another member, component, region, layer, or portion. Thus, a first member, component, region, layer, or portion which will be described may also refer to a second member, component, region, layer, or portion, without departing from the scope of the present invention.
Device 140 may have a first electrical terminal disposed at its top surface, which may be near or at the substrate's first surface 111, and a second electrical terminal disposed at its bottom surface, which may be near or at the substrate's second surface 112. Device 140 may comprise a radiation detector, such as a photodiode, and may be in the form of a semiconductor die that has two conductive regions as its two electrical terminals, or may be in the form of a surface mount device with two electrical terminals at its distal ends that cover portions of both of its top and bottom surfaces. In either form, device 140 may, in some implementations, comprise a discrete radiation-detector (e.g., discrete photodiode or phototransistor), where the term “discrete” was defined above. In other implementations, device 140 may comprise an electrical amplifier integrated with the radiation detector that amplifies the signal generated by the detector and provides the amplified signal as an output. In such an integrated embodiment, device 140 may comprise two terminals for providing a power-supply voltage and at least one additional terminal for providing the amplified output signal.
Still referring to
The above construction has many advantages. First, the embedding of devices 130 and 140 into substrate 110 reduces the thickness of package 100 compared to prior art optocouplers where the optoelectronic devices are mounted on the surface of a substrate. Also, since devices 130 and 140 are embedded in substrate 110, body 150 of radiation transmissive material does need to encase the devices, and therefore can have a smaller height and smaller foot print area, thereby reducing the foot print area of package 100. Also, the construction enables traces 120A-120D to replace the wire bonds used in conventional optocoupler packages, which also reduces the height and foot print area of package 100 compared to prior art optocouplers. The traces and conductive pillars also enable the use of interconnect bumps rather than leads, which further reduces the footprint area of the package. These interconnect bumps can be located in the same height volume as body 150 and layer 152, and thereby do not substantially increase the overall height of the package. The elimination of wire bonds also increases the reliability of the package, enables wafer-level manufacturing processes to be used (as illustrated below in greater detail). Wafer-level processing allows for a high degree of automation, and generally results in a less expensive cost compared to conventional lead frame methods. As a further advantage, the substrate construction eliminates the need to use temporary paper and ribbon supports to form bodies 150 of radiation transmissive material (e.g., optical gel) on unmolded lead frames (as is conventionally done). This eliminates the prior art processes of adhering a paper back support and ribbon tape to an unmolded lead frame prior to dispensing and curing the optical gel and thereafter removing the paper and ribbon, thereby saving processing time and cost.
Referring to
Then a patterned mask layer is formed over the layer of conductive material to cover the areas where the traces are to be formed. Thereafter, the exposed portions of the conductive layer are etched away to leave traces 120A-120C. The patterned mask layer, which may comprise a photoresist, may be left in place or removed with a suitable solvent. Electrolytic plating may be used in combination with an electroless plating process, and suitable surface activation processes known to the art may be used to prepare the surfaces for electroless plating. In another implementation, a patterned mask layer is disposed over the exposed surfaces of molding material 14 and components 125A-125C, 130, and 140 prior to forming traces 120A-120C. This mask covers the areas where the traces are not to be formed, and leaves exposed the areas where the traces are to be formed. A thin layer of conductive material, such as a metal like copper, is electrolessly plated onto the surfaces that are left exposed by the patterned mask layer to form the traces. The plated material makes an electrical coupling to conductive regions 131, 132, and 142, and to the exposed end surfaces of conductive pillars 125A-125C. The patterned mask layer, which may comprise a photoresist, may be left in place or removed with a suitable solvent. In yet another implementation, a seed plating layer of conductive material, such as a metal like copper, is electrolessly plated over the entirety of the exposed surfaces of molding material 14 and components 125A-125C, 130, and 140. The seed layer makes an electrical coupling to conductive regions 131, 132, and 142, and to the exposed end surfaces of conductive pillars 125A-125C. Next, a patterned mask layer is disposed over the seed layer, covering the areas where the traces are not to be formed, and leaving exposed the areas where the traces are to be formed. A layer of conductive material, such as a metal like copper, is electrolytically plated onto the portions of the seed layer that are left exposed by the patterned mask layer to form the traces. The patterned layer is then removed with a solvent, and the exposed portions of the seed layer are etched away with an etchant. Each of the above process approaches results in traces 120A-120C being electrically coupled and metallurgically bonded to conductive regions 131, 132, and 142 and the exposed end surfaces of conductive pillars 125A-125C.
Referring to
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As indicated above with reference to
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Next, the package layer formed thus far is de-bonded from the working substrate, as was similarly done in the first exemplary described method with reference to
Instead of plating, or in addition thereto, the traces 120A-120D may be formed by a sputtering process conducted under a vacuum. In general, sputtering can be advantageous for depositing seed layers for electroplating. Like plating, the sputtering process provides for metallurgical bonding of the traces to the conductive regions of the devices and the end surfaces of the conductive pillars. Plating and sputtering eliminate the need for solder joints, and have the advantages of reducing processing temperatures and increasing yield and reliability. Thus, the connections of the traces 120A-120D to the conductive regions of the optoelectronic devices and to the conductive pillars are solderless.
Each of the above processes described with reference to
It may be further appreciated that devices 130 and 140 may be provided in die form in which both of their conductive regions (e.g., terminals) are provided at their top active surfaces. In this case, all of the traces 120A-120D can be formed on the first surface 111 of substrate 110, and conductive pillars 125A-125C may be omitted in such implementations. If one or more of the conductive pillars 125A-125C are used, each may have a width-to-height ratio that is greater than 0.5, and may be in the range of 0.5 to 4, and more typically in the range of 1 to 4 or 2 to 4. In this ratio, the height is the dimension that spans between the first and second surfaces 111 and 112 of substrate 110, and the width is perpendicular to the height dimension, with the width being measured at its minimum value. With these ranges of width-to-height ratios, the pillars may be placed on the working substrate more easily and reliably during manufacturing.
It should be understood that where the performance of an action of any of the methods disclosed and claimed herein is not predicated on the completion of another action, the actions may be performed in any time sequence (e.g., time order) with respect to one another, including simultaneous performance and interleaved performance of various actions. (Interleaved performance may, for example, occur when parts of two or more actions are performed in a mixed fashion.) Accordingly, it may be appreciated that, while the method claims of the present application recite sets of actions, the method claims are not limited to the order of the actions listed in the claim language, but instead cover all possible orderings, including simultaneous and interleaving performance of actions and other possible orderings not explicitly described above, unless otherwise specified by the claim language (such as by explicitly stating that one action precedes or follows another action).
The packages described above can be used in electrical assemblies including circuit boards with the packages mounted thereon. They may also be used in systems such as power converters, computers, communication equipment, etc. It may be appreciated that additional optoelectronic devices may be assembled on either or both sides of the substrate to provide additional optocouplers.
Any recitation of “a”, “an”, and “the” is intended to mean one or more unless specifically indicated to the contrary.
The terms and expressions which have been employed herein are used as terms of description and not of limitation, and there is no intention in the use of such terms and expressions of excluding equivalents of the features shown and described, it being recognized that various modifications are possible within the scope of the invention claimed.
Moreover, one or more features of one or more embodiments of the invention may be combined with one or more features of other embodiments of the invention without departing from the scope of the invention.
While the present invention has been particularly described with respect to the illustrated embodiments, it will be appreciated that various alterations, modifications, adaptations, and equivalent arrangements may be made based on the present disclosure, and are intended to be within the scope of the invention and the appended claims.
